stm32-rs · hannobraun · Nov 9, 2021 · Oct 30, 2021
diff --git a/Cargo.toml b/Cargo.toml
@@ -62,20 +62,30 @@ ltdc = []
 fmc = ["stm32-fmc"]
 usb_hs_phy = []
 rt = ["stm32f7/rt"]
-stm32f722 = ["stm32f7/stm32f7x2", "device-selected"]
-stm32f723 = ["stm32f7/stm32f7x3", "device-selected", "usb_hs_phy"]
-stm32f730 = ["stm32f7/stm32f730", "device-selected", "usb_hs_phy", "fmc"]
-stm32f732 = ["stm32f7/stm32f7x2", "device-selected"]
-stm32f733 = ["stm32f7/stm32f7x3", "device-selected", "usb_hs_phy"]
-stm32f745 = ["stm32f7/stm32f745", "device-selected", "gpioj", "gpiok", "fmc"]
-stm32f746 = ["stm32f7/stm32f7x6", "device-selected", "gpioj", "gpiok", "ltdc", "fmc", "has-can"]
-stm32f756 = ["stm32f7/stm32f7x6", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
-stm32f765 = ["stm32f7/stm32f765", "device-selected", "gpioj", "gpiok", "fmc"]
-stm32f767 = ["stm32f7/stm32f7x7", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
-stm32f769 = ["stm32f7/stm32f7x9", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
-stm32f777 = ["stm32f7/stm32f7x7", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
-stm32f778 = ["stm32f7/stm32f7x9", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
-stm32f779 = ["stm32f7/stm32f7x9", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
+
+svd-f730 = ["stm32f7/stm32f730"]
+svd-f745 = ["stm32f7/stm32f745"]
+svd-f765 = ["stm32f7/stm32f765"]
+svd-f7x2 = ["stm32f7/stm32f7x2"]
+svd-f7x3 = ["stm32f7/stm32f7x3"]
+svd-f7x6 = ["stm32f7/stm32f7x6"]
+svd-f7x7 = ["stm32f7/stm32f7x7"]
+svd-f7x9 = ["stm32f7/stm32f7x9"]
+
+stm32f722 = ["svd-f7x2", "device-selected"]
+stm32f723 = ["svd-f7x3", "device-selected", "usb_hs_phy"]
+stm32f730 = ["svd-f730", "device-selected", "usb_hs_phy", "fmc"]
+stm32f732 = ["svd-f7x2", "device-selected"]
+stm32f733 = ["svd-f7x3", "device-selected", "usb_hs_phy"]
+stm32f745 = ["svd-f745", "device-selected", "gpioj", "gpiok", "fmc"]
+stm32f746 = ["svd-f7x6", "device-selected", "gpioj", "gpiok", "ltdc", "fmc", "has-can"]
+stm32f756 = ["svd-f7x6", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
+stm32f765 = ["svd-f765", "device-selected", "gpioj", "gpiok", "fmc"]
+stm32f767 = ["svd-f7x7", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
+stm32f769 = ["svd-f7x9", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
+stm32f777 = ["svd-f7x7", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
+stm32f778 = ["svd-f7x9", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
+stm32f779 = ["svd-f7x9", "device-selected", "gpioj", "gpiok", "ltdc", "fmc"]
 
 fmc_lcd = ["display-interface"]
 

diff --git a/examples/exti_button.rs b/examples/exti_button.rs
@@ -34,19 +34,19 @@ fn main() -> ! {
     let gpiob = pac_periph.GPIOB.split();
     let mut led1 = gpiob.pb0.into_push_pull_output();
 
+    // Freeze clocks
+    let mut rcc = pac_periph.RCC.constrain();
+    let _clocks = rcc.cfgr.sysclk(216_000_000.Hz()).freeze();
+
     // Push button configuration
-    let mut rcc = pac_periph.RCC;
     let mut syscfg = pac_periph.SYSCFG;
     let mut exti = pac_periph.EXTI;
     let gpioc = pac_periph.GPIOC.split();
     let mut button = gpioc.pc13.into_floating_input();
-    button.make_interrupt_source(&mut syscfg, &mut rcc);
+    button.make_interrupt_source(&mut syscfg, &mut rcc.apb2);
     button.trigger_on_edge(&mut exti, Edge::Rising);
     button.enable_interrupt(&mut exti);
 
-    // Freeze clocks
-    rcc.constrain().cfgr.sysclk(216_000_000.Hz()).freeze();
-
     // Save information needed by the interrupt handler to the global variable
     free(|cs| {
         BUTTON_PIN.borrow(cs).replace(Some(button));

diff --git a/src/adc.rs b/src/adc.rs
@@ -2,7 +2,7 @@
 
 #![allow(dead_code)]
 
-use crate::rcc::{Clocks, APB2};
+use crate::rcc::{Clocks, Enable, Reset, APB2};
 
 use crate::gpio::Analog;
 use crate::gpio::{gpioa, gpiob, gpioc, gpiof};
@@ -193,10 +193,10 @@ macro_rules! adc_hal {
                     align: Align::default(),
                     clocks,
                 };
-                s.enable_clock(apb2);
+                <$ADC>::enable(apb2);
                 if reset {
                     s.power_down();
-                    s.reset(apb2);
+                    <$ADC>::reset(apb2);
                 }
 
                 s.setup_oneshot();
@@ -266,29 +266,6 @@ macro_rules! adc_hal {
                 self.rb.cr2.modify(|_, w| w.adon().clear_bit());
             }
 
-            fn reset(&mut self, apb2: &mut APB2) {
-                apb2.rstr().modify(|_, w| w.adcrst().set_bit());
-                apb2.rstr().modify(|_, w| w.adcrst().clear_bit());
-            }
-
-            fn enable_clock(&mut self, apb2: &mut APB2) {
-                match stringify!($adc) {
-                    "adc1" => apb2.enr().modify(|_, w| w.adc1en().set_bit()), // for ADC1
-                    "adc2" => apb2.enr().modify(|_, w| w.adc2en().set_bit()), // for ADC2
-                    "adc3" => apb2.enr().modify(|_, w| w.adc3en().set_bit()), // for ADC3
-                    _ => unreachable!(),
-                }
-            }
-
-            fn disable_clock(&mut self, apb2: &mut APB2) {
-                match stringify!($adc) {
-                    "adc1" => apb2.enr().modify(|_, w| w.adc1en().clear_bit()), // for ADC1
-                    "adc2" => apb2.enr().modify(|_, w| w.adc2en().clear_bit()), // for ADC2
-                    "adc3" => apb2.enr().modify(|_, w| w.adc3en().clear_bit()), // for ADC3
-                    _ => unreachable!(),
-                }
-            }
-
             // 15.3.5 Single conversion mode (page: 444)
             // CONT bit >> 0 (continuous)
             // see EXTEN and EXTSEL[3:0]: for triggers (page:471)
@@ -434,7 +411,7 @@ macro_rules! adc_hal {
             /// Powers down the ADC, disables the ADC clock and releases the ADC Peripheral
             pub fn release(mut self, apb2: &mut APB2) -> $ADC {
                 self.power_down();
-                self.disable_clock(apb2);
+                <$ADC>::disable(apb2);
                 self.rb
             }
         }

diff --git a/src/dac.rs b/src/dac.rs
@@ -1,8 +1,11 @@
-use crate::gpio::{
-    gpioa::{PA4, PA5},
-    Analog,
+use crate::pac::DAC;
+use crate::{
+    gpio::{
+        gpioa::{PA4, PA5},
+        Analog,
+    },
+    rcc::{Enable, Reset},
 };
-use crate::pac::{DAC, RCC};
 
 /// DAC Errors
 #[derive(Debug)]
@@ -46,15 +49,8 @@ where
     PINS: Pins<DAC>,
 {
     unsafe {
-        // NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
-        let rcc = &(*RCC::ptr());
-        rcc.apb1enr.modify(|_, w| w.dacen().set_bit());
-
-        // Stall the pipeline to work around erratum 2.1.13 (DM00037591)
-        cortex_m::asm::dsb();
-
-        rcc.apb1rstr.write(|w| w.dacrst().set_bit());
-        rcc.apb1rstr.write(|w| w.dacrst().clear_bit());
+        DAC::enable_unchecked();
+        DAC::reset_unchecked();
 
         // NOTE(unsafe) ZST, doesn't need initialization.
         assert!(mem::size_of::<PINS::Output>() == 0);

diff --git a/src/dma.rs b/src/dma.rs
@@ -17,7 +17,7 @@ use crate::{
         Interrupt, DMA1, DMA2, NVIC,
     },
     qspi,
-    rcc::{sealed::RccBus, Enable, Reset},
+    rcc::{Enable, RccBus, Reset},
     serial, spi, state,
 };
 

diff --git a/src/fmc.rs b/src/fmc.rs
@@ -7,8 +7,8 @@ use stm32_fmc::FmcPeripheral;
 use stm32_fmc::{AddressPinSet, PinsSdram, Sdram, SdramChip, SdramPinSet, SdramTargetBank};
 
 use crate::embedded_time::rate::Hertz;
-use crate::pac as stm32;
-use crate::rcc::Clocks;
+use crate::pac;
+use crate::rcc::{Clocks, Enable, Reset};
 
 use crate::gpio::gpioa::PA7;
 use crate::gpio::gpiob::{PB5, PB6, PB7};
@@ -56,7 +56,7 @@ use crate::gpio::Alternate;
 
 /// Storage type for Flexible Memory Controller and its clocks
 pub struct FMC {
-    pub fmc: stm32::FMC,
+    pub fmc: pac::FMC,
     hclk: Hertz,
 }
 
@@ -92,7 +92,7 @@ pub trait FmcExt: Sized {
     }
 }
 
-impl FmcExt for stm32::FMC {
+impl FmcExt for pac::FMC {
     /// New FMC instance
     fn fmc(self, clocks: &Clocks) -> FMC {
         FMC {
@@ -103,17 +103,16 @@ impl FmcExt for stm32::FMC {
 }
 
 unsafe impl FmcPeripheral for FMC {
-    const REGISTERS: *const () = stm32::FMC::ptr() as *const ();
+    const REGISTERS: *const () = pac::FMC::ptr() as *const ();
 
     fn enable(&mut self) {
         // TODO : change it to something safe ...
-        let rcc = unsafe { &(*stm32::RCC::ptr()) };
-
-        // Enable FMC
-        rcc.ahb3enr.modify(|_, w| w.fmcen().enabled());
-        // Reset FMC
-        rcc.ahb3rstr.modify(|_, w| w.fmcrst().reset());
-        rcc.ahb3rstr.modify(|_, w| w.fmcrst().clear_bit());
+        unsafe {
+            // Enable FMC
+            pac::FMC::enable_unchecked();
+            // Reset FMC
+            pac::FMC::reset_unchecked();
+        }
     }
 
     fn source_clock_hz(&self) -> u32 {

diff --git a/src/gpio.rs b/src/gpio.rs
@@ -52,7 +52,8 @@ use embedded_hal::digital::v2::{
     InputPin, IoPin, OutputPin, StatefulOutputPin, ToggleableOutputPin,
 };
 
-use crate::pac::{EXTI, RCC, SYSCFG};
+use crate::pac::{EXTI, SYSCFG};
+use crate::rcc::{Enable, APB2};
 
 mod convert;
 
@@ -160,7 +161,7 @@ impl<MODE> Interruptable for Input<MODE> {}
 
 /// External Interrupt Pin
 pub trait ExtiPin {
-    fn make_interrupt_source(&mut self, syscfg: &mut SYSCFG, rcc: &mut RCC);
+    fn make_interrupt_source(&mut self, syscfg: &mut SYSCFG, apb2: &mut APB2);
     fn trigger_on_edge(&mut self, exti: &mut EXTI, level: Edge);
     fn enable_interrupt(&mut self, exti: &mut EXTI);
     fn disable_interrupt(&mut self, exti: &mut EXTI);
@@ -175,9 +176,9 @@ where
 {
     /// Make corresponding EXTI line sensitive to this pin
     #[inline(always)]
-    fn make_interrupt_source(&mut self, syscfg: &mut SYSCFG, rcc: &mut RCC) {
+    fn make_interrupt_source(&mut self, syscfg: &mut SYSCFG, apb2: &mut APB2) {
         // SYSCFG clock must be enabled in order to do register writes
-        rcc.apb2enr.modify(|_, w| w.syscfgen().set_bit());
+        SYSCFG::enable(apb2);
 
         let i = self.pin_id();
         let port = self.port_id() as u32;
@@ -584,12 +585,13 @@ impl<const P: char, const N: u8> IoPin<Self, Pin<Output<PushPull>, P, N>>
 }
 
 macro_rules! gpio {
-    ($GPIOX:ident, $gpiox:ident, $PEPin:ident, $port_id:expr, $PXn:ident, $iopxenr:ident, $iopxrstr:ident, [
+    ($GPIOX:ident, $gpiox:ident, $PEPin:ident, $port_id:expr, $PXn:ident, [
         $($PXi:ident: ($pxi:ident, $i:expr, $MODE:ty),)+
     ]) => {
         /// GPIO
         pub mod $gpiox {
-            use crate::pac::{$GPIOX, RCC};
+            use crate::rcc::{Enable, Reset};
+            use crate::pac::$GPIOX;
             use super::{
                 Floating, Input,
             };
@@ -606,11 +608,10 @@ macro_rules! gpio {
                 type Parts = Parts;
 
             fn split(self) -> Parts {
-                    // NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
-                    let rcc = unsafe { &(*RCC::ptr()) };
-                    rcc.ahb1enr.modify(|_, w| w.$iopxenr().set_bit());
-                    rcc.ahb1rstr.modify(|_, w| w.$iopxrstr().set_bit());
-                    rcc.ahb1rstr.modify(|_, w| w.$iopxrstr().clear_bit());
+                    unsafe {
+                        <$GPIOX>::enable_unchecked();
+                        <$GPIOX>::reset_unchecked();
+                    }
 
                     Parts {
                         $(
@@ -630,7 +631,7 @@ macro_rules! gpio {
     }
 }
 
-gpio!(GPIOA, gpioa, PA, 'A', PAn, gpioaen, gpioarst, [
+gpio!(GPIOA, gpioa, PA, 'A', PAn, [
     PA0: (pa0, 0, Input<Floating>),
     PA1: (pa1, 1, Input<Floating>),
     PA2: (pa2, 2, Input<Floating>),
@@ -649,7 +650,7 @@ gpio!(GPIOA, gpioa, PA, 'A', PAn, gpioaen, gpioarst, [
     PA15: (pa15, 15, Input<Floating>),
 ]);
 
-gpio!(GPIOB, gpiob, PB, 'B', PBn, gpioben, gpiobrst, [
+gpio!(GPIOB, gpiob, PB, 'B', PBn, [
     PB0: (pb0, 0, Input<Floating>),
     PB1: (pb1, 1, Input<Floating>),
     PB2: (pb2, 2, Input<Floating>),
@@ -668,7 +669,7 @@ gpio!(GPIOB, gpiob, PB, 'B', PBn, gpioben, gpiobrst, [
     PB15: (pb15, 15, Input<Floating>),
 ]);
 
-gpio!(GPIOC, gpioc, PC, 'C', PCn, gpiocen, gpiocrst, [
+gpio!(GPIOC, gpioc, PC, 'C', PCn, [
     PC0: (pc0, 0, Input<Floating>),
     PC1: (pc1, 1, Input<Floating>),
     PC2: (pc2, 2, Input<Floating>),
@@ -687,7 +688,7 @@ gpio!(GPIOC, gpioc, PC, 'C', PCn, gpiocen, gpiocrst, [
     PC15: (pc15, 15, Input<Floating>),
 ]);
 
-gpio!(GPIOD, gpiod, PD, 'D', PDn, gpioden, gpiodrst, [
+gpio!(GPIOD, gpiod, PD, 'D', PDn, [
     PD0: (pd0, 0, Input<Floating>),
     PD1: (pd1, 1, Input<Floating>),
     PD2: (pd2, 2, Input<Floating>),
@@ -706,7 +707,7 @@ gpio!(GPIOD, gpiod, PD, 'D', PDn, gpioden, gpiodrst, [
     PD15: (pd15, 15, Input<Floating>),
 ]);
 
-gpio!(GPIOE, gpioe, PE, 'E', PEn, gpioeen, gpioerst, [
+gpio!(GPIOE, gpioe, PE, 'E', PEn, [
     PE0: (pe0, 0, Input<Floating>),
     PE1: (pe1, 1, Input<Floating>),
     PE2: (pe2, 2, Input<Floating>),
@@ -725,7 +726,7 @@ gpio!(GPIOE, gpioe, PE, 'E', PEn, gpioeen, gpioerst, [
     PE15: (pe15, 15, Input<Floating>),
 ]);
 
-gpio!(GPIOF, gpiof, PF, 'F', PFn, gpiofen, gpiofrst, [
+gpio!(GPIOF, gpiof, PF, 'F', PFn, [
     PF0: (pf0, 0, Input<Floating>),
     PF1: (pf1, 1, Input<Floating>),
     PF2: (pf2, 2, Input<Floating>),
@@ -744,7 +745,7 @@ gpio!(GPIOF, gpiof, PF, 'F', PFn, gpiofen, gpiofrst, [
     PF15: (pf15, 15, Input<Floating>),
 ]);
 
-gpio!(GPIOG, gpiog, PG, 'G', PGn, gpiogen, gpiogrst, [
+gpio!(GPIOG, gpiog, PG, 'G', PGn, [
     PG0: (pg0, 0, Input<Floating>),
     PG1: (pg1, 1, Input<Floating>),
     PG2: (pg2, 2, Input<Floating>),
@@ -763,7 +764,7 @@ gpio!(GPIOG, gpiog, PG, 'G', PGn, gpiogen, gpiogrst, [
     PG15: (pg15, 15, Input<Floating>),
 ]);
 
-gpio!(GPIOH, gpioh, PH, 'H', PHn, gpiohen, gpiohrst, [
+gpio!(GPIOH, gpioh, PH, 'H', PHn, [
     PH0: (ph0, 0, Input<Floating>),
     PH1: (ph1, 1, Input<Floating>),
     PH2: (ph2, 2, Input<Floating>),
@@ -782,7 +783,7 @@ gpio!(GPIOH, gpioh, PH, 'H', PHn, gpiohen, gpiohrst, [
     PH15: (ph15, 15, Input<Floating>),
 ]);
 
-gpio!(GPIOI, gpioi, PI, 'I', PIn, gpioien, gpioirst, [
+gpio!(GPIOI, gpioi, PI, 'I', PIn, [
     PI0: (pi0, 0, Input<Floating>),
     PI1: (pi1, 1, Input<Floating>),
     PI2: (pi2, 2, Input<Floating>),
@@ -802,7 +803,7 @@ gpio!(GPIOI, gpioi, PI, 'I', PIn, gpioien, gpioirst, [
 ]);
 
 #[cfg(feature = "gpioj")]
-gpio!(GPIOJ, gpioj, PJ, 'J', PJn, gpiojen, gpiojrst, [
+gpio!(GPIOJ, gpioj, PJ, 'J', PJn, [
     PJ0: (pj0, 0, Input<Floating>),
     PJ1: (pj1, 1, Input<Floating>),
     PJ2: (pj2, 2, Input<Floating>),
@@ -822,7 +823,7 @@ gpio!(GPIOJ, gpioj, PJ, 'J', PJn, gpiojen, gpiojrst, [
 ]);
 
 #[cfg(feature = "gpiok")]
-gpio!(GPIOK, gpiok, PK, 'K', PKn, gpioken, gpiokrst, [
+gpio!(GPIOK, gpiok, PK, 'K', PKn, [
     PK0: (pk0, 0, Input<Floating>),
     PK1: (pk1, 1, Input<Floating>),
     PK2: (pk2, 2, Input<Floating>),

diff --git a/src/i2c.rs b/src/i2c.rs
@@ -12,7 +12,7 @@ use crate::gpio::gpioh::{PH4, PH5, PH7, PH8};
 use crate::gpio::AlternateOD;
 use crate::hal::blocking::i2c::{Read, Write, WriteRead};
 use crate::pac::{DWT, I2C1, I2C2, I2C3};
-use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset};
+use crate::rcc::{Clocks, Enable, GetBusFreq, RccBus, Reset};
 use nb::Error::{Other, WouldBlock};
 use nb::{Error as NbError, Result as NbResult};