update changelog entry

Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>

CHANGELOG.md

@@ -1,4 +1,9 @@
 # CHANGELOG
+
+## [3.8.1] - 2023-11-08
+- Added test suites for `zcb` from code size reduction extension.
+- Added test macro for instructions with single operand.
+
 ## [3.8.0] - 2023-10-26
 - Updated trap handler to handle delegated exceptions in S-mode for both bare and virtual modes.
 - Added Hypervisor mode support in Trap handler
@@ -43,11 +48,6 @@ Add missing check ISA fields in recently modified div and amo tests
 - Added test case for division if most negative number by -1
 - Solved the [issue #300](https://github.com/riscv-non-isa/riscv-arch-test/issues/300)
 
-## [3.7.1] - 2023-06-20
-
-- Added test suites for `zcb` from code size reduction extension.
-- Added test macro for instructions with single operand.
-
 ## [3.7.0] - 2023-05-16
 - Updated the LI macro
 - Make Trap handler compatible for RV32E