Workflow for Executing CNN Networks on Zynq Ultrascale+ with VITIS AI. Detailed analysis, configuration, and execution of Convolutional Neural Networks on ZCU102 using VITIS AI, evaluating performance on the board compared to Cloud infrastructure. Developed for educational exam purposes.

Quantize, compile and run a pretrained Pytorch model on a Xilinx KV260 to control a FireTV using hand gestures from USB camera input

Hardware Accelerators on FPGA for Computer Vision Applications

"Vitis-AI-YOLOv3-TF2-Quantization-Evaluation" Repo for quantization of YOLOv3 on Vitis-AI using TF2, aimed to deploy model on edge devices with limited resources. Includes training & quantization scripts and evaluation metrics. Experiment with different configurations.

Custom YoloV4 Darknet/Tensorflow model for license plate detection on the AMD-Xilinx Kria KV260 Vision-AI starter Kit. Utilize transfer learning to create your own custom object detecion model on a custom dataset, quantize and compile in Vitis-AI for easy deployment and evaluation on FPGA.

Quantization of efficientnet model that i pruned 81% using Vitis AI and compiling it for deployment on FPAG

Xilinx DPU(Vitis AI)を用いたエッジAI実現に向けたサンプルプログラム

The Flow to Deploy your Custom Deep Learning Models on Ultra96V2.

PYNQ enabled Genesys ZU Open Source Instrument, based on Pavel Demin's Red Pitaya Notes workflow.

Compression Supports Spatial Deep Learning

Vitis AI tutorial for MNIST and CIFAR10 classification

Workflow for executing CNN Networks on Zynq Ultrascale+ with Vitis AI toolchain. Detailed analysis, configuration and execution of Convolutional Neural Networks on ZCU102 using Vitis AI, evaluating performance on the board compared to Cloud infrastructure (eg. Kaggle). Developed for educational exam purposes.

Human falls is a major reason for deaths in elderly people. It can be prevented by an automatic fall detection, and alert system. We have created an automatic fall detection algorithm running on the Xilinx ZCU104 FPGA.

Xilinx Vitis AI with custom models

A framework to train a ResUNet architecture, quantize, compile and execute it on an FPGA.