Releases: raulgilabert/SISA-Custom-Instruction-Assembler
Releases · raulgilabert/SISA-Custom-Instruction-Assembler
Bug fixes with negative offset on memory instructions
Bug fixes:
- Error raised when trying to preprocess a memory instruction with negative offset
Some other fixes:
- Deleted extra new lines on translated .S
Basic custom instruction for SISA SIMD ampliation PEC 2024
Support for SIMD instructions of https://github.com/raulgilabert/ampliacio-PEC
- MVRV
- MVVR
- ADDV
- SUBV
- SHAV
- SHLV
- MULV
- MULHV
- MULHUV
- STV
- LDV