Output control on debug clock and data lines

[julianagentile]

The current release of the firmware leaves the clock and data lines with output enabled after deinit. When the probe is used as a component of a larger system/project, this can lead to unintended side effects such as interference with other communications (as the probe may still be trying to communicate), unintended operations, or signal interference.

Solution:

• In probe_deinit(), disable output on the clock and data lines
• In probe_init(), enable output on the clock and data lines

Note: this solution avoids needing to modify the PIO state machine implementation which is why I took this (much easier) route