I am Parnab from India, currently an ECE undergrad at MNNIT Allahabad.
Electronics, Web development, Microcontroller programming, Deep learning
Verilog Gate level Implementation of floating point arithmetic as per IEEE 754
2D discrete cosine transform (DCT) of an 8x8 image in verilog HDL
Implementation of booth's multiplier algorithm for signed numbers in verilog.
Verilog 3
A simple deep learning chatbot that uses neural networks and natural language processing.
Python 1
This is an image processing implementation through Verilog HDL.
C 1