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Merge pull request #51 from SteelPh0enix/pac-update
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PAC: Regenerated using new version of `svd2rust`
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SteelPh0enix authored Sep 4, 2023
2 parents b4360ff + 577733d commit cc1311e
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27 changes: 18 additions & 9 deletions arch/cortex-m/samv71q21-pac/src/acc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,39 +23,48 @@ pub struct RegisterBlock {
#[doc = "0xe8 - Write Protection Status Register"]
pub wpsr: WPSR,
}
#[doc = "CR (w) register accessor: an alias for `Reg<CR_SPEC>`"]
#[doc = "CR (w) register accessor: Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`cr`]
module"]
pub type CR = crate::Reg<cr::CR_SPEC>;
#[doc = "Control Register"]
pub mod cr;
#[doc = "MR (rw) register accessor: an alias for `Reg<MR_SPEC>`"]
#[doc = "MR (rw) register accessor: Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mr`]
module"]
pub type MR = crate::Reg<mr::MR_SPEC>;
#[doc = "Mode Register"]
pub mod mr;
#[doc = "IER (w) register accessor: an alias for `Reg<IER_SPEC>`"]
#[doc = "IER (w) register accessor: Interrupt Enable Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`ier`]
module"]
pub type IER = crate::Reg<ier::IER_SPEC>;
#[doc = "Interrupt Enable Register"]
pub mod ier;
#[doc = "IDR (w) register accessor: an alias for `Reg<IDR_SPEC>`"]
#[doc = "IDR (w) register accessor: Interrupt Disable Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`idr`]
module"]
pub type IDR = crate::Reg<idr::IDR_SPEC>;
#[doc = "Interrupt Disable Register"]
pub mod idr;
#[doc = "IMR (r) register accessor: an alias for `Reg<IMR_SPEC>`"]
#[doc = "IMR (r) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`imr`]
module"]
pub type IMR = crate::Reg<imr::IMR_SPEC>;
#[doc = "Interrupt Mask Register"]
pub mod imr;
#[doc = "ISR (r) register accessor: an alias for `Reg<ISR_SPEC>`"]
#[doc = "ISR (r) register accessor: Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`isr`]
module"]
pub type ISR = crate::Reg<isr::ISR_SPEC>;
#[doc = "Interrupt Status Register"]
pub mod isr;
#[doc = "ACR (rw) register accessor: an alias for `Reg<ACR_SPEC>`"]
#[doc = "ACR (rw) register accessor: Analog Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`acr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`acr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`acr`]
module"]
pub type ACR = crate::Reg<acr::ACR_SPEC>;
#[doc = "Analog Control Register"]
pub mod acr;
#[doc = "WPMR (rw) register accessor: an alias for `Reg<WPMR_SPEC>`"]
#[doc = "WPMR (rw) register accessor: Write Protection Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wpmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wpmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`wpmr`]
module"]
pub type WPMR = crate::Reg<wpmr::WPMR_SPEC>;
#[doc = "Write Protection Mode Register"]
pub mod wpmr;
#[doc = "WPSR (r) register accessor: an alias for `Reg<WPSR_SPEC>`"]
#[doc = "WPSR (r) register accessor: Write Protection Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wpsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`wpsr`]
module"]
pub type WPSR = crate::Reg<wpsr::WPSR_SPEC>;
#[doc = "Write Protection Status Register"]
pub mod wpsr;
70 changes: 19 additions & 51 deletions arch/cortex-m/samv71q21-pac/src/acc/acr.rs
Original file line number Diff line number Diff line change
@@ -1,39 +1,7 @@
#[doc = "Register `ACR` reader"]
pub struct R(crate::R<ACR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<ACR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<ACR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<ACR_SPEC>) -> Self {
R(reader)
}
}
pub type R = crate::R<ACR_SPEC>;
#[doc = "Register `ACR` writer"]
pub struct W(crate::W<ACR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<ACR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<ACR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<ACR_SPEC>) -> Self {
W(writer)
}
}
pub type W = crate::W<ACR_SPEC>;
#[doc = "Field `ISEL` reader - Current Selection"]
pub type ISEL_R = crate::BitReader<ISELSELECT_A>;
#[doc = "Current Selection\n\nValue on reset: 0"]
Expand All @@ -59,35 +27,38 @@ impl ISEL_R {
true => ISELSELECT_A::HISP,
}
}
#[doc = "Checks if the value of the field is `LOPW`"]
#[doc = "Low-power option."]
#[inline(always)]
pub fn is_lopw(&self) -> bool {
*self == ISELSELECT_A::LOPW
}
#[doc = "Checks if the value of the field is `HISP`"]
#[doc = "High-speed option."]
#[inline(always)]
pub fn is_hisp(&self) -> bool {
*self == ISELSELECT_A::HISP
}
}
#[doc = "Field `ISEL` writer - Current Selection"]
pub type ISEL_W<'a, const O: u8> = crate::BitWriter<'a, ACR_SPEC, O, ISELSELECT_A>;
impl<'a, const O: u8> ISEL_W<'a, O> {
pub type ISEL_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O, ISELSELECT_A>;
impl<'a, REG, const O: u8> ISEL_W<'a, REG, O>
where
REG: crate::Writable + crate::RegisterSpec,
{
#[doc = "Low-power option."]
#[inline(always)]
pub fn lopw(self) -> &'a mut W {
pub fn lopw(self) -> &'a mut crate::W<REG> {
self.variant(ISELSELECT_A::LOPW)
}
#[doc = "High-speed option."]
#[inline(always)]
pub fn hisp(self) -> &'a mut W {
pub fn hisp(self) -> &'a mut crate::W<REG> {
self.variant(ISELSELECT_A::HISP)
}
}
#[doc = "Field `HYST` reader - Hysteresis Selection"]
pub type HYST_R = crate::FieldReader;
#[doc = "Field `HYST` writer - Hysteresis Selection"]
pub type HYST_W<'a, const O: u8> = crate::FieldWriter<'a, ACR_SPEC, 2, O>;
pub type HYST_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>;
impl R {
#[doc = "Bit 0 - Current Selection"]
#[inline(always)]
Expand All @@ -104,34 +75,31 @@ impl W {
#[doc = "Bit 0 - Current Selection"]
#[inline(always)]
#[must_use]
pub fn isel(&mut self) -> ISEL_W<0> {
pub fn isel(&mut self) -> ISEL_W<ACR_SPEC, 0> {
ISEL_W::new(self)
}
#[doc = "Bits 1:2 - Hysteresis Selection"]
#[inline(always)]
#[must_use]
pub fn hyst(&mut self) -> HYST_W<1> {
pub fn hyst(&mut self) -> HYST_W<ACR_SPEC, 1> {
HYST_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self.bits = bits;
self
}
}
#[doc = "Analog Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [acr](index.html) module"]
#[doc = "Analog Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`acr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`acr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct ACR_SPEC;
impl crate::RegisterSpec for ACR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [acr::R](R) reader structure"]
impl crate::Readable for ACR_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [acr::W](W) writer structure"]
#[doc = "`read()` method returns [`acr::R`](R) reader structure"]
impl crate::Readable for ACR_SPEC {}
#[doc = "`write(|w| ..)` method takes [`acr::W`](W) writer structure"]
impl crate::Writable for ACR_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
Expand Down
32 changes: 6 additions & 26 deletions arch/cortex-m/samv71q21-pac/src/acc/cr.rs
Original file line number Diff line number Diff line change
@@ -1,48 +1,28 @@
#[doc = "Register `CR` writer"]
pub struct W(crate::W<CR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<CR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<CR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<CR_SPEC>) -> Self {
W(writer)
}
}
pub type W = crate::W<CR_SPEC>;
#[doc = "Field `SWRST` writer - Software Reset"]
pub type SWRST_W<'a, const O: u8> = crate::BitWriter<'a, CR_SPEC, O>;
pub type SWRST_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
impl W {
#[doc = "Bit 0 - Software Reset"]
#[inline(always)]
#[must_use]
pub fn swrst(&mut self) -> SWRST_W<0> {
pub fn swrst(&mut self) -> SWRST_W<CR_SPEC, 0> {
SWRST_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self.bits = bits;
self
}
}
#[doc = "Control Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
#[doc = "Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct CR_SPEC;
impl crate::RegisterSpec for CR_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
#[doc = "`write(|w| ..)` method takes [`cr::W`](W) writer structure"]
impl crate::Writable for CR_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
Expand Down
32 changes: 6 additions & 26 deletions arch/cortex-m/samv71q21-pac/src/acc/idr.rs
Original file line number Diff line number Diff line change
@@ -1,48 +1,28 @@
#[doc = "Register `IDR` writer"]
pub struct W(crate::W<IDR_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<IDR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<IDR_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<IDR_SPEC>) -> Self {
W(writer)
}
}
pub type W = crate::W<IDR_SPEC>;
#[doc = "Field `CE` writer - Comparison Edge"]
pub type CE_W<'a, const O: u8> = crate::BitWriter<'a, IDR_SPEC, O>;
pub type CE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
impl W {
#[doc = "Bit 0 - Comparison Edge"]
#[inline(always)]
#[must_use]
pub fn ce(&mut self) -> CE_W<0> {
pub fn ce(&mut self) -> CE_W<IDR_SPEC, 0> {
CE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self.bits = bits;
self
}
}
#[doc = "Interrupt Disable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idr](index.html) module"]
#[doc = "Interrupt Disable Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`idr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct IDR_SPEC;
impl crate::RegisterSpec for IDR_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [idr::W](W) writer structure"]
#[doc = "`write(|w| ..)` method takes [`idr::W`](W) writer structure"]
impl crate::Writable for IDR_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
Expand Down
32 changes: 6 additions & 26 deletions arch/cortex-m/samv71q21-pac/src/acc/ier.rs
Original file line number Diff line number Diff line change
@@ -1,48 +1,28 @@
#[doc = "Register `IER` writer"]
pub struct W(crate::W<IER_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<IER_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<IER_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<IER_SPEC>) -> Self {
W(writer)
}
}
pub type W = crate::W<IER_SPEC>;
#[doc = "Field `CE` writer - Comparison Edge"]
pub type CE_W<'a, const O: u8> = crate::BitWriter<'a, IER_SPEC, O>;
pub type CE_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
impl W {
#[doc = "Bit 0 - Comparison Edge"]
#[inline(always)]
#[must_use]
pub fn ce(&mut self) -> CE_W<0> {
pub fn ce(&mut self) -> CE_W<IER_SPEC, 0> {
CE_W::new(self)
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self.bits = bits;
self
}
}
#[doc = "Interrupt Enable Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier](index.html) module"]
#[doc = "Interrupt Enable Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ier::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct IER_SPEC;
impl crate::RegisterSpec for IER_SPEC {
type Ux = u32;
}
#[doc = "`write(|w| ..)` method takes [ier::W](W) writer structure"]
#[doc = "`write(|w| ..)` method takes [`ier::W`](W) writer structure"]
impl crate::Writable for IER_SPEC {
type Writer = W;
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
Expand Down
23 changes: 4 additions & 19 deletions arch/cortex-m/samv71q21-pac/src/acc/imr.rs
Original file line number Diff line number Diff line change
@@ -1,18 +1,5 @@
#[doc = "Register `IMR` reader"]
pub struct R(crate::R<IMR_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<IMR_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<IMR_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<IMR_SPEC>) -> Self {
R(reader)
}
}
pub type R = crate::R<IMR_SPEC>;
#[doc = "Field `CE` reader - Comparison Edge"]
pub type CE_R = crate::BitReader;
impl R {
Expand All @@ -22,15 +9,13 @@ impl R {
CE_R::new((self.bits & 1) != 0)
}
}
#[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr](index.html) module"]
#[doc = "Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`imr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct IMR_SPEC;
impl crate::RegisterSpec for IMR_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [imr::R](R) reader structure"]
impl crate::Readable for IMR_SPEC {
type Reader = R;
}
#[doc = "`read()` method returns [`imr::R`](R) reader structure"]
impl crate::Readable for IMR_SPEC {}
#[doc = "`reset()` method sets IMR to value 0"]
impl crate::Resettable for IMR_SPEC {
const RESET_VALUE: Self::Ux = 0;
Expand Down
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