SPI: Documentation fixes

n7space · Nov 17, 2023 · 8599f38 · 8599f38
1 parent cb7f656
commit 8599f38
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/arch/cortex-m/samv71-hal/src/spi/chip_config.rs b/arch/cortex-m/samv71-hal/src/spi/chip_config.rs
@@ -54,7 +54,7 @@ pub enum ChipSelectBehavior {
     /// Chip select line is kept active until a new transfer is requested on a different chip select.
     KeepActive,
     /// Chip select line is deactivated after every data transfer. Duration of the inactivity period
-    /// can be controlled with `delay_between_transfers` field of [`ChipSelectConfig`].
+    /// can be controlled with `delay_between_transfers` field of [`ChipConfig`].
     DeactivateAfterEveryTransfer,
 }
 

diff --git a/arch/cortex-m/samv71-hal/src/spi/config.rs b/arch/cortex-m/samv71-hal/src/spi/config.rs
@@ -9,7 +9,7 @@ use crate::utils::BoundedU8;
 pub struct MasterConfig {
     /// Delay between the inactivation and activation of chip select signal.
     pub chip_selection_delay: ChipSelectionDelay,
-    /// Peripheral chip select. This can later be changed using [`Spi::change_chip`].
+    /// Peripheral chip select. This can later be changed using [`Spi::change_chip`](super::Spi::change_chip).
     pub selected_chip: SelectedChip,
     /// If true, overrun detection will be enabled and an error will occur if data transmission will
     /// try to be started while there's unread data in RX data register.