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estate is actually WPRI
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jnk0le committed Aug 2, 2023
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4 changes: 2 additions & 2 deletions riscv-total-embedded.adoc
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= riscv-total-embedded
Jan Oleksiewicz <jnk0le@hotmail.com>
:appversion: 0.17.26
:appversion: 0.17.27
:toc:
:toclevels: 5
:sectnums:
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[cols="1,2,1,2,6",options=header]
|====
| bit | name | type | reset value | description
| [31:0] | `estate_nl` | WLRL | undefined | implementation specified pattern
| [31:0] | `estate_nl` | WPRI | undefined | implementation specified pattern
used to recover execution state upon interrupt return. Covers certain csr registers:
(`fcsr`, `vcsr`, `vstart` etc.), and (optionally) multi cycle instruction progress. The content read as
well as the write to this register is valid only at the lowest implemented nesting level.
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