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add ARL (Arrow Lake) support
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Change-Id: I0ecc9cfea908eec24442e7e2af78b5a738485f45
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@rdementi
rdementi committed Nov 20, 2024
1 parent d964822 commit c0542fc
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Showing 2 changed files with 26 additions and 1 deletion.
18 changes: 17 additions & 1 deletion src/cpucounters.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -724,6 +724,7 @@ void PCM::initCStateSupportTables()
case RPL:
case MTL:
case LNL:
case ARL:
case SNOWRIDGE:
case ELKHART_LAKE:
case JASPER_LAKE:
Expand Down Expand Up @@ -803,6 +804,7 @@ void PCM::initCStateSupportTables()
case RPL:
case MTL:
case LNL:
case ARL:
case SNOWRIDGE:
case ELKHART_LAKE:
case JASPER_LAKE:
Expand Down Expand Up @@ -1662,6 +1664,7 @@ bool PCM::detectNominalFrequency()
|| cpu_family_model == RPL
|| cpu_family_model == MTL
|| cpu_family_model == LNL
|| cpu_family_model == ARL
|| cpu_family_model == SKX
|| cpu_family_model == ICX
|| cpu_family_model == SPR
Expand Down Expand Up @@ -1926,6 +1929,7 @@ void PCM::initUncoreObjects()
case RPL: // TGLClientBW works fine for RPL
case MTL: // TGLClientBW works fine for MTL
case LNL: // TGLClientBW works fine for LNL
case ARL: // TGLClientBW works fine for ARL
clientBW = std::make_shared<TGLClientBW>();
break;
/* Disabled since ADLClientBW requires 2x multiplier for BW on top
Expand Down Expand Up @@ -3334,6 +3338,7 @@ bool PCM::isCPUModelSupported(const int model_)
|| model_ == RPL
|| model_ == MTL
|| model_ == LNL
|| model_ == ARL
|| model_ == SKX
|| model_ == ICX
|| model_ == SPR
Expand Down Expand Up @@ -3367,6 +3372,9 @@ bool PCM::checkModel()
case CML_1:
cpu_family_model = CML;
break;
case ARL_1:
cpu_family_model = ARL;
break;
case ICL_1:
cpu_family_model = ICL;
break;
Expand Down Expand Up @@ -3510,7 +3518,12 @@ PCM::ErrorCode PCM::program(const PCM::ProgramMode mode_, const void * parameter
canUsePerf = false;
if (!silent) std::cerr << "Installed Linux kernel perf does not support hardware top-down level-1 counters. Using direct PMU programming instead.\n";
}
if (canUsePerf && (cpu_family_model == ADL || cpu_family_model == RPL || cpu_family_model == MTL || cpu_family_model == LNL))
if (canUsePerf && (cpu_family_model == ADL
|| cpu_family_model == RPL
|| cpu_family_model == MTL
|| cpu_family_model == LNL
|| cpu_family_model == ARL
))
{
canUsePerf = false;
if (!silent) std::cerr << "Linux kernel perf rejects an architectural event on your platform. Using direct PMU programming instead.\n";
Expand Down Expand Up @@ -3598,6 +3611,7 @@ PCM::ErrorCode PCM::program(const PCM::ProgramMode mode_, const void * parameter
case RPL:
case MTL:
case LNL:
case ARL:
LLCArchEventInit(hybridAtomEventDesc);
hybridAtomEventDesc[2].event_number = SKL_MEM_LOAD_RETIRED_L2_MISS_EVTNR;
hybridAtomEventDesc[2].umask_value = SKL_MEM_LOAD_RETIRED_L2_MISS_UMASK;
Expand Down Expand Up @@ -4957,6 +4971,8 @@ const char * PCM::getUArchCodename(const int32 cpu_family_model_param) const
return "Meteor Lake";
case LNL:
return "Lunar Lake";
case ARL:
return "Arrow Lake";
case SKX:
if (cpu_family_model_param >= 0)
{
Expand Down
9 changes: 9 additions & 0 deletions src/cpucounters.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1639,6 +1639,7 @@ class PCM_API PCM
case RPL:
case MTL:
case LNL:
case ARL:
if (topology[coreID].core_type == TopologyEntry::Atom)
{
return std::make_pair(OFFCORE_RESPONSE_0_EVTNR, event + 1);
Expand All @@ -1655,6 +1656,7 @@ class PCM_API PCM
case RPL:
case MTL:
case LNL:
case ARL:
useGLCOCREvent = true;
break;
}
Expand Down Expand Up @@ -1892,6 +1894,8 @@ class PCM_API PCM
RPL_3 = PCM_CPU_FAMILY_MODEL(6, 0xbe),
MTL = PCM_CPU_FAMILY_MODEL(6, 0xAA),
LNL = PCM_CPU_FAMILY_MODEL(6, 0xBD),
ARL = PCM_CPU_FAMILY_MODEL(6, 197),
ARL_1 = PCM_CPU_FAMILY_MODEL(6, 198),
BDX = PCM_CPU_FAMILY_MODEL(6, 79),
KNL = PCM_CPU_FAMILY_MODEL(6, 87),
SKL = PCM_CPU_FAMILY_MODEL(6, 94),
Expand Down Expand Up @@ -2128,6 +2132,7 @@ class PCM_API PCM
case MTL:
return 6;
case LNL:
case ARL:
return 12;
case SNOWRIDGE:
case ELKHART_LAKE:
Expand Down Expand Up @@ -2477,6 +2482,7 @@ class PCM_API PCM
|| cpu_family_model == PCM::RPL
|| cpu_family_model == PCM::MTL
|| cpu_family_model == PCM::LNL
|| cpu_family_model == PCM::ARL
|| cpu_family_model == PCM::SPR
|| cpu_family_model == PCM::EMR
|| cpu_family_model == PCM::GNR
Expand Down Expand Up @@ -2789,6 +2795,7 @@ class PCM_API PCM
|| cpu_family_model == RPL
|| cpu_family_model == MTL
|| cpu_family_model == LNL
|| cpu_family_model == ARL
|| useSKLPath()
;
}
Expand Down Expand Up @@ -4298,6 +4305,7 @@ uint64 getL2CacheMisses(const CounterStateType & before, const CounterStateType
|| cpu_family_model == PCM::RPL
|| cpu_family_model == PCM::MTL
|| cpu_family_model == PCM::LNL
|| cpu_family_model == PCM::ARL
) {
return after.Event[BasicCounterState::SKLL2MissPos] - before.Event[BasicCounterState::SKLL2MissPos];
}
Expand Down Expand Up @@ -4413,6 +4421,7 @@ uint64 getL3CacheHitsSnoop(const CounterStateType & before, const CounterStateTy
|| cpu_family_model == PCM::RPL
|| cpu_family_model == PCM::MTL
|| cpu_family_model == PCM::LNL
|| cpu_family_model == PCM::ARL
)
{
const int64 misses = getL3CacheMisses(before, after);
Expand Down

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