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How to run unisim using cxxrtl #197

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aniketabhiraj2004 opened this issue Jun 24, 2024 · 7 comments
Open

How to run unisim using cxxrtl #197

aniketabhiraj2004 opened this issue Jun 24, 2024 · 7 comments

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@aniketabhiraj2004
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aniketabhiraj2004 commented Jun 24, 2024

yosys -m ghdl -p "ghdl --std=93c --ieee=synopsys -fexplicit -Whide -Wspecs dut2; write_cxxrtl blink.cpp"

/----------------------------------------------------------------------------
| yosys -- Yosys Open SYnthesis Suite |
| Copyright (C) 2012 - 2024 Claire Xenia Wolf claire@yosyshq.com |
| Distributed under an ISC-like license, type "license" to see terms |
----------------------------------------------------------------------------/
Yosys 0.42+28 (git sha1 ede3750a6, g++ 10.2.0 -fPIC -Os)

-- Running command `ghdl --std=93c --ieee=synopsys -fexplicit -Whide -Wspecs dut2; write_cxxrtl blink.cpp' --

  1. Executing GHDL.
    /tools/Xilinx/Vivado/2019.2/data/vhdl/src/unisims/primitive/FIFO18E2.vhd:420:27:error: no declaration for "gsr"
    glblGSR <= TO_X01(GSR);
    ^
    ERROR: vhdl import failed.
@tgingold
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Apparently, there are some global signals which aren't yet supported. You could probably try to modify unisim to remove them.

If you have a reproducer (not using unisim, which is not open source), I could try to add support for it.

@aniketabhiraj2004
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Can you suggest some open source reproducer.

@aniketabhiraj2004
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Can you suggest some open source reproducer.

@Xiretza
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Xiretza commented Jun 26, 2024

Can you suggest some open source reproducer.

That's what's being asked of you. For the issue to be fixed, there needs to be a design that reproduces the issue without using proprietary libraries - you're in the best position to create such a design, since you just need to modify your existing reproducer to not use unisim.

@befedo
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befedo commented Jun 26, 2024

yosys -m ghdl -p "ghdl --std=93c --ieee=synopsys -fexplicit -Whide -Wspecs dut2; write_cxxrtl blink.cpp"

/---------------------------------------------------------------------------- | yosys -- Yosys Open SYnthesis Suite | | Copyright (C) 2012 - 2024 Claire Xenia Wolf claire@yosyshq.com | | Distributed under an ISC-like license, type "license" to see terms | ----------------------------------------------------------------------------/ Yosys 0.42+28 (git sha1 ede3750a6, g++ 10.2.0 -fPIC -Os)

-- Running command `ghdl --std=93c --ieee=synopsys -fexplicit -Whide -Wspecs dut2; write_cxxrtl blink.cpp' --

  1. Executing GHDL.
    /tools/Xilinx/Vivado/2019.2/data/vhdl/src/unisims/primitive/FIFO18E2.vhd:420:27:error: no declaration for "gsr"
    glblGSR <= TO_X01(GSR);
    ^
    ERROR: vhdl import failed.

If I remember correctly, the GSR/GTS signals are only necessary for simulation and where generated like shown here.

Did you include GLBL_VHD.vhd?

@aniketabhiraj2004
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Is signal in package is allowed in vhdl.

@tgingold
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Yes, signal declarations are allowed in package according to the VHDL LRM.
But I fear they aren't in the synthesizable subset.

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