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fixing a few layout bugs, fixing a windows compile bug
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nbingham1 committed Nov 13, 2024
1 parent 813f662 commit 407e3d4
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Showing 3 changed files with 16 additions and 4 deletions.
2 changes: 1 addition & 1 deletion bin/ckt
Submodule ckt updated 1 files
+2 −1 src/tech.cpp
2 changes: 1 addition & 1 deletion lib/phy
Submodule phy updated 3 files
+64 −39 phy/Layout.cpp
+2 −3 phy/Layout.h
+5 −0 phy/vector.h
16 changes: 14 additions & 2 deletions tech/sky130/tech.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,3 @@
#!/usr/bin/python3

from loom import *

AL = 0 # do not change
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nvtn = paint("nvtn", 251, 0)

# Define DRC Rules
difftap = b_or(diff, tap)

fill(nwell)
fill(nwell_pin)
fill(nwell_label)
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fill(lvtn)
fill(nsdm)
fill(psdm)
fill(hvi)
fill(pwell_pin)
fill(pwell_label)
width(diff, 30)
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spacing(b_and(licon1, poly), b_or(diff, tap), 38)
spacing(b_and(poly, b_not(diff)), diff, 15)

width(hvi, 120)
spacing(hvi, hvi, 140)
#spacing(b_and(hvi, nwell), nwell, 400)
#width(b_and(b_and(diff, hvi), b_not(b_and(psdm, diff))), 58)
#width(b_and(b_and(diff, hvi), b_and(psdm, diff)), 30)
enclosing(hvi, b_and(difftap, nwell), 66)
spacing(b_and(hvi, nwell), difftap, 86)
enclosing(hvi, difftap, 36)
spacing(hvi, difftap, 36)
#spacing(b_and(b_and(hvi, diff), b_not(nwell)), nwell, 86)

bound(areaid_sc)

# Define Routing and Device Models
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