Skip to content

Commit

Permalink
Fix ins/dups where splice region is preserved
Browse files Browse the repository at this point in the history
  • Loading branch information
b0d0nne11 committed Jan 23, 2024
1 parent dd6b998 commit 7f18cfd
Show file tree
Hide file tree
Showing 6 changed files with 49 additions and 2 deletions.
22 changes: 21 additions & 1 deletion src/hgvs/assemblymapper.py
Original file line number Diff line number Diff line change
Expand Up @@ -171,7 +171,27 @@ def n_to_c(self, var_n):
return self._maybe_normalize(var_out)

def c_to_p(self, var_c):
var_out = super(AssemblyMapper, self).c_to_p(var_c)
var_out = super(AssemblyMapper, self)._c_to_p(var_c)

if (
var_c.posedit.edit.type in ['ins', 'dup']
and var_c.type in "cnr"
and var_c.posedit.pos is not None
and (var_c.posedit.pos.start.offset != 0 or var_c.posedit.pos.end.offset != 0)
and var_out.posedit is None
):
if self._fetch_AlignmentMapper(tx_ac=var_c.ac).strand == 1:
normalizer = hgvs.normalizer.Normalizer(
self._norm.hdp, alt_aln_method=self.alt_aln_method, validate=False, shuffle_direction=5
)
else:
normalizer = hgvs.normalizer.Normalizer(
self._norm.hdp, alt_aln_method=self.alt_aln_method, validate=False, shuffle_direction=3
)
var_g = normalizer.normalize(self.c_to_g(var_c))
var_c = self.g_to_c(var_g, var_c.ac)
var_out = super(AssemblyMapper, self)._c_to_p(var_c)

return self._maybe_normalize(var_out)

def relevant_transcripts(self, var_g):
Expand Down
15 changes: 15 additions & 0 deletions src/hgvs/variantmapper.py
Original file line number Diff line number Diff line change
Expand Up @@ -429,6 +429,21 @@ def c_to_p(self, var_c, pro_ac=None):
"""

var_p = self._c_to_p(var_c, pro_ac=None)

if (
var_c.posedit.edit.type in ['ins', 'dup']
and var_c.type in "cnr"
and var_c.posedit.pos is not None
and (var_c.posedit.pos.start.offset != 0 or var_c.posedit.pos.end.offset != 0)
and var_p.posedit is None
):
raise HGVSUnsupportedOperationError('c_to_p not supported on VariantMapper for this var_c, try AssemblyMapper')

return var_p


def _c_to_p(self, var_c, pro_ac=None):
if not (var_c.type == "c"):
raise HGVSInvalidVariantError("Expected a cDNA (c.) variant; got " + str(var_c))
if self._validator:
Expand Down
Binary file modified tests/data/cache-py3.hdp
Binary file not shown.
1 change: 0 additions & 1 deletion tests/data/gcp/real.tsv
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,5 @@ ID00056 NC_000010.10:g.89693009delG NM_000314.4:c.492+1delG NP_000305.3:p.?
ID00057 NC_000010.10:g.89711873A>C NM_000314.4:c.493-2A>C NP_000305.3:p.?
ID00058 NC_000010.10:g.89717676G>A NM_000314.4:c.701G>A NP_000305.3:p.(Arg234Gln)
ID00059 NC_000010.10:g.89717777G>A NM_000314.4:c.801+1G>A NP_000305.3:p.?
ID00060 NC_000010.10:g.89720648dupT NM_000314.4:c.802-3dupT NP_000305.3:p.?
ID00061 NC_000005.9:g.131705667G>T NM_003060.3:c.3G>T NP_003051.1:p.Met1?
ID00062 NC_000005.9:g.131706014G>A NM_003060.3:c.350G>A NP_003051.1:p.(Trp117*)
3 changes: 3 additions & 0 deletions tests/support/mock_input_source.py
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,9 @@ def get_tx_seq(self, ac):
def get_seq(self, ac, start_i=None, end_i=None):
return self.get_tx_seq(ac)[start_i:end_i]

def get_pro_ac_for_tx_ac(self, ac):
return 'MOCK'

#
# internal methods
#
Expand Down
10 changes: 10 additions & 0 deletions tests/test_hgvs_assemblymapper.py
Original file line number Diff line number Diff line change
Expand Up @@ -201,6 +201,16 @@ def test_c_to_p_with_stop_gain(self):
self.assertEqual(str(var_p), hgvs_p)


def test_map_of_ins_splice_region_preserved(self):
hgvs_c = "NM_004119.2:c.1837+21_1837+22insCGAGAGAATATGAATATGATCTCAAATGGGAGTTTCCAAGAGAAAATTTAGAGTTTGGTAAGAATGGAATGTGCCAAA"
hgvs_p = "NP_004110.2:p.(Lys614_Val615insAsnGlyMetCysGlnThrArgGluTyrGluTyrAspLeuLysTrpGluPheProArgGluAsnLeuGluPheGlyLys)"

var_c = self.hp.parse_hgvs_variant(hgvs_c)
var_p = self.am.c_to_p(var_c)

self.assertEqual(str(var_p), hgvs_p)


class Test_RefReplacement(unittest.TestCase):
test_cases = [
# These casese attempt to test reference update in four dimensions:
Expand Down

0 comments on commit 7f18cfd

Please sign in to comment.