implemented logic circuit and parsing of SDD

[n28div]

Parsing of SDD is directly performed from the standard SDD file instead of using pySDD and additional dependencies.
Due to issue #311 the circuit will not work as expected. A quick and dirty patch is to update cirkit/backend/torch/layers/input.py

line 228:

- return self.semiring.map_from(x, LSESumSemiring)
+ return self.semiring.map_from(x, SumProductSemiring)

and line 328:

- logits = torch.log(self.probs()) if self.logits is None else self.logits()
+ logits = self.probs() if self.logits is None else self.logits()

side-effects have not been considered though.

[loreloc]

Hi Nicolas,
I have just merged a PR that unifies MixingLayer and DenseLayer in a single class SumLayer. Therefore, could you please try replacing the mixing layers with sum layers in your implementation for this?
Thank you!

[n28div]

Done!

[loreloc]

Hi Nicolas,
did you try the code?
This line does not seem correct

cirkit/cirkit/symbolic/circuit.py

Line 960 in fe5358c

sum_node = SumLayer(len(sum_inputs), 1, arity=len(sum_inputs), weight_factory=weight_factory)

The number of input and output units should always be 1 in your case, but arity > 1.

[n28div]

Yep, on my tests it did work just the same as before. You are right though, I misinterpreted the parameter. The new commit should be ok.

[loreloc]

Hi Nicolas,
is there something else that needs to be done for this PR?
Otherwise, I can have a look more in detail and merge it by the end of this week.