[SOL] Create explicit sign extension instruction #114
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As described in solana-foundation/solana-improvement-documents#174,
mov32 reg, reg
will now serve for sign extension.The changes in this PR are the following:
mov64
for copying 32-bit registers.mov32 reg, reg
for sign extension.mov64 reg, reg
for zero extension. I'm assuming I'll always keep the high bits clear in 32-bit sub-registers.and32 reg, -1
for truncation.I haven't done yet an integration test in the VM, because jump instructions do not work with ALU32. I'll fix that in a following PR and work on the necessary tests.