area(csr): intr NO bits is reduced from 64 to 8

[sinceforYy]

• Currently we support 61 major interrupts, and 8 bits are sufficient.

• There is no need to use 64 bits to store the intermediate data of the interrupt NO.

• In order to save area, we only need to add 1 cycle to wen, not waddr and wdata.

• We use (next || last) as the enable signal of RegEnable.

[XiangShanRobot]

[Generated by IPC robot]
commit: e9e82d1

commit	astar	copy_and_run	coremark	gcc	gromacs	lbm	linux	mcf	microbench	milc	namd	povray	wrf	xalancbmk
e9e82d1	1.959	0.450	2.687	1.230	2.832	2.461	2.393	0.919	1.407	1.992	3.434	2.709	2.383	3.261

master branch:

commit	astar	copy_and_run	coremark	gcc	gromacs	lbm	linux	mcf	microbench	milc	namd	povray	wrf	xalancbmk
2e5ebf5	1.959	0.450	2.686	1.238	2.832	2.461	2.393	0.919	1.407	1.992	3.435	2.709	2.383	3.261
908b24d
f0a1cc7	1.902	0.450	2.686	1.225	2.832	2.461	2.393	0.919	1.407	1.992	3.434	2.709	2.383	3.264
35850f1	1.902	0.450	2.686	1.222	2.832	2.461	2.393	0.919	1.407	1.992	3.434	2.709	2.383	3.264
dc4fac1	1.902	0.450	2.687	1.231	2.832	2.461	2.393	0.919	1.407	1.992	3.435	2.709	2.383	3.264

[XiangShanRobot]

[Generated by IPC robot]
commit: f67818e

commit	astar	copy_and_run	coremark	gcc	gromacs	lbm	linux	mcf	microbench	milc	namd	povray	wrf	xalancbmk
f67818e	1.959	0.450	2.687	1.229	2.832	2.461	2.393	0.919	1.407	1.992	3.434	2.709	2.383	3.261

master branch:

commit	astar	copy_and_run	coremark	gcc	gromacs	lbm	linux	mcf	microbench	milc	namd	povray	wrf	xalancbmk
2e5ebf5	1.959	0.450	2.686	1.238	2.832	2.461	2.393	0.919	1.407	1.992	3.435	2.709	2.383	3.261
908b24d	1.902	0.450	2.686	1.223	2.832	2.461	2.393	0.919	1.407	1.992	3.434	2.709	2.383	3.264
f0a1cc7	1.902	0.450	2.686	1.225	2.832	2.461	2.393	0.919	1.407	1.992	3.434	2.709	2.383	3.264
35850f1	1.902	0.450	2.686	1.222	2.832	2.461	2.393	0.919	1.407	1.992	3.434	2.709	2.383	3.264
dc4fac1	1.902	0.450	2.687	1.231	2.832	2.461	2.393	0.919	1.407	1.992	3.435	2.709	2.383	3.264