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This project is to design yolo AI accelerator in verilog HDL.

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HanPU-Code/CNN_YOLO_AI_accelerator

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CNN AI Accelerator using DARKNET-19 YOLO v3 Tiny

Our GOAL is to design HW AI accelerator that works low power, high performance.

Algorithm: DARKNET-19 AI Model: YOLO v3 Tiny Boards: PYNQ-Z2 FPGA Borad Main tool: Xilinx Vivado, Vitis AI

Developing

  • Quantization DARKNET-19 parameters to INT8 type.
  • Coding reference code in python. (all parameters are called in txt files.)
  • Design Conv layer.
  • Design Pooling layer.

Substep

Quantization DARKNET-19 parameters to INT8 type.

  • My team discuss about Bacth Normalization.
    • For Implementation, We guess Bacth Norm is not essential & causes large HW resources.
    • That discussion would be great paper subjects.

Coding reference code in python. (all parameters are called in txt files.)

Design Conv layer.

  • The components of Conv layer is "Convolution", "BatchNorm", and "Leaky ReLU".
  • Convolution layer
    • almost done.
    • top module and controller are remain.
  • BatchNorm
    • For HW resources problem, we determine delete BatchNorm layer.
    • all parts would be done and have problem, we will apply this layer.
  • Leaky ReLU
    • ReLU vs Leaky ReLU
    • One of our issues.

Design Pooling layer.