- Lab 0: Intro, Setup
- Lab 1: C, CGDB
- Lab 2: C Memory Management, Valgrind
- Lab 3: RISC-V Assembly
- Lab 4: RISC-V Calling Convention
- Lab 5: Logisim
- Lab 6: CPU, Pipelining
- Lab 7: Caches
- Lab 8: SIMD Instructions
- Lab 9: Thread Level Parallelism
- Lab 10: OS, VM
- Project 1: snek
- Project 2: CS61Classify
- Project 3: CS61CPU
- Project 4: Numc