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//------------------------------------------------------------------ | ||
//-- Blinking LED | ||
//------------------------------------------------------------------ | ||
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module Test ( | ||
input CLK, // 12MHz clock | ||
output LEDG // LED to blink | ||
); | ||
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reg [23:0] counter = 0; | ||
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always @(posedge CLK) | ||
counter <= counter + 1; | ||
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assign LEDG = counter[23]; | ||
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endmodule | ||
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[env] | ||
board = iceWerx | ||
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Blinking the Green LED |
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# ----------------------------------------------------------------------------- | ||
#- iceWerx constraint file (.pcf) | ||
#- By Juan Gonzalez (Obijuan) | ||
#- April - 2022 | ||
#- GPL license | ||
# ----------------------------------------------------------------------------- | ||
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# ------------ User Leds ------------------------------------------------------ | ||
#-- Red LED | ||
set_io --warn-no-port LEDR A5 # output | ||
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#-- Green LED | ||
set_io --warn-no-port LEDG M4 # output | ||
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#-- 12 Mhz clock | ||
set_io --warn-no-port CLK P7 # input |
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