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Checks for separated vector registers #275

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merged 1 commit into from
Nov 21, 2024
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vorosl
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@vorosl vorosl commented Nov 6, 2024

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@zherczeg
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Please update this patch

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Isn't there a test where both fregs and vregs are used?

@@ -3393,7 +3393,6 @@ SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_emit_simd_mov(struct sljit_compiler *co
sljit_s32 reg_size = SLJIT_SIMD_GET_REG_SIZE(type);
sljit_s32 elem_size = SLJIT_SIMD_GET_ELEM_SIZE(type);
sljit_ins ins;

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Don't remove this line.

@@ -1001,6 +1035,7 @@ static sljit_s32 function_fcheck(struct sljit_compiler *compiler, sljit_s32 p, s
#define FUNCTION_CHECK_IS_FREG(fr, is_32) \
function_check_is_freg(compiler, (fr))


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No need this newline.

|| (vr > (SLJIT_VS0 - compiler->vsaveds) && vr <= SLJIT_VS0)
|| (vr >= SLJIT_TMP_VREGISTER_BASE && vr < (SLJIT_TMP_VREGISTER_BASE + SLJIT_NUMBER_OF_TEMPORARY_VECTOR_REGISTERS));
}
#else
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Add comments to the #else #endif blocks

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LGTM

@zherczeg zherczeg merged commit 2cf8a24 into zherczeg:master Nov 21, 2024
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2 participants