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Upld enhacement #6451

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Upld enhacement #6451

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gdong1
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@gdong1 gdong1 commented Nov 20, 2024

Description

This is an enhancement for universal payload serial port FDT node.

<Include a description of the change and why this change was made.>
Current impl doesn't support serial port node under root node, only support it under PCI root bridge node. This PR fixed it.

<For each item, place an "x" in between [ and ] if true. Example: [x] (you can also check items in GitHub UI)>

<Create the PR as a Draft PR if it is only created to run CI checks.>

<Delete lines in <> tags before creating the PR.>

  • Breaking change?
    • Breaking change - Does this PR cause a break in build or boot behavior?
    • Examples: Does it add a new library class or move a module to a different repo.
  • Impacts security?
    • Security - Does this PR have a direct security impact?
    • Examples: Crypto algorithm change or buffer overflow fix.
  • Includes tests?
    • Tests - Does this PR include any explicit test code?
    • Examples: Unit tests or integration tests.

How This Was Tested

It was tested with Slim Bootloader on QEMU platform.

<Describe the test(s) that were run to verify the changes.>

Integration Instructions

<Describe how these changes should be integrated. Use N/A if nothing is required.>

Current implementation only supports serial port sub-node under
PCI root bridge node.

This enhancement support serial port node regardless it is under
root node or PCI root bridge node using a single FDT passing function.

Signed-off-by: Guo Dong <guo.dong@intel.com>
If there is no relocation in the payload it would build failure.
This will fix the build failure.

Signed-off-by: Guo Dong <guo.dong@intel.com>
IN VOID *Fdt,
IN INT32 SubNode,
IN UINT32 AddressCells,
IN UINT32 SizeCells
)
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It seems input SizeCells wasn't used in this function.
Can we remove it?

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