From b196cb317fe59614c6f98835a8f7fe7d3cb91a2a Mon Sep 17 00:00:00 2001 From: Linus Liu Date: Thu, 21 Nov 2024 22:37:48 -0800 Subject: [PATCH] UefiPayloadpkg Add Missing part back Add back reg attribute of pcirootbridge Signed-off-by: Linus Liu --- UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c b/UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c index ddee8209b394..6b21bd35c073 100644 --- a/UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c +++ b/UefiPayloadPkg/Library/BuildFdtLib/X86_BuildFdtLib.c @@ -671,6 +671,8 @@ BuildFdtForPciRootBridge ( RegTmp[1] = CpuToFdt32 (BusLimit); DEBUG ((DEBUG_INFO, "PciRootBridge->BusNumber %x, \n", BusNumber)); DEBUG ((DEBUG_INFO, "PciRootBridge->BusLimit %x, \n", BusLimit)); + ASSERT (PciRootBridgeInfo->RootBridge[Index].Bus.Base <= 0xFF); + ASSERT (PciRootBridgeInfo->RootBridge[Index].Bus.Limit <= 0xFF); Status = FdtSetProperty (Fdt, TempNode, "bus-range", &RegTmp, sizeof (RegTmp)); ASSERT_EFI_ERROR (Status); @@ -678,6 +680,12 @@ BuildFdtForPciRootBridge ( Data32 = CpuToFdt32 (2); Status = FdtSetProperty (Fdt, TempNode, "#size-cells", &Data32, sizeof (UINT32)); + Reg64Data[0] = CpuToFdt64 (PciExpressBaseAddress + LShiftU64 (PciRootBridgeInfo->RootBridge[Index].Bus.Base, 20)); + Reg64Data[1] = CpuToFdt64 (LShiftU64 (PciRootBridgeInfo->RootBridge[Index].Bus.Limit +1, 20)); + + Status = FdtSetProperty (Fdt, TempNode, "reg", &Reg64Data, sizeof (Reg64Data)); + ASSERT_EFI_ERROR (Status); + Data32 = CpuToFdt32 (3); Status = FdtSetProperty (Fdt, TempNode, "#address-cells", &Data32, sizeof (UINT32));