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tests: gateware: peripherals: Started adding the CPOL Low tests and s…
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…lowly working the kinks out
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lethalbit committed Nov 22, 2024
1 parent addc72c commit 0a24fed
Showing 1 changed file with 73 additions and 0 deletions.
73 changes: 73 additions & 0 deletions tests/gateware/peripherals/test_spi.py
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,79 @@ def test_spi_controller(self):
yield Settle()
yield

class SPIControllerCLKLowTests(ToriiTestCase):
dut: SPIController = SPIController
dut_args = {
'clk': clk, 'cipo': cipo, 'copi': copi, 'cs': cs, 'cpol': SPICPOL.LOW
}
platform = MockPlatform()

def send_recv(self, d_out, d_in, ovlp = False):
self.assertEqual((yield clk), 0)
yield self.dut.wdat.eq(d_out)
yield self.dut.xfr.eq(1)
yield Settle()
yield
self.assertEqual((yield clk), 0)
yield self.dut.xfr.eq(0)
yield Settle()
yield
self.assertEqual((yield clk), 0)
yield cipo.eq((d_in >> 6) & 1)
yield Settle()
yield
self.assertEqual((yield clk), 0)
self.assertEqual((yield copi), ((d_out >> 6) & 1))
yield Settle()
yield
for bit in range(1, 7):
self.assertEqual((yield clk), 1)
yield cipo.eq((d_in >> (7 - bit)) & 1)
yield Settle()
yield
self.assertEqual((yield clk), 0)
self.assertEqual((yield copi), ((d_out >> (7 - bit)) & 1))
yield Settle()
yield
self.assertEqual((yield clk), 1)
yield Settle()
yield
yield Settle()
yield
self.assertEqual((yield self.dut.done), 1)
if not ovlp:
yield Settle()
yield
self.assertEqual((yield clk), 1)
self.assertEqual((yield self.dut.done), 0)
self.assertEqual((yield self.dut.rdat), d_in)
yield Settle()

@ToriiTestCase.simulation
@ToriiTestCase.sync_domain(domain = 'sync')
def test_spi_controller(self):
yield
self.assertEqual((yield clk), 0)
yield self.dut.cs.eq(1)
yield Settle()
yield
yield from self.send_recv(0x0F, 0xF0)
yield
self.assertEqual((yield clk), 0)
yield self.dut.cs.eq(0)
yield Settle()
yield
self.assertEqual((yield clk), 0)
yield self.dut.cs.eq(1)
yield Settle()
yield
yield from self.send_recv(0xAA, 0x55, ovlp = True)
yield from self.send_recv(0x55, 0xAA, ovlp = False)
yield
yield self.dut.cs.eq(0)
yield Settle()
yield


class TestRegisters(Multiplexer):
def __init__(self, *, name: str | None = None) -> None:
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