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qca-linux-2.6.35.3-imx.patch
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qca-linux-2.6.35.3-imx.patch
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From 394afa6a13622e4948ca4fb47cb44bfe3f653aae Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Wed, 16 Nov 2011 10:10:15 -0500
Subject: [PATCH 01/15] add recommended workaround for FEC lockup issues;
---
linux-2.6.35.3/drivers/net/fec.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/linux-2.6.35.3/drivers/net/fec.c b/linux-2.6.35.3/drivers/net/fec.c
index d0e2e69..f1ddf8c 100644
--- a/linux-2.6.35.3/drivers/net/fec.c
+++ b/linux-2.6.35.3/drivers/net/fec.c
@@ -1405,9 +1405,11 @@ fec_stop(struct net_device *dev)
printk("fec_stop : Graceful transmit stop did not complete !\n");
}
+#if 0
/* Whack a reset. We should wait for this. */
writel(1, fep->hwp + FEC_ECNTRL);
udelay(10);
+#endif
#ifdef CONFIG_ARCH_MXS
/* Check MII or RMII */
--
1.7.4.1
From ffdc051f34c86212c8946377e95d6d87b80c5470 Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Thu, 17 Nov 2011 09:36:04 -0500
Subject: [PATCH 02/15] get the driver to a state where it can be loaded.
includes:
- minor cleanup (use SPI_{CPOL,CPHA} instead of magic numbers)
- reserve the I2C0_SDA pin for interrupt
- update the spi_mxs driver to support SPI mode 3
---
linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c | 44 ++++++++++++++++++++++
linux-2.6.35.3/drivers/spi/spi_mxs.c | 1 +
2 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c b/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
index 1990b92..0c30c38 100644
--- a/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
+++ b/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
@@ -164,6 +164,7 @@ static struct pin_desc mx28evk_fixed_pins[] = {
#endif
+#if 0
#if defined(CONFIG_I2C_MXS) || \
defined(CONFIG_I2C_MXS_MODULE)
{
@@ -183,6 +184,8 @@ static struct pin_desc mx28evk_fixed_pins[] = {
.drive = 1,
},
#endif
+#endif
+
#if defined(CONFIG_FB_MXS) || defined(CONFIG_FB_MXS_MODULE)
{
.name = "LCD_D00",
@@ -1106,6 +1109,15 @@ static struct pin_desc mx28evk_spi_pins[] = {
.voltage = PAD_3_3V,
.drive = 1,
},
+ {
+ .name = "ATHSPI INT",
+ .id = PINID_I2C0_SDA,
+ .fun = PIN_GPIO,
+ .strength = PAD_8MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
};
#endif
@@ -1229,3 +1241,35 @@ void __init mx28evk_pins_init(void)
ARRAY_SIZE(mx28evk_eth_pins));
#endif
}
+
+/*
+ * Qualcomm Atheros SPI interrupt configuration functions.
+ */
+
+int gpio_spi_intr_cfg(void)
+{
+
+#if 0
+ int status;
+
+ status = gpio_request(MXS_PIN_TO_GPIO(PINID_I2C0_SDA), "ATHEROS");
+ if (status)
+ return status;
+
+ status = gpio_direction_input(MXS_PIN_TO_GPIO(PINID_I2C0_SDA));
+ if (status)
+ return status;
+#endif
+
+ set_irq_type(gpio_to_irq(MXS_PIN_TO_GPIO(PINID_I2C0_SDA)), IRQ_TYPE_EDGE_RISING);
+
+ return 0;
+}
+
+int gpio_spi_intr_get_irq(void)
+{
+ return gpio_to_irq(MXS_PIN_TO_GPIO(PINID_I2C0_SDA));
+}
+
+EXPORT_SYMBOL(gpio_spi_intr_cfg);
+EXPORT_SYMBOL(gpio_spi_intr_get_irq);
diff --git a/linux-2.6.35.3/drivers/spi/spi_mxs.c b/linux-2.6.35.3/drivers/spi/spi_mxs.c
index c6e66fd..16c353c 100644
--- a/linux-2.6.35.3/drivers/spi/spi_mxs.c
+++ b/linux-2.6.35.3/drivers/spi/spi_mxs.c
@@ -559,6 +559,7 @@ static int __init mxs_spi_probe(struct platform_device *dev)
master->transfer = mxs_spi_transfer;
master->setup = mxs_spi_setup;
master->cleanup = mxs_spi_cleanup;
+ master->mode_bits = MODEBITS;
if (!request_mem_region(r->start,
resource_size(r), dev_name(&dev->dev))) {
--
1.7.4.1
From 4be64aa23cdd81c99152edc14b33d2ded982b342 Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Wed, 23 Nov 2011 13:40:02 -0500
Subject: [PATCH 03/15] re-enable promiscuous mode after link restart;
---
linux-2.6.35.3/drivers/net/fec.c | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/linux-2.6.35.3/drivers/net/fec.c b/linux-2.6.35.3/drivers/net/fec.c
index f1ddf8c..93de97a 100644
--- a/linux-2.6.35.3/drivers/net/fec.c
+++ b/linux-2.6.35.3/drivers/net/fec.c
@@ -1383,6 +1383,14 @@ fec_restart(struct net_device *dev, int duplex)
}
#endif
+ /* Re-enable promiscuous mode if needed. */
+ if (dev->flags & IFF_PROMISC) {
+ unsigned int tmp;
+ tmp = readl(fep->hwp + FEC_R_CNTRL);
+ tmp |= 0x8;
+ writel(tmp, fep->hwp + FEC_R_CNTRL);
+ }
+
/* And last, enable the transmit and receive processing */
reg |= 0x00000002;
writel(reg, fep->hwp + FEC_ECNTRL);
--
1.7.4.1
From 9375156f8aeb852b158395e5a16e4335aa5e5491 Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Wed, 23 Nov 2011 13:58:22 -0500
Subject: [PATCH 04/15] remove #if 0 block.
---
linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c | 13 -------------
1 files changed, 0 insertions(+), 13 deletions(-)
diff --git a/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c b/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
index 0c30c38..6f00afd 100644
--- a/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
+++ b/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
@@ -1248,19 +1248,6 @@ void __init mx28evk_pins_init(void)
int gpio_spi_intr_cfg(void)
{
-
-#if 0
- int status;
-
- status = gpio_request(MXS_PIN_TO_GPIO(PINID_I2C0_SDA), "ATHEROS");
- if (status)
- return status;
-
- status = gpio_direction_input(MXS_PIN_TO_GPIO(PINID_I2C0_SDA));
- if (status)
- return status;
-#endif
-
set_irq_type(gpio_to_irq(MXS_PIN_TO_GPIO(PINID_I2C0_SDA)), IRQ_TYPE_EDGE_RISING);
return 0;
--
1.7.4.1
From ad71754c427c202d15758296fbe6d44d023cab3a Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Mon, 28 Nov 2011 18:05:40 -0500
Subject: [PATCH 05/15] update .gitignore;
---
linux-2.6.35.3/arch/arm/boot/compressed/.gitignore | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/linux-2.6.35.3/arch/arm/boot/compressed/.gitignore b/linux-2.6.35.3/arch/arm/boot/compressed/.gitignore
index ab204db..c52a6dd 100644
--- a/linux-2.6.35.3/arch/arm/boot/compressed/.gitignore
+++ b/linux-2.6.35.3/arch/arm/boot/compressed/.gitignore
@@ -1,3 +1,6 @@
font.c
piggy.gz
vmlinux.lds
+lib1funcs.S
+piggy.gzip
+vmlinux
--
1.7.4.1
From bf2d097cd3d28fcf4eaf34d39b5291575eb8dad9 Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Fri, 2 Dec 2011 15:54:44 -0500
Subject: [PATCH 06/15] update link up/down fix for FEC;
---
linux-2.6.35.3/drivers/net/fec.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/linux-2.6.35.3/drivers/net/fec.c b/linux-2.6.35.3/drivers/net/fec.c
index 93de97a..7b2ad95 100644
--- a/linux-2.6.35.3/drivers/net/fec.c
+++ b/linux-2.6.35.3/drivers/net/fec.c
@@ -121,8 +121,10 @@
#if defined(CONFIG_FEC_1588) && defined(CONFIG_ARCH_MX28)
#define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII | \
FEC_ENET_TS_AVAIL | FEC_ENET_TS_TIMER)
+#define FEC_STOP_IMASK (FEC_ENET_MII)
#else
#define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII)
+#define FEC_STOP_IMASK (FEC_ENET_MII)
#endif
/* The FEC stores dest/src/type, data, and checksum for receive packets.
@@ -1413,11 +1415,11 @@ fec_stop(struct net_device *dev)
printk("fec_stop : Graceful transmit stop did not complete !\n");
}
-#if 0
/* Whack a reset. We should wait for this. */
writel(1, fep->hwp + FEC_ECNTRL);
udelay(10);
-#endif
+
+ writel(0x00000002, fep->hwp + FEC_ECNTRL);
#ifdef CONFIG_ARCH_MXS
/* Check MII or RMII */
@@ -1433,7 +1435,7 @@ fec_stop(struct net_device *dev)
writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
if (fep->ptimer_present)
fec_ptp_stop(fep->ptp_priv);
- writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
+ writel(FEC_STOP_IMASK, fep->hwp + FEC_IMASK);
netif_stop_queue(dev);
fep->link = 0;
--
1.7.4.1
From 261a1d89227c42e5dafee6390b41fc2f86c568b2 Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Fri, 2 Dec 2011 15:55:22 -0500
Subject: [PATCH 07/15] update FEC driver to copy the SKB if it needs to swap the data bytes;
---
linux-2.6.35.3/drivers/net/fec.c | 14 ++++++++++++++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/linux-2.6.35.3/drivers/net/fec.c b/linux-2.6.35.3/drivers/net/fec.c
index 7b2ad95..b980d70 100644
--- a/linux-2.6.35.3/drivers/net/fec.c
+++ b/linux-2.6.35.3/drivers/net/fec.c
@@ -277,6 +277,20 @@ fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
/* Clear all of the status flags */
status &= ~BD_ENET_TX_STATS;
+#ifdef CONFIG_ARCH_MXS
+{
+ /* make a copy of the skb if we need to swap the bytes */
+ struct sk_buff *tskb;
+ tskb = skb_copy(skb, GFP_ATOMIC);
+ if (tskb == NULL) {
+ spin_unlock_irqrestore(&fep->hw_lock, flags);
+ return NETDEV_TX_BUSY;
+ }
+ dev_kfree_skb(skb);
+ skb = tskb;
+}
+#endif
+
/* Set buffer length and buffer pointer */
bufaddr = skb->data;
bdp->cbd_datlen = skb->len;
--
1.7.4.1
From 2a187471d48cf100cce38802173cc2215215c217 Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Fri, 2 Dec 2011 18:39:15 -0500
Subject: [PATCH 08/15] use PIO for 4 byte or less transfers;
---
linux-2.6.35.3/drivers/spi/spi_mxs.c | 36 +++++++++++++++++++++++----------
1 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/linux-2.6.35.3/drivers/spi/spi_mxs.c b/linux-2.6.35.3/drivers/spi/spi_mxs.c
index 16c353c..1c36db9 100644
--- a/linux-2.6.35.3/drivers/spi/spi_mxs.c
+++ b/linux-2.6.35.3/drivers/spi/spi_mxs.c
@@ -157,13 +157,23 @@ static int mxs_spi_setup_transfer(struct spi_device *spi,
BF_SSP_TIMING_CLOCK_RATE(rate - 1),
ss->regs + HW_SSP_TIMING);
- __raw_writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
- BF_SSP_CTRL1_WORD_LENGTH
- (BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
- ((spi->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
- ((spi->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0) |
- (pio ? 0 : BM_SSP_CTRL1_DMA_ENABLE),
- ss->regs + HW_SSP_CTRL1);
+ if (pio || (t && t->len <= 4)) {
+ __raw_writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
+ BF_SSP_CTRL1_WORD_LENGTH
+ (BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
+ ((spi->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
+ ((spi->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0) |
+ 0,
+ ss->regs + HW_SSP_CTRL1);
+ } else {
+ __raw_writel(BF_SSP_CTRL1_SSP_MODE(BV_SSP_CTRL1_SSP_MODE__SPI) |
+ BF_SSP_CTRL1_WORD_LENGTH
+ (BV_SSP_CTRL1_WORD_LENGTH__EIGHT_BITS) |
+ ((spi->mode & SPI_CPOL) ? BM_SSP_CTRL1_POLARITY : 0) |
+ ((spi->mode & SPI_CPHA) ? BM_SSP_CTRL1_PHASE : 0) |
+ BM_SSP_CTRL1_DMA_ENABLE,
+ ss->regs + HW_SSP_CTRL1);
+ }
__raw_writel(0x00, ss->regs + HW_SSP_CMD0_SET);
@@ -397,12 +407,14 @@ static int mxs_spi_handle_message(struct mxs_spi *ss, struct spi_message *m)
here driver completely ignores setting of t->cs_change
*/
if (t->tx_buf) {
- status = pio ?
+ if (pio || t->len <= 4) {
mxs_spi_txrx_pio(ss, cs, (void *)t->tx_buf,
- t->len, &first, &last, 1) :
+ t->len, &first, &last, 1);
+ } else {
mxs_spi_txrx_dma(ss, cs, (void *)t->tx_buf,
t->tx_dma, t->len, &first, &last,
1);
+ }
if (debug) {
if (t->len < 0x10)
print_hex_dump_bytes("Tx ",
@@ -413,12 +425,14 @@ static int mxs_spi_handle_message(struct mxs_spi *ss, struct spi_message *m)
}
}
if (t->rx_buf) {
- status = pio ?
+ if (pio || t->len <= 4) {
mxs_spi_txrx_pio(ss, cs, t->rx_buf,
- t->len, &first, &last, 0) :
+ t->len, &first, &last, 0);
+ } else {
mxs_spi_txrx_dma(ss, cs, t->rx_buf,
t->rx_dma, t->len, &first, &last,
0);
+ }
if (debug) {
if (t->len < 0x10)
print_hex_dump_bytes("Rx ",
--
1.7.4.1
From 7d2cf6d0f755af4f223ca4531c68b2a43cdcd615 Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Wed, 7 Dec 2011 13:33:45 -0500
Subject: [PATCH 09/15] update PIN configuration for PL16 board;
---
linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c | 320 +++++++++++++---------
1 files changed, 186 insertions(+), 134 deletions(-)
diff --git a/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c b/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
index 6f00afd..7079be4 100644
--- a/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
+++ b/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
@@ -38,28 +38,6 @@ static struct pin_desc mx28evk_fixed_pins[] = {
.id = PINID_PWM1,
.fun = PIN_FUN3,
},
-#ifdef CONFIG_MXS_AUART0_DEVICE_ENABLE
- {
- .name = "AUART0.RX",
- .id = PINID_AUART0_RX,
- .fun = PIN_FUN1,
- },
- {
- .name = "AUART0.TX",
- .id = PINID_AUART0_TX,
- .fun = PIN_FUN1,
- },
- {
- .name = "AUART0.CTS",
- .id = PINID_AUART0_CTS,
- .fun = PIN_FUN1,
- },
- {
- .name = "AUART0.RTS",
- .id = PINID_AUART0_RTS,
- .fun = PIN_FUN1,
- },
-#endif
#ifdef CONFIG_MXS_AUART3_DEVICE_ENABLE
{
.name = "AUART3.RX",
@@ -164,7 +142,6 @@ static struct pin_desc mx28evk_fixed_pins[] = {
#endif
-#if 0
#if defined(CONFIG_I2C_MXS) || \
defined(CONFIG_I2C_MXS_MODULE)
{
@@ -175,15 +152,6 @@ static struct pin_desc mx28evk_fixed_pins[] = {
.voltage = PAD_3_3V,
.drive = 1,
},
- {
- .name = "I2C0_SDA",
- .id = PINID_I2C0_SDA,
- .fun = PIN_FUN1,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
-#endif
#endif
#if defined(CONFIG_FB_MXS) || defined(CONFIG_FB_MXS_MODULE)
@@ -244,14 +212,6 @@ static struct pin_desc mx28evk_fixed_pins[] = {
.drive = 1,
},
{
- .name = "LCD_D07",
- .id = PINID_LCD_D07,
- .fun = PIN_FUN1,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
.name = "LCD_D08",
.id = PINID_LCD_D08,
.fun = PIN_FUN1,
@@ -268,38 +228,6 @@ static struct pin_desc mx28evk_fixed_pins[] = {
.drive = 1,
},
{
- .name = "LCD_D10",
- .id = PINID_LCD_D10,
- .fun = PIN_FUN1,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
- .name = "LCD_D11",
- .id = PINID_LCD_D11,
- .fun = PIN_FUN1,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
- .name = "LCD_D12",
- .id = PINID_LCD_D12,
- .fun = PIN_FUN1,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
- .name = "LCD_D13",
- .id = PINID_LCD_D13,
- .fun = PIN_FUN1,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
.name = "LCD_D14",
.id = PINID_LCD_D14,
.fun = PIN_FUN1,
@@ -388,22 +316,6 @@ static struct pin_desc mx28evk_fixed_pins[] = {
.drive = 1,
},
{
- .name = "LCD_VSYNC",
- .id = PINID_LCD_RD_E,
- .fun = PIN_FUN2,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
- .name = "LCD_HSYNC",
- .id = PINID_LCD_WR_RWN,
- .fun = PIN_FUN2,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
.name = "LCD_ENABLE",
.id = PINID_LCD_CS,
.fun = PIN_FUN2,
@@ -412,14 +324,6 @@ static struct pin_desc mx28evk_fixed_pins[] = {
.drive = 1,
},
{
- .name = "LCD_DOTCLK",
- .id = PINID_LCD_RS,
- .fun = PIN_FUN2,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
.name = "LCD_BACKLIGHT",
.id = PINID_PWM2,
.fun = PIN_FUN1,
@@ -521,16 +425,6 @@ static struct pin_desc mx28evk_fixed_pins[] = {
.pull = 1,
},
{
- .name = "SSP0_DETECT",
- .id = PINID_SSP0_DETECT,
- .fun = PIN_FUN1,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .pullup = 0,
- .drive = 1,
- .pull = 0,
- },
- {
.name = "SSP0_SCK",
.id = PINID_SSP0_SCK,
.fun = PIN_FUN1,
@@ -888,16 +782,6 @@ static struct pin_desc mx28evk_ssp1_pins[] = {
.pull = 1,
},
{
- .name = "SSP1_DETECT",
- .id = PINID_GPMI_RDY0,
- .fun = PIN_FUN1,
- .strength = PAD_8MA,
- .voltage = PAD_3_3V,
- .pullup = 0,
- .drive = 1,
- .pull = 0,
- },
- {
.name = "SSP1_SCK",
.id = PINID_GPMI_WRN,
.fun = PIN_FUN2,
@@ -1011,15 +895,6 @@ static struct pin_desc mx28evk_gpmi_pins[] = {
.drive = !0
},
{
- .name = "GPMI RDY0",
- .id = PINID_GPMI_RDY0,
- .fun = PIN_FUN1,
- .strength = PAD_4MA,
- .voltage = PAD_3_3V,
- .pullup = 0,
- .drive = !0
- },
- {
.name = "GPMI RDY1",
.id = PINID_GPMI_RDY1,
.fun = PIN_FUN1,
@@ -1075,8 +950,8 @@ static struct pin_desc mx28evk_gpmi_pins[] = {
},
};
-#if defined(CONFIG_SPI_MXS) || defined(CONFIG_SPI_MXS_MODULE)
-static struct pin_desc mx28evk_spi_pins[] = {
+static struct pin_desc mx28evk_atheros_pins[] = {
+ /* SPI interface */
{
.name = "SSP2 MOSI",
.id = PINID_SSP2_MOSI,
@@ -1109,18 +984,197 @@ static struct pin_desc mx28evk_spi_pins[] = {
.voltage = PAD_3_3V,
.drive = 1,
},
+
+ /* QCA7000 interrupt lines */
{
- .name = "ATHSPI INT",
+ .name = "QCA7K_INT0",
.id = PINID_I2C0_SDA,
.fun = PIN_GPIO,
- .strength = PAD_8MA,
+ .strength = PAD_4MA,
.voltage = PAD_3_3V,
.drive = 1,
.output = 0,
},
-};
+ {
+ .name = "QCA7K_INT1",
+ .id = PINID_GPMI_RDY0,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+ {
+ .name = "QCA7K_INT2",
+ .id = PINID_SSP0_DETECT,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+
+ /* QCA7000 Reset */
+ {
+ .name = "QCA7K_RESET",
+ .id = PINID_LCD_D13,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+
+ /* QCA7000 GPIOs */
+ {
+ .name = "QCA7K_GPIO_0",
+ .id = PINID_LCD_WR_RWN,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+ {
+ .name = "QCA7K_GPIO_1",
+ .id = PINID_LCD_VSYNC,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+ {
+ .name = "QCA7K_GPIO_2",
+ .id = PINID_LCD_HSYNC,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+ {
+ .name = "QCA7K_GPIO_3",
+ .id = PINID_LCD_DOTCK,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+
+ /* QCA7000 UART interface */
+#if 0
+ {
+ .name = "AUART0.RX",
+ .id = PINID_AUART0_RX,
+ .fun = PIN_FUN1,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ },
+ {
+ .name = "AUART0.TX",
+ .id = PINID_AUART0_TX,
+ .fun = PIN_FUN1,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ },
+ {
+ .name = "AUART0.CTS",
+ .id = PINID_AUART0_CTS,
+ .fun = PIN_FUN1,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ },
+ {
+ .name = "AUART0.RTS",
+ .id = PINID_AUART0_RTS,
+ .fun = PIN_FUN1,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ },
+#else
+ {
+ .name = "AUART0.RX",
+ .id = PINID_AUART0_RX,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0
+ },
+ {
+ .name = "AUART0.TX",
+ .id = PINID_AUART0_TX,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0
+ },
+ {
+ .name = "AUART0.CTS",
+ .id = PINID_AUART0_CTS,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0
+ },
+ {
+ .name = "AUART0.RTS",
+ .id = PINID_AUART0_RTS,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0
+ },
#endif
+ /* Configuration SW13 */
+ {
+ .name = "SW13 0",
+ .id = PINID_LCD_D07,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+ {
+ .name = "SW13 1",
+ .id = PINID_LCD_D10,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+ {
+ .name = "SW13 2",
+ .id = PINID_LCD_D11,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+ {
+ .name = "SW13 3",
+ .id = PINID_LCD_D12,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ },
+};
+
#if defined(CONFIG_FEC) || defined(CONFIG_FEC_MODULE)\
|| defined(CONFIG_FEC_L2SWITCH)
int mx28evk_enet_gpio_init(void)
@@ -1230,10 +1284,8 @@ void __init mx28evk_pins_init(void)
ARRAY_SIZE(mx28evk_gpmi_pins));
}
-#if defined(CONFIG_SPI_MXS) || defined(CONFIG_SPI_MXS_MODULE)
- mx28evk_init_pin_group(mx28evk_spi_pins,
- ARRAY_SIZE(mx28evk_spi_pins));
-#endif
+ mx28evk_init_pin_group(mx28evk_atheros_pins,
+ ARRAY_SIZE(mx28evk_atheros_pins));
#if defined(CONFIG_FEC) || defined(CONFIG_FEC_MODULE)\
|| defined(CONFIG_FEC_L2SWITCH)
--
1.7.4.1
From dcf6c3b46b945c02b529a079277070d872419bd7 Mon Sep 17 00:00:00 2001
From: Nathaniel Houghton <nhoughto@qca.qualcomm.com>
Date: Mon, 12 Dec 2011 10:08:36 -0500
Subject: [PATCH 10/15] update pin configuration;
---
linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c | 213 ++++++++++++----------
1 files changed, 119 insertions(+), 94 deletions(-)
diff --git a/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c b/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
index 7079be4..1476768 100644
--- a/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
+++ b/linux-2.6.35.3/arch/arm/mach-mx28/mx28evk_pins.c
@@ -950,8 +950,8 @@ static struct pin_desc mx28evk_gpmi_pins[] = {
},
};
-static struct pin_desc mx28evk_atheros_pins[] = {
- /* SPI interface */
+/* QCA7000 SPI pins */
+static struct pin_desc mx28evk_atheros_pins_spi[] = {
{
.name = "SSP2 MOSI",
.id = PINID_SSP2_MOSI,
@@ -985,6 +985,57 @@ static struct pin_desc mx28evk_atheros_pins[] = {
.drive = 1,
},
+ /* QCA7000 Reset */
+ {
+ .name = "QCA7K_RESET",
+ .id = PINID_LCD_D13,
+ .fun = PIN_GPIO,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ .output = 0,
+ .data = 1,
+ },
+};
+
+/* QCA7000 UART pins */
+static struct pin_desc mx28evk_atheros_pins_uart[] = {
+ {
+ .name = "AUART0.RX",
+ .id = PINID_AUART0_RX,
+ .fun = PIN_FUN1,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ },
+ {
+ .name = "AUART0.TX",
+ .id = PINID_AUART0_TX,
+ .fun = PIN_FUN1,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ },
+ {
+ .name = "AUART0.CTS",
+ .id = PINID_AUART0_CTS,
+ .fun = PIN_FUN1,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ },
+ {
+ .name = "AUART0.RTS",
+ .id = PINID_AUART0_RTS,
+ .fun = PIN_FUN1,
+ .strength = PAD_4MA,
+ .voltage = PAD_3_3V,
+ .drive = 1,
+ },
+};
+
+/* Input pins (SPI interrupts, SW13, GPIOs) */
+static struct pin_desc mx28evk_atheros_pins[] = {
/* QCA7000 interrupt lines */
{
.name = "QCA7K_INT0",
@@ -1014,17 +1065,6 @@ static struct pin_desc mx28evk_atheros_pins[] = {
.output = 0,
},
- /* QCA7000 Reset */
- {
- .name = "QCA7K_RESET",
- .id = PINID_LCD_D13,
- .fun = PIN_GPIO,
- .strength = PAD_4MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- .output = 0,
- },
-
/* QCA7000 GPIOs */
{
.name = "QCA7K_GPIO_0",
@@ -1037,7 +1077,7 @@ static struct pin_desc mx28evk_atheros_pins[] = {
},
{
.name = "QCA7K_GPIO_1",
- .id = PINID_LCD_VSYNC,
+ .id = PINID_LCD_HSYNC,
.fun = PIN_GPIO,
.strength = PAD_4MA,
.voltage = PAD_3_3V,
@@ -1046,7 +1086,7 @@ static struct pin_desc mx28evk_atheros_pins[] = {
},
{
.name = "QCA7K_GPIO_2",
- .id = PINID_LCD_HSYNC,
+ .id = PINID_LCD_VSYNC,
.fun = PIN_GPIO,
.strength = PAD_4MA,
.voltage = PAD_3_3V,
@@ -1063,79 +1103,6 @@ static struct pin_desc mx28evk_atheros_pins[] = {
.output = 0,
},
- /* QCA7000 UART interface */
-#if 0
- {
- .name = "AUART0.RX",
- .id = PINID_AUART0_RX,
- .fun = PIN_FUN1,
- .strength = PAD_4MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
- .name = "AUART0.TX",
- .id = PINID_AUART0_TX,
- .fun = PIN_FUN1,
- .strength = PAD_4MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
- .name = "AUART0.CTS",
- .id = PINID_AUART0_CTS,
- .fun = PIN_FUN1,
- .strength = PAD_4MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
- {
- .name = "AUART0.RTS",
- .id = PINID_AUART0_RTS,
- .fun = PIN_FUN1,
- .strength = PAD_4MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- },
-#else
- {
- .name = "AUART0.RX",
- .id = PINID_AUART0_RX,
- .fun = PIN_GPIO,
- .strength = PAD_4MA,
- .voltage = PAD_3_3V,
- .drive = 1,
- .output = 0
- },
- {