From 01ab255e14b1a797d2d0bc9e3a7b8b71c0fbdd41 Mon Sep 17 00:00:00 2001 From: Anna Wojdylo Date: Mon, 23 Sep 2024 14:34:10 +0200 Subject: [PATCH] doc: flpr and building for nrf54l15 Adds building article Adds FLPR intro Signed-off-by: Anna Wojdylo --- .../device_guides/nrf54l/building_nrf54l.rst | 138 ++++++++++++++++++ .../app_dev/device_guides/nrf54l/index.rst | 2 + .../app_dev/device_guides/nrf54l/vpr_flpr.rst | 43 ++++++ doc/nrf/links.txt | 1 + 4 files changed, 184 insertions(+) create mode 100644 doc/nrf/app_dev/device_guides/nrf54l/building_nrf54l.rst create mode 100644 doc/nrf/app_dev/device_guides/nrf54l/vpr_flpr.rst diff --git a/doc/nrf/app_dev/device_guides/nrf54l/building_nrf54l.rst b/doc/nrf/app_dev/device_guides/nrf54l/building_nrf54l.rst new file mode 100644 index 000000000000..13c8c60288e7 --- /dev/null +++ b/doc/nrf/app_dev/device_guides/nrf54l/building_nrf54l.rst @@ -0,0 +1,138 @@ +.. _building_nrf54l: + +Building and programming with nRF54L15 DK +######################################### + +.. contents:: + :local: + :depth: 2 + +This guide provides instructions on how to build and program the nRF54L15 development kit. +Whether you are working with single or multi-image builds, the following sections will guide you through the necessary steps. + +Depending on the sample, you must program only the application core or both the Fast Lightweight Peripheral Processor (FLPR) and the application core. +Additionally, the process will differ based on whether you are working with a single-image or multi-image build. + +.. note:: + The following instructions do not include multi-image single-core builds scenario. + +Building for the application core only +************************************** + +Building for the application core only follows the default building process for the |NCS|. +For instructions, see how the :ref:`building` page. + +.. _building_nrf54l_app_flpr_core: + +Building for the application and FLPR core +****************************************** + +Building for both the application and the FLPR cores is different from the default |NCS| procedure. +Using the FLPR core also requires additional configuration to enable it. +This section outlines how to build and program for both the application and FLPR core, covering separate builds and sysbuild configurations. +The FLPR core supports two variants: + +* ``nrf54l15dk/nrf54l15/cpuflpr``, where FLPR runs from SRAM, which is the recommended method. + To build FLPR image with this variant, the application core image must include the ``nordic-flpr`` :ref:`snippet `. + +* ``nrf54l15dk/nrf54l15/cpuflpr/xip``, where FLPR runs from RRAM. + To build FLPR image with this variant, the application core image must include the ``nordic-flpr-xip`` snippet. + +Standard build +-------------- + +This subsection focuses on how to build an application using :ref:`sysbuild `. + +.. note:: + Currently, the documentation does not cover specific instructions for building an application image that uses sysbuild to incorporate the FLPR core as a sub-image. + The only documented scenario is for building FLPR as the main image and the application as a sub-image. + +Complete the following steps: + +.. tabs:: + + .. group-tab:: Using minimal sample for VPR bootstrapping + + This option automatically programs the FLPR core with :ref:`dedicated bootstrapping firmware `. + + To build and flash both images, run the following command that performs a :ref:`pristine build `: + + .. code-block:: console + + west build -p -b nrf54l15dk/nrf54l15/cpuflpr + west flash + + .. group-tab:: Using application that supports multi-image builds + + If your application involves creating custom images for both the application core and the FLPR core, make sure to disable the VPR bootstrapping sample. + You can do this by disabling the ``SB_CONFIG_VPR_LAUNCHER`` option when building for the FLPR target. + For more details, see :ref:`how to configure Kconfig `. + + To build and flash both images, run the following command that performs a :ref:`pristine build `: + + .. code-block:: console + + west build -p -b nrf54l15dk/nrf54l15/cpuflpr -- -DSB_CONFIG_VPR_LAUNCHER=n + west flash + +Separate images +--------------- + +You can build and program application sample and the FLPR sample as separate images using the |nRFVSC| or command line. +To use nRF Util, see `Programming application firmware on the nRF54L15 SoC`_. +Depending on the selected method, complete the following steps: + +.. tabs:: + + .. group-tab:: nRF Connect for VS Code + + .. note:: + + The |nRFVSC| currently offers experimental support for the nRF54L15's FLPR core. + Certain features, particularly debugging, may not function as expected. + + .. include:: /includes/vsc_build_and_run.txt + + 3. Build the application image by setting the following options: + + * Board target to ``nrf54l15dk/nrf54l15/cpuapp``. + * Choose either ``nordic-flpr`` or ``nordic-flpr-xip`` snippet depending on the FLPR image target. + * System build to :guilabel:`No sysbuild`. + + For more information, see :ref:`cmake_options`. + + #. Build the FLPR image by setting the following options: + + * Board target to ``nrf54l15dk/nrf54l15/cpuflpr`` (recommended) or ``nrf54l15dk/nrf54l15/cpuflpr/xip``. + * System build to :guilabel:`No sysbuild`. + + For more information, see :ref:`cmake_options`. + + .. group-tab:: Command line + + 1. |open_terminal_window_with_environment| + #. Build the application core image, and based on your build target include the appropriate snippet: + + .. code-block:: console + + west build -p -b nrf54l15dk/nrf54l15/cpuapp -S nordic-flpr --no-sysbuild + + #. Program the application core image by running the `west flash` command :ref:`without --erase `. + + .. code-block:: console + + west flash + + #. Build the FLPR core image: + + .. code-block:: console + + west build -p -b nrf54l15dk/nrf54l15/cpuflpr --no-sysbuild + + You can also customize the command for additional options, by adding :ref:`build parameters `. + + #. Once you have successfully built the FLPR core image, program it by running the `west flash` command :ref:`without --erase `. + + .. code-block:: console + + west flash diff --git a/doc/nrf/app_dev/device_guides/nrf54l/index.rst b/doc/nrf/app_dev/device_guides/nrf54l/index.rst index 44e8bfa0e6b9..fe966e449005 100644 --- a/doc/nrf/app_dev/device_guides/nrf54l/index.rst +++ b/doc/nrf/app_dev/device_guides/nrf54l/index.rst @@ -50,4 +50,6 @@ Ensure to check the revision of your nRF54L15 device to see if it is supported: zms cryptography testing_dfu + vpr_flpr + building_nrf54l snippets diff --git a/doc/nrf/app_dev/device_guides/nrf54l/vpr_flpr.rst b/doc/nrf/app_dev/device_guides/nrf54l/vpr_flpr.rst new file mode 100644 index 000000000000..4d46a21b6da1 --- /dev/null +++ b/doc/nrf/app_dev/device_guides/nrf54l/vpr_flpr.rst @@ -0,0 +1,43 @@ +.. _vpr_flpr_nrf54l: + +Working with the FLPR core +########################## + +.. contents:: + :local: + :depth: 2 + +The nRF54L15 SoC has a dedicated VPR CPU (RISC-V architecture), named *fast lightweight peripheral processor* (FLPR). +The following peripherals are available for use with the FLPR core, and can be accessed through the appropriate Zephyr Device Driver API: + +* GPIO +* GPIOTE +* GRTC +* TWIM +* UARTE +* VPR + +.. _vpr_flpr_nrf54l15_initiating: + +Using FLPR with Zephyr multithreaded mode +***************************************** + +FLPR can function as a generic core, operating under the full Zephyr kernel. +In this configuration, building the FLPR target is similar to the application core. +However, the application core build must incorporate an overlay that enables the FLPR core. + +Bootstrapping the FLPR core +=========================== + +The |NCS| provides a FLPR snippet that adds an overlay required for bootstrapping the FLPR core. +Snippet's primary function is to enable the code that transfers the FLPR code to the designated region (if necessary) and to initiate the FLPR core. + +When building for the ``nrf54l15dk/nrf54l15/cpuflpr`` target, a minimal sample is automatically loaded onto the application core. +See more information on :ref:`building_nrf54l_app_flpr_core`. + +Memory allocation +***************** + +If a FLPR CPU is running, it can lead to increased latency when accessing ``RAM_01``. +Because of this, when FLPR is used in a project, you should utilize ``RAM_01`` to store only the FLPR code, FLPR data, and the application CPU's non-time-sensitive information. +Conversely, you should use ``RAM_00`` to store data with strict access time requirements such as DMA buffers, and the application CPU data used in low-latency ISRs. diff --git a/doc/nrf/links.txt b/doc/nrf/links.txt index f6976cbd1e38..1f306bbc4ed0 100644 --- a/doc/nrf/links.txt +++ b/doc/nrf/links.txt @@ -815,6 +815,7 @@ .. _`nrfutil-trace`: https://docs.nordicsemi.com/bundle/nrfutil/page/nrfutil-trace/CHANGELOG.html .. _`nRF Sniffer for Bluetooth LE`: https://docs.nordicsemi.com/bundle/nrfutil/page/nrfutil-ble-sniffer/guides/overview.html .. _`Device command overview`: https://docs.nordicsemi.com/bundle/nrfutil/page/nrfutil-device/guides/programming.html +.. _`Programming application firmware on the nRF54L15 SoC`: https://docs.nordicsemi.com/bundle/nrfutil/page/nrfutil-device/guides/programming_nrf54L15.html .. _`anomaly 19`: https://docs.nordicsemi.com/bundle/errata_nRF5340_EngA/page/ERR/nRF5340/EngineeringA/latest/anomaly_340_19.html