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ptx-sample.rkt
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ptx-sample.rkt
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#lang racket
(provide (all-defined-out))
(define ptx-register-def
#<<string-delimiter
.entry main$_omp_fn$0 (.param.u64 %in_ar0)
{
.reg.u64 %ar0;
.reg.u32 %r23;
.reg.u64 %r24;
.reg.u64 %r26;
.reg.pred %r27;
.reg.pred %r28;
.reg.pred %r29;
.reg.u32 %r30;
}
string-delimiter
)
(define ptx-register-def-out
'(kernel
"main$_omp_fn$0"
(storage ".param" ".u64" "%in_ar0")
(storageN ".reg" ".u64" "%ar0")
(storageN ".reg" ".u32" "%r23")
(storageN ".reg" ".u64" "%r24")
(storageN ".reg" ".u64" "%r26")
(storageN ".reg" ".pred" "%r27")
(storageN ".reg" ".pred" "%r28")
(storageN ".reg" ".pred" "%r29")
(storageN ".reg" ".u32" "%r30"))
)
(define ptx-sample1
#<<string-delimiter
.entry main$_omp_fn$1 (.param.u64 %in_ar0)
{
.reg.u64 %ar0;
ld.param.u64 %ar0, [%in_ar0];
.reg.u64 %r22;
.reg.u32 %r23;
.reg.f64 %r24;
.reg.u64 %r25;
.reg.u64 %r26;
.reg.u64 %r30;
.reg.f64 %r31;
.reg.f64 %r32;
.reg.u64 %r33;
.reg.pred %r34;
.reg.pred %r35;
.reg.pred %r36;
{
.reg.u32 %x;
mov.u32 %x, %tid.x;
setp.ne.u32 %r36, %x, 0;
}
@%r36 bra $L13;
mov.u64 %r30, %ar0;
ld.u64 %r22, [%r30];
mov.u32 %r23, 10000;
mov.f64 %r24, 0d0000000000000000;
bra $L8;
$L9:
mov.u64 %r25, %r26;
mov.b64 %r32, %r26;
add.f64 %r31, %r24, %r32;
mov.b64 %r33, %r31;
atom.cas.b64 %r26, [%r22], %r26, %r33;
setp.ne.u64 %r34, %r25, %r26;
@%r34 bra $L9;
$L13:
bra $L12;
$L8:
add.f64 %r24, %r24, 0d3ff0000000000000;
add.u32 %r23, %r23, -1;
setp.ne.u32 %r35, %r23, 0;
@%r35 bra $L8;
mov.u64 %r26, 0;
bra $L9;
$L12:
ret;
}
string-delimiter
)
(define ptx-sample1-out
'(kernel
"main$_omp_fn$1"
(storage ".param" ".u64" "%in_ar0")
(storageN ".reg" ".u64" "%ar0")
(instruction "ld" ".param" ".u64" "%ar0" "[%in_ar0]")
(storageN ".reg" ".u64" "%r22")
(storageN ".reg" ".u32" "%r23")
(storageN ".reg" ".f64" "%r24")
(storageN ".reg" ".u64" "%r25")
(storageN ".reg" ".u64" "%r26")
(storageN ".reg" ".u64" "%r30")
(storageN ".reg" ".f64" "%r31")
(storageN ".reg" ".f64" "%r32")
(storageN ".reg" ".u64" "%r33")
(storageN ".reg" ".pred" "%r34")
(storageN ".reg" ".pred" "%r35")
(storageN ".reg" ".pred" "%r36")
(group
(storageN ".reg" ".u32" "%x")
(instruction "mov" ".u32" "%x" "%tid.x")
(instruction "setp" ".ne" ".u32" "%r36" "%x" "0"))
"@%r36"
(instruction "bra" "$L13")
(instruction "mov" ".u64" "%r30" "%ar0")
(instruction "ld" ".u64" "%r22" "[%r30]")
(instruction "mov" ".u32" "%r23" "10000")
(instruction "mov" ".f64" "%r24" "0d0000000000000000")
(instruction "bra" "$L8")
"$L9:"
(instruction "mov" ".u64" "%r25" "%r26")
(instruction "mov" ".b64" "%r32" "%r26")
(instruction "add" ".f64" "%r31" "%r24" "%r32")
(instruction "mov" ".b64" "%r33" "%r31")
(instruction "atom" ".cas" ".b64" "%r26" "[%r22]" "%r26" "%r33")
(instruction "setp" ".ne" ".u64" "%r34" "%r25" "%r26")
"@%r34"
(instruction "bra" "$L9")
"$L13:"
(instruction "bra" "$L12")
"$L8:"
(instruction "add" ".f64" "%r24" "%r24" "0d3ff0000000000000")
(instruction "add" ".u32" "%r23" "%r23" "-1")
(instruction "setp" ".ne" ".u32" "%r35" "%r23" "0")
"@%r35"
(instruction "bra" "$L8")
(instruction "mov" ".u64" "%r26" "0")
(instruction "bra" "$L9")
"$L12:"
(instruction "ret"))
)
(define ptx-sample2
#<<string-delimiter
.version 7.2
.target sm_70
.address_size 64
.extern .shared .align 8 .b8 S18_main_17_gpu[];
.visible .entry main_11_gpu(
.param .u64 main_11_gpu_param_0
)
.maxntid 128, 1, 1
{
.reg .pred %p<6>;
.reg .b32 %r<19>;
.reg .b64 %rd<14>;
.loc 1 11 0
Lfunc_begin0:
.loc 1 11 0
ld.param.u64 %rd2, [main_11_gpu_param_0];
mov.u32 %r18, %tid.x;
add.s32 %r17, %r18, -9999;
mov.u32 %r16, 9616;
cvta.to.global.u64 %rd1, %rd2;
bra.uni LBB0_1;
LBB0_11:
Ltmp0:
.loc 1 15 1
add.s32 %r18, %r18, 512;
add.s32 %r16, %r16, -512;
add.s32 %r17, %r7, 128;
LBB0_1:
.loc 1 14 1
setp.gt.s32 %p1, %r17, 0;
@%p1 bra LBB0_3;
.loc 1 15 1
mul.wide.s32 %rd3, %r18, 4;
add.s64 %rd4, %rd1, %rd3;
st.global.u32 [%rd4], %r18;
LBB0_3:
add.s32 %r12, %r17, 128;
.loc 1 14 1
setp.gt.s32 %p2, %r12, 0;
@%p2 bra LBB0_5;
.loc 1 15 1
mul.wide.s32 %rd5, %r18, 4;
add.s64 %rd7, %rd1, %rd5;
add.s32 %r13, %r18, 128;
st.global.u32 [%rd7+512], %r13;
LBB0_5:
.loc 1 14 1
add.s32 %r6, %r17, 256;
setp.gt.s32 %p3, %r6, 0;
@%p3 bra LBB0_7;
.loc 1 15 1
mul.wide.s32 %rd9, %r18, 4;
add.s64 %rd10, %rd1, %rd9;
add.s32 %r14, %r17, 10255;
st.global.u32 [%rd10+1024], %r14;
LBB0_7:
.loc 1 14 1
setp.gt.s32 %p4, %r16, 0;
@%p4 bra LBB0_9;
bra.uni LBB0_8;
LBB0_9:
add.s32 %r7, %r6, 128;
setp.gt.s32 %p5, %r7, 0;
@%p5 bra LBB0_11;
.loc 1 15 1
mul.wide.s32 %rd12, %r18, 4;
add.s64 %rd13, %rd1, %rd12;
add.s32 %r15, %r17, 10383;
st.global.u32 [%rd13+1536], %r15;
bra.uni LBB0_11;
LBB0_8:
.loc 1 14 1
ret;
Ltmp1:
Lfunc_end0:
}
.visible .entry main_17_gpu(
.param .u64 main_17_gpu_param_0
)
.maxntid 128, 1, 1
{
.reg .pred %p<83>;
.reg .b32 %r<90>;
.reg .f64 %fd<164>;
.reg .b64 %rd<12>;
.loc 1 17 0
Lfunc_begin1:
.loc 1 17 0
.loc 1 19 1
mov.u32 %r1, %tid.x;
add.s32 %r5, %r1, -9999;
mov.u64 %rd4, S18_main_17_gpu;
cvta.shared.u64 %rd5, %rd4;
setp.gt.s32 %p1, %r5, 0;
selp.f64 %fd1, 0d0000000000000000, 0d3FF0000000000000, %p1;
.loc 1 20 1
add.s32 %r6, %r1, -9871;
.loc 1 19 1
setp.gt.s32 %p2, %r6, 0;
.loc 1 20 1
add.f64 %fd2, %fd1, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd3, %fd1, %fd2, %p2;
.loc 1 20 1
add.s32 %r7, %r1, -9743;
.loc 1 19 1
setp.gt.s32 %p3, %r7, 0;
.loc 1 20 1
add.f64 %fd4, %fd3, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd5, %fd3, %fd4, %p3;
.loc 1 20 1
add.s32 %r8, %r1, -9615;
.loc 1 19 1
setp.gt.s32 %p4, %r8, 0;
.loc 1 20 1
add.f64 %fd6, %fd5, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd7, %fd5, %fd6, %p4;
.loc 1 20 1
add.s32 %r9, %r1, -9487;
.loc 1 19 1
setp.gt.s32 %p5, %r9, 0;
.loc 1 20 1
add.f64 %fd8, %fd7, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd9, %fd7, %fd8, %p5;
.loc 1 20 1
add.s32 %r10, %r1, -9359;
.loc 1 19 1
setp.gt.s32 %p6, %r10, 0;
.loc 1 20 1
add.f64 %fd10, %fd9, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd11, %fd9, %fd10, %p6;
.loc 1 20 1
add.s32 %r11, %r1, -9231;
.loc 1 19 1
setp.gt.s32 %p7, %r11, 0;
.loc 1 20 1
add.f64 %fd12, %fd11, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd13, %fd11, %fd12, %p7;
.loc 1 20 1
add.s32 %r12, %r1, -9103;
.loc 1 19 1
setp.gt.s32 %p8, %r12, 0;
.loc 1 20 1
add.f64 %fd14, %fd13, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd15, %fd13, %fd14, %p8;
.loc 1 20 1
add.s32 %r13, %r1, -8975;
.loc 1 19 1
setp.gt.s32 %p9, %r13, 0;
.loc 1 20 1
add.f64 %fd16, %fd15, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd17, %fd15, %fd16, %p9;
.loc 1 20 1
add.s32 %r14, %r1, -8847;
.loc 1 19 1
setp.gt.s32 %p10, %r14, 0;
.loc 1 20 1
add.f64 %fd18, %fd17, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd19, %fd17, %fd18, %p10;
.loc 1 20 1
add.s32 %r15, %r1, -8719;
.loc 1 19 1
setp.gt.s32 %p11, %r15, 0;
.loc 1 20 1
add.f64 %fd20, %fd19, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd21, %fd19, %fd20, %p11;
.loc 1 20 1
add.s32 %r16, %r1, -8591;
.loc 1 19 1
setp.gt.s32 %p12, %r16, 0;
.loc 1 20 1
add.f64 %fd22, %fd21, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd23, %fd21, %fd22, %p12;
.loc 1 20 1
add.s32 %r17, %r1, -8463;
.loc 1 19 1
setp.gt.s32 %p13, %r17, 0;
.loc 1 20 1
add.f64 %fd24, %fd23, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd25, %fd23, %fd24, %p13;
.loc 1 20 1
add.s32 %r18, %r1, -8335;
.loc 1 19 1
setp.gt.s32 %p14, %r18, 0;
.loc 1 20 1
add.f64 %fd26, %fd25, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd27, %fd25, %fd26, %p14;
.loc 1 20 1
add.s32 %r19, %r1, -8207;
.loc 1 19 1
setp.gt.s32 %p15, %r19, 0;
.loc 1 20 1
add.f64 %fd28, %fd27, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd29, %fd27, %fd28, %p15;
.loc 1 20 1
add.s32 %r20, %r1, -8079;
.loc 1 19 1
setp.gt.s32 %p16, %r20, 0;
.loc 1 20 1
add.f64 %fd30, %fd29, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd31, %fd29, %fd30, %p16;
.loc 1 20 1
add.s32 %r21, %r1, -7951;
.loc 1 19 1
setp.gt.s32 %p17, %r21, 0;
.loc 1 20 1
add.f64 %fd32, %fd31, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd33, %fd31, %fd32, %p17;
.loc 1 20 1
add.s32 %r22, %r1, -7823;
.loc 1 19 1
setp.gt.s32 %p18, %r22, 0;
.loc 1 20 1
add.f64 %fd34, %fd33, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd35, %fd33, %fd34, %p18;
.loc 1 20 1
add.s32 %r23, %r1, -7695;
.loc 1 19 1
setp.gt.s32 %p19, %r23, 0;
.loc 1 20 1
add.f64 %fd36, %fd35, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd37, %fd35, %fd36, %p19;
.loc 1 20 1
add.s32 %r24, %r1, -7567;
.loc 1 19 1
setp.gt.s32 %p20, %r24, 0;
.loc 1 20 1
add.f64 %fd38, %fd37, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd39, %fd37, %fd38, %p20;
.loc 1 20 1
add.s32 %r25, %r1, -7439;
.loc 1 19 1
setp.gt.s32 %p21, %r25, 0;
.loc 1 20 1
add.f64 %fd40, %fd39, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd41, %fd39, %fd40, %p21;
.loc 1 20 1
add.s32 %r26, %r1, -7311;
.loc 1 19 1
setp.gt.s32 %p22, %r26, 0;
.loc 1 20 1
add.f64 %fd42, %fd41, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd43, %fd41, %fd42, %p22;
.loc 1 20 1
add.s32 %r27, %r1, -7183;
.loc 1 19 1
setp.gt.s32 %p23, %r27, 0;
.loc 1 20 1
add.f64 %fd44, %fd43, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd45, %fd43, %fd44, %p23;
.loc 1 20 1
add.s32 %r28, %r1, -7055;
.loc 1 19 1
setp.gt.s32 %p24, %r28, 0;
.loc 1 20 1
add.f64 %fd46, %fd45, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd47, %fd45, %fd46, %p24;
.loc 1 20 1
add.s32 %r29, %r1, -6927;
.loc 1 19 1
setp.gt.s32 %p25, %r29, 0;
.loc 1 20 1
add.f64 %fd48, %fd47, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd49, %fd47, %fd48, %p25;
.loc 1 20 1
add.s32 %r30, %r1, -6799;
.loc 1 19 1
setp.gt.s32 %p26, %r30, 0;
.loc 1 20 1
add.f64 %fd50, %fd49, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd51, %fd49, %fd50, %p26;
.loc 1 20 1
add.s32 %r31, %r1, -6671;
.loc 1 19 1
setp.gt.s32 %p27, %r31, 0;
.loc 1 20 1
add.f64 %fd52, %fd51, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd53, %fd51, %fd52, %p27;
.loc 1 20 1
add.s32 %r32, %r1, -6543;
.loc 1 19 1
setp.gt.s32 %p28, %r32, 0;
.loc 1 20 1
add.f64 %fd54, %fd53, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd55, %fd53, %fd54, %p28;
.loc 1 20 1
add.s32 %r33, %r1, -6415;
.loc 1 19 1
setp.gt.s32 %p29, %r33, 0;
.loc 1 20 1
add.f64 %fd56, %fd55, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd57, %fd55, %fd56, %p29;
.loc 1 20 1
add.s32 %r34, %r1, -6287;
.loc 1 19 1
setp.gt.s32 %p30, %r34, 0;
.loc 1 20 1
add.f64 %fd58, %fd57, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd59, %fd57, %fd58, %p30;
.loc 1 20 1
add.s32 %r35, %r1, -6159;
.loc 1 19 1
setp.gt.s32 %p31, %r35, 0;
.loc 1 20 1
add.f64 %fd60, %fd59, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd61, %fd59, %fd60, %p31;
.loc 1 20 1
add.s32 %r36, %r1, -6031;
.loc 1 19 1
setp.gt.s32 %p32, %r36, 0;
.loc 1 20 1
add.f64 %fd62, %fd61, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd63, %fd61, %fd62, %p32;
.loc 1 20 1
add.s32 %r37, %r1, -5903;
.loc 1 19 1
setp.gt.s32 %p33, %r37, 0;
.loc 1 20 1
add.f64 %fd64, %fd63, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd65, %fd63, %fd64, %p33;
.loc 1 20 1
add.s32 %r38, %r1, -5775;
.loc 1 19 1
setp.gt.s32 %p34, %r38, 0;
.loc 1 20 1
add.f64 %fd66, %fd65, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd67, %fd65, %fd66, %p34;
.loc 1 20 1
add.s32 %r39, %r1, -5647;
.loc 1 19 1
setp.gt.s32 %p35, %r39, 0;
.loc 1 20 1
add.f64 %fd68, %fd67, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd69, %fd67, %fd68, %p35;
.loc 1 20 1
add.s32 %r40, %r1, -5519;
.loc 1 19 1
setp.gt.s32 %p36, %r40, 0;
.loc 1 20 1
add.f64 %fd70, %fd69, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd71, %fd69, %fd70, %p36;
.loc 1 20 1
add.s32 %r41, %r1, -5391;
.loc 1 19 1
setp.gt.s32 %p37, %r41, 0;
.loc 1 20 1
add.f64 %fd72, %fd71, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd73, %fd71, %fd72, %p37;
.loc 1 20 1
add.s32 %r42, %r1, -5263;
.loc 1 19 1
setp.gt.s32 %p38, %r42, 0;
.loc 1 20 1
add.f64 %fd74, %fd73, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd75, %fd73, %fd74, %p38;
.loc 1 20 1
add.s32 %r43, %r1, -5135;
.loc 1 19 1
setp.gt.s32 %p39, %r43, 0;
.loc 1 20 1
add.f64 %fd76, %fd75, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd77, %fd75, %fd76, %p39;
.loc 1 20 1
add.s32 %r44, %r1, -5007;
.loc 1 19 1
setp.gt.s32 %p40, %r44, 0;
.loc 1 20 1
add.f64 %fd78, %fd77, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd79, %fd77, %fd78, %p40;
.loc 1 20 1
add.s32 %r45, %r1, -4879;
.loc 1 19 1
setp.gt.s32 %p41, %r45, 0;
.loc 1 20 1
add.f64 %fd80, %fd79, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd81, %fd79, %fd80, %p41;
.loc 1 20 1
add.s32 %r46, %r1, -4751;
.loc 1 19 1
setp.gt.s32 %p42, %r46, 0;
.loc 1 20 1
add.f64 %fd82, %fd81, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd83, %fd81, %fd82, %p42;
.loc 1 20 1
add.s32 %r47, %r1, -4623;
.loc 1 19 1
setp.gt.s32 %p43, %r47, 0;
.loc 1 20 1
add.f64 %fd84, %fd83, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd85, %fd83, %fd84, %p43;
.loc 1 20 1
add.s32 %r48, %r1, -4495;
.loc 1 19 1
setp.gt.s32 %p44, %r48, 0;
.loc 1 20 1
add.f64 %fd86, %fd85, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd87, %fd85, %fd86, %p44;
.loc 1 20 1
add.s32 %r49, %r1, -4367;
.loc 1 19 1
setp.gt.s32 %p45, %r49, 0;
.loc 1 20 1
add.f64 %fd88, %fd87, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd89, %fd87, %fd88, %p45;
.loc 1 20 1
add.s32 %r50, %r1, -4239;
.loc 1 19 1
setp.gt.s32 %p46, %r50, 0;
.loc 1 20 1
add.f64 %fd90, %fd89, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd91, %fd89, %fd90, %p46;
.loc 1 20 1
add.s32 %r51, %r1, -4111;
.loc 1 19 1
setp.gt.s32 %p47, %r51, 0;
.loc 1 20 1
add.f64 %fd92, %fd91, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd93, %fd91, %fd92, %p47;
.loc 1 20 1
add.s32 %r52, %r1, -3983;
.loc 1 19 1
setp.gt.s32 %p48, %r52, 0;
.loc 1 20 1
add.f64 %fd94, %fd93, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd95, %fd93, %fd94, %p48;
.loc 1 20 1
add.s32 %r53, %r1, -3855;
.loc 1 19 1
setp.gt.s32 %p49, %r53, 0;
.loc 1 20 1
add.f64 %fd96, %fd95, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd97, %fd95, %fd96, %p49;
.loc 1 20 1
add.s32 %r54, %r1, -3727;
.loc 1 19 1
setp.gt.s32 %p50, %r54, 0;
.loc 1 20 1
add.f64 %fd98, %fd97, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd99, %fd97, %fd98, %p50;
.loc 1 20 1
add.s32 %r55, %r1, -3599;
.loc 1 19 1
setp.gt.s32 %p51, %r55, 0;
.loc 1 20 1
add.f64 %fd100, %fd99, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd101, %fd99, %fd100, %p51;
.loc 1 20 1
add.s32 %r56, %r1, -3471;
.loc 1 19 1
setp.gt.s32 %p52, %r56, 0;
.loc 1 20 1
add.f64 %fd102, %fd101, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd103, %fd101, %fd102, %p52;
.loc 1 20 1
add.s32 %r57, %r1, -3343;
.loc 1 19 1
setp.gt.s32 %p53, %r57, 0;
.loc 1 20 1
add.f64 %fd104, %fd103, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd105, %fd103, %fd104, %p53;
.loc 1 20 1
add.s32 %r58, %r1, -3215;
.loc 1 19 1
setp.gt.s32 %p54, %r58, 0;
.loc 1 20 1
add.f64 %fd106, %fd105, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd107, %fd105, %fd106, %p54;
.loc 1 20 1
add.s32 %r59, %r1, -3087;
.loc 1 19 1
setp.gt.s32 %p55, %r59, 0;
.loc 1 20 1
add.f64 %fd108, %fd107, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd109, %fd107, %fd108, %p55;
.loc 1 20 1
add.s32 %r60, %r1, -2959;
.loc 1 19 1
setp.gt.s32 %p56, %r60, 0;
.loc 1 20 1
add.f64 %fd110, %fd109, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd111, %fd109, %fd110, %p56;
.loc 1 20 1
add.s32 %r61, %r1, -2831;
.loc 1 19 1
setp.gt.s32 %p57, %r61, 0;
.loc 1 20 1
add.f64 %fd112, %fd111, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd113, %fd111, %fd112, %p57;
.loc 1 20 1
add.s32 %r62, %r1, -2703;
.loc 1 19 1
setp.gt.s32 %p58, %r62, 0;
.loc 1 20 1
add.f64 %fd114, %fd113, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd115, %fd113, %fd114, %p58;
.loc 1 20 1
add.s32 %r63, %r1, -2575;
.loc 1 19 1
setp.gt.s32 %p59, %r63, 0;
.loc 1 20 1
add.f64 %fd116, %fd115, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd117, %fd115, %fd116, %p59;
.loc 1 20 1
add.s32 %r64, %r1, -2447;
.loc 1 19 1
setp.gt.s32 %p60, %r64, 0;
.loc 1 20 1
add.f64 %fd118, %fd117, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd119, %fd117, %fd118, %p60;
.loc 1 20 1
add.s32 %r65, %r1, -2319;
.loc 1 19 1
setp.gt.s32 %p61, %r65, 0;
.loc 1 20 1
add.f64 %fd120, %fd119, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd121, %fd119, %fd120, %p61;
.loc 1 20 1
add.s32 %r66, %r1, -2191;
.loc 1 19 1
setp.gt.s32 %p62, %r66, 0;
.loc 1 20 1
add.f64 %fd122, %fd121, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd123, %fd121, %fd122, %p62;
.loc 1 20 1
add.s32 %r67, %r1, -2063;
.loc 1 19 1
setp.gt.s32 %p63, %r67, 0;
.loc 1 20 1
add.f64 %fd124, %fd123, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd125, %fd123, %fd124, %p63;
.loc 1 20 1
add.s32 %r68, %r1, -1935;
.loc 1 19 1
setp.gt.s32 %p64, %r68, 0;
.loc 1 20 1
add.f64 %fd126, %fd125, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd127, %fd125, %fd126, %p64;
.loc 1 20 1
add.s32 %r69, %r1, -1807;
.loc 1 19 1
setp.gt.s32 %p65, %r69, 0;
.loc 1 20 1
add.f64 %fd128, %fd127, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd129, %fd127, %fd128, %p65;
.loc 1 20 1
add.s32 %r70, %r1, -1679;
.loc 1 19 1
setp.gt.s32 %p66, %r70, 0;
.loc 1 20 1
add.f64 %fd130, %fd129, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd131, %fd129, %fd130, %p66;
.loc 1 20 1
add.s32 %r71, %r1, -1551;
.loc 1 19 1
setp.gt.s32 %p67, %r71, 0;
.loc 1 20 1
add.f64 %fd132, %fd131, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd133, %fd131, %fd132, %p67;
.loc 1 20 1
add.s32 %r72, %r1, -1423;
.loc 1 19 1
setp.gt.s32 %p68, %r72, 0;
.loc 1 20 1
add.f64 %fd134, %fd133, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd135, %fd133, %fd134, %p68;
.loc 1 20 1
add.s32 %r73, %r1, -1295;
.loc 1 19 1
setp.gt.s32 %p69, %r73, 0;
.loc 1 20 1
add.f64 %fd136, %fd135, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd137, %fd135, %fd136, %p69;
.loc 1 20 1
add.s32 %r74, %r1, -1167;
.loc 1 19 1
setp.gt.s32 %p70, %r74, 0;
.loc 1 20 1
add.f64 %fd138, %fd137, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd139, %fd137, %fd138, %p70;
.loc 1 20 1
add.s32 %r75, %r1, -1039;
.loc 1 19 1
setp.gt.s32 %p71, %r75, 0;
.loc 1 20 1
add.f64 %fd140, %fd139, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd141, %fd139, %fd140, %p71;
.loc 1 20 1
add.s32 %r76, %r1, -911;
.loc 1 19 1
setp.gt.s32 %p72, %r76, 0;
.loc 1 20 1
add.f64 %fd142, %fd141, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd143, %fd141, %fd142, %p72;
.loc 1 20 1
add.s32 %r77, %r1, -783;
.loc 1 19 1
setp.gt.s32 %p73, %r77, 0;
.loc 1 20 1
add.f64 %fd144, %fd143, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd145, %fd143, %fd144, %p73;
.loc 1 20 1
add.s32 %r78, %r1, -655;
.loc 1 19 1
setp.gt.s32 %p74, %r78, 0;
.loc 1 20 1
add.f64 %fd146, %fd145, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd147, %fd145, %fd146, %p74;
.loc 1 20 1
add.s32 %r79, %r1, -527;
.loc 1 19 1
setp.gt.s32 %p75, %r79, 0;
.loc 1 20 1
add.f64 %fd148, %fd147, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd149, %fd147, %fd148, %p75;
.loc 1 20 1
add.s32 %r80, %r1, -399;
.loc 1 19 1
setp.gt.s32 %p76, %r80, 0;
.loc 1 20 1
add.f64 %fd150, %fd149, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd151, %fd149, %fd150, %p76;
.loc 1 20 1
add.s32 %r81, %r1, -271;
.loc 1 19 1
setp.gt.s32 %p77, %r81, 0;
.loc 1 20 1
add.f64 %fd152, %fd151, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd153, %fd151, %fd152, %p77;
.loc 1 20 1
add.s32 %r82, %r1, -143;
.loc 1 19 1
setp.gt.s32 %p78, %r82, 0;
.loc 1 20 1
add.f64 %fd154, %fd153, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd155, %fd153, %fd154, %p78;
.loc 1 20 1
add.s32 %r83, %r1, -15;
.loc 1 19 1
setp.gt.s32 %p79, %r83, 0;
.loc 1 20 1
add.f64 %fd156, %fd155, 0d3FF0000000000000;
.loc 1 19 1
selp.f64 %fd157, %fd155, %fd156, %p79;
cvta.to.shared.u64 %rd6, %rd5;
shl.b32 %r84, %r1, 3;
cvt.s64.s32 %rd7, %r84;
add.s64 %rd2, %rd6, %rd7;
st.shared.f64 [%rd2], %fd157;
mov.u32 %r89, 128;
bra.uni LBB1_1;
LBB1_3:
shl.b32 %r88, %r3, 3;
cvt.s64.s32 %rd8, %r88;
add.s64 %rd9, %rd2, %rd8;
ld.shared.f64 %fd158, [%rd9];
ld.shared.f64 %fd159, [%rd2];
add.f64 %fd160, %fd159, %fd158;
st.shared.f64 [%rd2], %fd160;
mov.u32 %r89, %r3;
LBB1_1:
bar.sync 0;
setp.lt.s32 %p80, %r89, 2;
@%p80 bra LBB1_4;
bar.sync 0;
add.s32 %r85, %r89, 1;
shr.s32 %r3, %r85, 1;
sub.s32 %r86, %r1, %r89;
add.s32 %r87, %r86, %r3;
setp.gt.s32 %p81, %r87, -1;
mov.u32 %r89, %r3;
@%p81 bra LBB1_1;
bra.uni LBB1_3;
LBB1_4:
setp.ne.s32 %p82, %r1, 0;
@%p82 bra LBB1_6;
.loc 1 0 1
ld.param.u64 %rd11, [main_17_gpu_param_0];
.loc 1 19 1
cvta.to.global.u64 %rd10, %rd11;
ld.shared.f64 %fd161, [%rd2];
ld.global.f64 %fd162, [%rd10];
add.f64 %fd163, %fd162, %fd161;
st.global.f64 [%rd10], %fd163;
LBB1_6:
ret;
Ltmp2:
Lfunc_end1:
}
.file 1 "/path/to/test.c"
string-delimiter
)
(define ptx-sample2-out
'((module ".version 7.2")
(module ".target sm_70")
(module ".address_size 64")
(linking ".extern" (storageN ".shared" ".align 8" ".b8" "S18_main_17_gpu[]"))
(linking
".visible"
(kernel
"main_11_gpu"
(storage ".param" ".u64" "main_11_gpu_param_0")
(".maxntid" "128" "1" "1")
(storageN ".reg" ".pred" "%p<6>")
(storageN ".reg" ".b32" "%r<19>")
(storageN ".reg" ".b64" "%rd<14>")
(debugging ".loc" "1" "11" "0")
"Lfunc_begin0:"
(debugging ".loc" "1" "11" "0")
(instruction "ld" ".param" ".u64" "%rd2" "[main_11_gpu_param_0]")
(instruction "mov" ".u32" "%r18" "%tid.x")
(instruction "add" ".s32" "%r17" "%r18" "-9999")
(instruction "mov" ".u32" "%r16" "9616")
(instruction "cvta" ".to" ".global" ".u64" "%rd1" "%rd2")
(instruction "bra" ".uni" "LBB0_1")
"LBB0_11:"
"Ltmp0:"
(debugging ".loc" "1" "15" "1")
(instruction "add" ".s32" "%r18" "%r18" "512")
(instruction "add" ".s32" "%r16" "%r16" "-512")
(instruction "add" ".s32" "%r17" "%r7" "128")
"LBB0_1:"
(debugging ".loc" "1" "14" "1")
(instruction "setp" ".gt" ".s32" "%p1" "%r17" "0")
"@%p1"
(instruction "bra" "LBB0_3")
(debugging ".loc" "1" "15" "1")
(instruction "mul" ".wide" ".s32" "%rd3" "%r18" "4")
(instruction "add" ".s64" "%rd4" "%rd1" "%rd3")
(instruction "st" ".global" ".u32" "[%rd4]" "%r18")
"LBB0_3:"
(instruction "add" ".s32" "%r12" "%r17" "128")
(debugging ".loc" "1" "14" "1")
(instruction "setp" ".gt" ".s32" "%p2" "%r12" "0")
"@%p2"
(instruction "bra" "LBB0_5")
(debugging ".loc" "1" "15" "1")
(instruction "mul" ".wide" ".s32" "%rd5" "%r18" "4")
(instruction "add" ".s64" "%rd7" "%rd1" "%rd5")
(instruction "add" ".s32" "%r13" "%r18" "128")
(instruction "st" ".global" ".u32" "[%rd7+512]" "%r13")
"LBB0_5:"
(debugging ".loc" "1" "14" "1")
(instruction "add" ".s32" "%r6" "%r17" "256")
(instruction "setp" ".gt" ".s32" "%p3" "%r6" "0")
"@%p3"
(instruction "bra" "LBB0_7")
(debugging ".loc" "1" "15" "1")
(instruction "mul" ".wide" ".s32" "%rd9" "%r18" "4")
(instruction "add" ".s64" "%rd10" "%rd1" "%rd9")
(instruction "add" ".s32" "%r14" "%r17" "10255")
(instruction "st" ".global" ".u32" "[%rd10+1024]" "%r14")
"LBB0_7:"
(debugging ".loc" "1" "14" "1")