diff --git a/tcl/target/xc6x0.cfg b/tcl/target/xc6x0.cfg
new file mode 100644
index 000000000..45611a490
--- /dev/null
+++ b/tcl/target/xc6x0.cfg
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: Apache-2.0 or GPL-2.0-or-later
+
+source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME xc6x0
+}
+
+set _ENDIAN little
+
+# 128KB of ram on all known parts, 8K should be safe
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x2000
+}
+
+if { [info exists CPUTAPID] } {
+    set _CPUTAPID $CPUTAPID
+} else {
+    # Arm, m0
+    set _CPUTAPID 0x0BB11477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+#reset_config srst_nogate
+