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RT1170 enhancements #2865

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17 changes: 13 additions & 4 deletions hw/bsp/imxrt/boards/mimxrt1170_evkb/board.cmake
Original file line number Diff line number Diff line change
@@ -1,16 +1,25 @@
set(MCU_VARIANT MIMXRT1176)
set(MCU_CORE _cm7)

set(JLINK_DEVICE MIMXRT1176xxxA_M7)
set(PYOCD_TARGET mimxrt1170_cm7)
if (M4 STREQUAL "1")
set(MCU_CORE _cm4)
set(JLINK_CORE _M4)
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_ram.ld)
set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
else ()
set(MCU_CORE _cm7)
set(JLINK_CORE _M7)
endif()

set(JLINK_DEVICE MIMXRT1176xxxA${JLINK_CORE})
set(PYOCD_TARGET mimxrt1170${MCU_CORE})
set(NXPLINK_DEVICE MIMXRT1176xxxxx:MIMXRT1170-EVK)

function(update_board TARGET)
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkbmimxrt1170_flexspi_nor_config.c
)
target_compile_definitions(${TARGET} PUBLIC
CPU_MIMXRT1176DVMAA_cm7
CPU_MIMXRT1176DVMAA${MCU_CORE}
BOARD_TUD_RHPORT=0
BOARD_TUH_RHPORT=1
)
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18 changes: 14 additions & 4 deletions hw/bsp/imxrt/boards/mimxrt1170_evkb/board.mk
Original file line number Diff line number Diff line change
@@ -1,12 +1,22 @@
CFLAGS += -DCPU_MIMXRT1176DVMAA_cm7
MCU_VARIANT = MIMXRT1176
MCU_CORE = _cm7

ifeq ($(M4), 1)
MCU_CORE = _cm4
JLINK_CORE = _M4
CPU_CORE = cortex-m4
LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx${MCU_CORE}_ram.ld
else
MCU_CORE = _cm7
JLINK_CORE = _M7
endif

CFLAGS += -DCPU_MIMXRT1176DVMAA$(MCU_CORE)

# For flash-jlink target
JLINK_DEVICE = MIMXRT1176xxxA_M7
JLINK_DEVICE = MIMXRT1176xxxA$(JLINK_CORE)

# For flash-pyocd target
PYOCD_TARGET = mimxrt1170_cm7
PYOCD_TARGET = mimxrt1170$(MCU_CORE)

BOARD_TUD_RHPORT = 0
BOARD_TUH_RHPORT = 1
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