diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 2e0a0c30d3..f36725ebac 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -295,7 +295,9 @@ void cdcd_reset(uint8_t rhport)
 
     tu_memclr(p_cdc, ITF_MEM_RESET_SIZE);
     tu_fifo_clear(&p_cdc->rx_ff);
+    #if !CFG_TUD_CDC_PERSISTENT_TX_BUFF
     tu_fifo_clear(&p_cdc->tx_ff);
+    #endif
     tu_fifo_set_overwritable(&p_cdc->tx_ff, true);
   }
 }
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index 20e9084515..db709b3bc3 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -41,6 +41,12 @@
   #define CFG_TUD_CDC_EP_BUFSIZE    (TUD_OPT_HIGH_SPEED ? 512 : 64)
 #endif
 
+// By default the TX fifo buffer is cleared on connect / bus reset.
+// Enable this to persist any data in the fifo instead.
+#ifndef CFG_TUD_CDC_PERSISTENT_TX_BUFF
+  #define CFG_TUD_CDC_PERSISTENT_TX_BUFF    (0)
+#endif
+
 #ifdef __cplusplus
  extern "C" {
 #endif