am335x-boneblack-fm4dd.dts

/dts-v1/;

/ {
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
	interrupt-parent = <0x1>;
	model = "TI AM335x BeagleBone Black";

	chosen {
	};

	aliases {
		i2c0 = "/ocp/i2c@44e0b000";
		i2c1 = "/ocp/i2c@4802a000";
		i2c2 = "/ocp/i2c@4819c000";
		serial0 = "/ocp/serial@44e09000";
		serial1 = "/ocp/serial@48022000";
		serial2 = "/ocp/serial@48024000";
		serial3 = "/ocp/serial@481a6000";
		serial4 = "/ocp/serial@481a8000";
		serial5 = "/ocp/serial@481aa000";
		d_can0 = "/ocp/can@481cc000";
		d_can1 = "/ocp/can@481d0000";
		usb0 = "/ocp/usb@47400000/usb@47401000";
		usb1 = "/ocp/usb@47400000/usb@47401800";
		phy0 = "/ocp/usb@47400000/usb-phy@47401300";
		phy1 = "/ocp/usb@47400000/usb-phy@47401b00";
		ethernet0 = "/ocp/ethernet@4a100000/slave@4a100200";
		ethernet1 = "/ocp/ethernet@4a100000/slave@4a100300";
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>;
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0x0>;
			voltage-tolerance = <0x2>;
			clocks = <0x2>;
			clock-names = "cpu";
			clock-latency = <0x493e0>;
			cpu0-supply = <0x3>;
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <0x3>;
	};

	soc {
		compatible = "ti,omap-infra";

		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
			sram = <0x4>;
		};
	};

	ocp {
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;
		ti,hwmods = "l3_main";
		linux,phandle = <0x58>;
		phandle = <0x58>;

		l4_wkup@44c00000 {
			compatible = "ti,am3-l4-wkup", "simple-bus";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x44c00000 0x280000>;
			linux,phandle = <0x59>;
			phandle = <0x59>;

			wkup_m3@100000 {
				compatible = "ti,am3352-wkup-m3";
				reg = <0x100000 0x4000 0x180000 0x2000>;
				reg-names = "umem", "dmem";
				ti,hwmods = "wkup_m3";
				ti,pm-firmware = "am335x-pm-firmware.elf";
				linux,phandle = <0x27>;
				phandle = <0x27>;
			};

			prcm@200000 {
				compatible = "ti,am3-prcm";
				reg = <0x200000 0x4000>;
				linux,phandle = <0x5a>;
				phandle = <0x5a>;

				clocks {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					linux,phandle = <0x5b>;
					phandle = <0x5b>;

					clk_32768_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x8000>;
						linux,phandle = <0x15>;
						phandle = <0x15>;
					};

					clk_rc32k_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x7d00>;
						linux,phandle = <0x14>;
						phandle = <0x14>;
					};

					virt_19200000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x124f800>;
						linux,phandle = <0x22>;
						phandle = <0x22>;
					};

					virt_24000000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x16e3600>;
						linux,phandle = <0x23>;
						phandle = <0x23>;
					};

					virt_25000000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x17d7840>;
						linux,phandle = <0x24>;
						phandle = <0x24>;
					};

					virt_26000000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x18cba80>;
						linux,phandle = <0x25>;
						phandle = <0x25>;
					};

					tclkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0xb71b00>;
						linux,phandle = <0x13>;
						phandle = <0x13>;
					};

					dpll_core_ck {
						#clock-cells = <0x0>;
						compatible = "ti,am3-dpll-core-clock";
						clocks = <0x5 0x5>;
						reg = <0x490 0x45c 0x468>;
						linux,phandle = <0x6>;
						phandle = <0x6>;
					};

					dpll_core_x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,am3-dpll-x2-clock";
						clocks = <0x6>;
						linux,phandle = <0x7>;
						phandle = <0x7>;
					};

					dpll_core_m4_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x7>;
						ti,max-div = <0x1f>;
						reg = <0x480>;
						ti,index-starts-at-one;
						linux,phandle = <0xf>;
						phandle = <0xf>;
					};

					dpll_core_m5_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x7>;
						ti,max-div = <0x1f>;
						reg = <0x484>;
						ti,index-starts-at-one;
						linux,phandle = <0x17>;
						phandle = <0x17>;
					};

					dpll_core_m6_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x7>;
						ti,max-div = <0x1f>;
						reg = <0x4d8>;
						ti,index-starts-at-one;
						linux,phandle = <0x5c>;
						phandle = <0x5c>;
					};

					dpll_mpu_ck {
						#clock-cells = <0x0>;
						compatible = "ti,am3-dpll-clock";
						clocks = <0x5 0x5>;
						reg = <0x488 0x420 0x42c>;
						linux,phandle = <0x2>;
						phandle = <0x2>;
					};

					dpll_mpu_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x2>;
						ti,max-div = <0x1f>;
						reg = <0x4a8>;
						ti,index-starts-at-one;
						linux,phandle = <0x5d>;
						phandle = <0x5d>;
					};

					dpll_ddr_ck {
						#clock-cells = <0x0>;
						compatible = "ti,am3-dpll-no-gate-clock";
						clocks = <0x5 0x5>;
						reg = <0x494 0x434 0x440>;
						linux,phandle = <0x8>;
						phandle = <0x8>;
					};

					dpll_ddr_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x8>;
						ti,max-div = <0x1f>;
						reg = <0x4a0>;
						ti,index-starts-at-one;
						linux,phandle = <0x9>;
						phandle = <0x9>;
					};

					dpll_ddr_m2_div2_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x9>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0x5e>;
						phandle = <0x5e>;
					};

					dpll_disp_ck {
						#clock-cells = <0x0>;
						compatible = "ti,am3-dpll-no-gate-clock";
						clocks = <0x5 0x5>;
						reg = <0x498 0x448 0x454>;
						linux,phandle = <0xa>;
						phandle = <0xa>;
					};

					dpll_disp_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xa>;
						ti,max-div = <0x1f>;
						reg = <0x4a4>;
						ti,index-starts-at-one;
						ti,set-rate-parent;
						linux,phandle = <0x11>;
						phandle = <0x11>;
					};

					dpll_per_ck {
						#clock-cells = <0x0>;
						compatible = "ti,am3-dpll-no-gate-j-type-clock";
						clocks = <0x5 0x5>;
						reg = <0x48c 0x470 0x49c>;
						linux,phandle = <0xb>;
						phandle = <0xb>;
					};

					dpll_per_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xb>;
						ti,max-div = <0x1f>;
						reg = <0x4ac>;
						ti,index-starts-at-one;
						linux,phandle = <0xc>;
						phandle = <0xc>;
					};

					dpll_per_m2_div4_wkupdm_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xc>;
						clock-mult = <0x1>;
						clock-div = <0x4>;
						linux,phandle = <0x5f>;
						phandle = <0x5f>;
					};

					dpll_per_m2_div4_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xc>;
						clock-mult = <0x1>;
						clock-div = <0x4>;
						linux,phandle = <0x60>;
						phandle = <0x60>;
					};

					cefuse_fck {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x5>;
						ti,bit-shift = <0x1>;
						reg = <0xa20>;
						linux,phandle = <0x61>;
						phandle = <0x61>;
					};

					clk_24mhz {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xc>;
						clock-mult = <0x1>;
						clock-div = <0x8>;
						linux,phandle = <0xd>;
						phandle = <0xd>;
					};

					clkdiv32k_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xd>;
						clock-mult = <0x1>;
						clock-div = <0x2dc>;
						linux,phandle = <0xe>;
						phandle = <0xe>;
					};

					clkdiv32k_ick {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0xe>;
						ti,bit-shift = <0x1>;
						reg = <0x14c>;
						linux,phandle = <0x12>;
						phandle = <0x12>;
					};

					l3_gclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xf>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x10>;
						phandle = <0x10>;
					};

					pruss_ocp_gclk {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x10 0x11>;
						reg = <0x530>;
						linux,phandle = <0x62>;
						phandle = <0x62>;
					};

					mmu_fck {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0xf>;
						ti,bit-shift = <0x1>;
						reg = <0x914>;
						linux,phandle = <0x63>;
						phandle = <0x63>;
					};

					timer1_fck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x5 0x12 0x13 0x14 0x15>;
						reg = <0x528>;
						linux,phandle = <0x64>;
						phandle = <0x64>;
					};

					timer2_fck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x13 0x5 0x12>;
						reg = <0x508>;
						linux,phandle = <0x65>;
						phandle = <0x65>;
					};

					timer3_fck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x13 0x5 0x12>;
						reg = <0x50c>;
						linux,phandle = <0x66>;
						phandle = <0x66>;
					};

					timer4_fck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x13 0x5 0x12>;
						reg = <0x510>;
						linux,phandle = <0x67>;
						phandle = <0x67>;
					};

					timer5_fck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x13 0x5 0x12>;
						reg = <0x518>;
						linux,phandle = <0x68>;
						phandle = <0x68>;
					};

					timer6_fck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x13 0x5 0x12>;
						reg = <0x51c>;
						linux,phandle = <0x69>;
						phandle = <0x69>;
					};

					timer7_fck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x13 0x5 0x12>;
						reg = <0x504>;
						linux,phandle = <0x6a>;
						phandle = <0x6a>;
					};

					usbotg_fck {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0xb>;
						ti,bit-shift = <0x8>;
						reg = <0x47c>;
						linux,phandle = <0x6b>;
						phandle = <0x6b>;
					};

					dpll_core_m4_div2_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xf>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0x16>;
						phandle = <0x16>;
					};

					ieee5000_fck {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x16>;
						ti,bit-shift = <0x1>;
						reg = <0xe4>;
						linux,phandle = <0x6c>;
						phandle = <0x6c>;
					};

					wdt1_fck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x12>;
						reg = <0x538>;
						linux,phandle = <0x6d>;
						phandle = <0x6d>;
					};

					l4_rtc_gclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xf>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0x6e>;
						phandle = <0x6e>;
					};

					l4hs_gclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xf>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0xd9>;
						phandle = <0xd9>;
					};

					l3s_gclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x16>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x70>;
						phandle = <0x70>;
					};

					l4fw_gclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x16>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x71>;
						phandle = <0x71>;
					};

					l4ls_gclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x16>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x26>;
						phandle = <0x26>;
					};

					sysclk_div_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xf>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x72>;
						phandle = <0x72>;
					};

					cpsw_125mhz_gclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x17>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0x41>;
						phandle = <0x41>;
					};

					cpsw_cpts_rft_clk {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x17 0xf>;
						reg = <0x520>;
						linux,phandle = <0x42>;
						phandle = <0x42>;
					};

					gpio0_dbclk_mux_ck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x15 0x12>;
						reg = <0x53c>;
						linux,phandle = <0x18>;
						phandle = <0x18>;
					};

					gpio0_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x18>;
						ti,bit-shift = <0x12>;
						reg = <0x408>;
						linux,phandle = <0x73>;
						phandle = <0x73>;
					};

					gpio1_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x12>;
						ti,bit-shift = <0x12>;
						reg = <0xac>;
						linux,phandle = <0x74>;
						phandle = <0x74>;
					};

					gpio2_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x12>;
						ti,bit-shift = <0x12>;
						reg = <0xb0>;
						linux,phandle = <0x75>;
						phandle = <0x75>;
					};

					gpio3_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x12>;
						ti,bit-shift = <0x12>;
						reg = <0xb4>;
						linux,phandle = <0x76>;
						phandle = <0x76>;
					};

					lcd_gclk {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x11 0x17 0xc>;
						reg = <0x534>;
						ti,set-rate-parent;
						linux,phandle = <0x1a>;
						phandle = <0x1a>;
					};

					mmc_clk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0xc>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0x77>;
						phandle = <0x77>;
					};

					gfx_fclk_clksel_ck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0xf 0xc>;
						ti,bit-shift = <0x1>;
						reg = <0x52c>;
						linux,phandle = <0x19>;
						phandle = <0x19>;
					};

					gfx_fck_div_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x19>;
						reg = <0x52c>;
						ti,max-div = <0x2>;
						linux,phandle = <0x78>;
						phandle = <0x78>;
					};

					sysclkout_pre_ck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x15 0x10 0x9 0xc 0x1a>;
						reg = <0x700>;
						linux,phandle = <0x1b>;
						phandle = <0x1b>;
					};

					clkout2_div_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1b>;
						ti,bit-shift = <0x3>;
						ti,max-div = <0x8>;
						reg = <0x700>;
						linux,phandle = <0x20>;
						phandle = <0x20>;
					};

					dbg_sysclk_ck {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x5>;
						ti,bit-shift = <0x13>;
						reg = <0x414>;
						linux,phandle = <0x1c>;
						phandle = <0x1c>;
					};

					dbg_clka_ck {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0xf>;
						ti,bit-shift = <0x1e>;
						reg = <0x414>;
						linux,phandle = <0x1d>;
						phandle = <0x1d>;
					};

					stm_pmd_clock_mux_ck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x1c 0x1d>;
						ti,bit-shift = <0x16>;
						reg = <0x414>;
						linux,phandle = <0x1e>;
						phandle = <0x1e>;
					};

					trace_pmd_clk_mux_ck {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x1c 0x1d>;
						ti,bit-shift = <0x14>;
						reg = <0x414>;
						linux,phandle = <0x1f>;
						phandle = <0x1f>;
					};

					stm_clk_div_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1e>;
						ti,bit-shift = <0x1b>;
						ti,max-div = <0x40>;
						reg = <0x414>;
						ti,index-power-of-two;
						linux,phandle = <0x79>;
						phandle = <0x79>;
					};

					trace_clk_div_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1f>;
						ti,bit-shift = <0x18>;
						ti,max-div = <0x40>;
						reg = <0x414>;
						ti,index-power-of-two;
						linux,phandle = <0x7a>;
						phandle = <0x7a>;
					};

					clkout2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x20>;
						ti,bit-shift = <0x7>;
						reg = <0x700>;
						linux,phandle = <0x7b>;
						phandle = <0x7b>;
					};
				};

				clockdomains {
					linux,phandle = <0x7c>;
					phandle = <0x7c>;

					clk_24mhz_clkdm {
						compatible = "ti,clockdomain";
						clocks = <0x12>;
						linux,phandle = <0x7d>;
						phandle = <0x7d>;
					};
				};
			};

			scm@210000 {
				compatible = "ti,am3-scm", "simple-bus";
				reg = <0x210000 0x2000>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x0 0x210000 0x2000>;
				linux,phandle = <0x7e>;
				phandle = <0x7e>;

				pinmux@800 {
					compatible = "pinctrl-single";
					reg = <0x800 0x238>;
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					pinctrl-single,register-width = <0x20>;
					pinctrl-single,function-mask = <0x7f>;
					pinctrl-names = "default";
					pinctrl-0 = <0x21>;
					linux,phandle = <0x7f>;
					phandle = <0x7f>;

					user_leds_s0 {
						pinctrl-single,pins = <0x54 0x7 0x58 0x17 0x5c 0x7 0x60 0x17>;
						linux,phandle = <0x4d>;
						phandle = <0x4d>;
					};

					pinmux_i2c0_pins {
						pinctrl-single,pins = <0x188 0x30 0x18c 0x30>;
						linux,phandle = <0x2f>;
						phandle = <0x2f>;
					};

					pinmux_i2c1_pins { 
						pinctrl-single,pins = <0x158 0x72 0x15c 0x72>; 
						linux,phandle = <0xdf>; 
						phandle = <0xdf>; 
					}; 

                                        pinmux_i2c2_pins {
                                                pinctrl-single,pins = <0x150 0x72 0x154 0x72>;
                                                linux,phandle = <0x33>;
                                                phandle = <0x33>;
                                        };


					pinmux_uart0_pins {
						pinctrl-single,pins = <0x170 0x30 0x174 0x0>;
						linux,phandle = <0x2e>;
						phandle = <0x2e>;
					};

					pinmux_clkout2_pin {
						pinctrl-single,pins = <0x1b4 0x3>;
						linux,phandle = <0x21>;
						phandle = <0x21>;
					};

					cpsw_default {
						pinctrl-single,pins = <0x108 0x28 0x10c 0x28 0x110 0x30 0x114 0x0 0x118 0x30 0x11c 0x0 0x120 0x0 0x124 0x0 0x128 0x0 0x12c 0x30 0x130 0x30 0x134 0x30 0x138 0x30 0x13c 0x30 0x140 0x30>;
						linux,phandle = <0x43>;
						phandle = <0x43>;
					};

					cpsw_sleep {
						pinctrl-single,pins = <0x108 0x27 0x10c 0x27 0x110 0x27 0x114 0x27 0x118 0x27 0x11c 0x27 0x120 0x27 0x124 0x27 0x128 0x27 0x12c 0x27 0x130 0x27 0x134 0x27 0x138 0x27 0x13c 0x27 0x140 0x27>;
						linux,phandle = <0x44>;
						phandle = <0x44>;
					};

					davinci_mdio_default {
						pinctrl-single,pins = <0x148 0x30 0x14c 0x10>;
						linux,phandle = <0x45>;
						phandle = <0x45>;
					};

					davinci_mdio_sleep {
						pinctrl-single,pins = <0x148 0x27 0x14c 0x27>;
						linux,phandle = <0x46>;
						phandle = <0x46>;
					};

					pinmux_mmc1_pins {
						pinctrl-single,pins = <0xf0 0x30 0xf4 0x30 0xf8 0x30 0xfc 0x30 0x100 0x30 0x104 0x30 0x160 0x2f>;
						linux,phandle = <0x35>;
						phandle = <0x35>;
					};

					pinmux_mmc1_pins_sleep {
						pinctrl-single,pins = <0xf0 0x27 0xf4 0x27 0xf8 0x27 0xfc 0x27 0x100 0x27 0x104 0x27 0x160 0x27>;
						linux,phandle = <0x36>;
						phandle = <0x36>;
					};

					pinmux_emmc_pins {
						pinctrl-single,pins = <0x80 0x32 0x84 0x32 0x0 0x31 0x4 0x31 0x8 0x31 0xc 0x31 0x10 0x31 0x14 0x31 0x18 0x31 0x1c 0x31>;
						linux,phandle = <0x39>;
						phandle = <0x39>;
					};

					nxp_hdmi_bonelt_pins {
						pinctrl-single,pins = <0x1b0 0x3 0xa0 0x8 0xa4 0x8 0xa8 0x8 0xac 0x8 0xb0 0x8 0xb4 0x8 0xb8 0x8 0xbc 0x8 0xc0 0x8 0xc4 0x8 0xc8 0x8 0xcc 0x8 0xd0 0x8 0xd4 0x8 0xd8 0x8 0xdc 0x8 0xe0 0x0 0xe4 0x0 0xe8 0x0 0xec 0x0>;
						linux,phandle = <0x30>;
						phandle = <0x30>;
					};

					nxp_hdmi_bonelt_off_pins {
						pinctrl-single,pins = <0x1b0 0x3>;
						linux,phandle = <0x31>;
						phandle = <0x31>;
					};

					mcasp0_pins {
						pinctrl-single,pins = <0x1ac 0x30 0x19c 0x2 0x194 0x10 0x190 0x0 0x6c 0x7>;
						linux,phandle = <0x4b>;
						phandle = <0x4b>;
					};

					mcasp0_pins_sleep {
						pinctrl-single,pins = <0x1ac 0x27 0x19c 0x27 0x194 0x27 0x190 0x27 0x6c 0x27>;
						linux,phandle = <0x4c>;
						phandle = <0x4c>;
					};
				};

				scm_conf@0 {
					compatible = "syscon";
					reg = <0x0 0x800>;
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					linux,phandle = <0x3b>;
					phandle = <0x3b>;

					clocks {
						#address-cells = <0x1>;
						#size-cells = <0x0>;
						linux,phandle = <0x80>;
						phandle = <0x80>;

						sys_clkin_ck {
							#clock-cells = <0x0>;
							compatible = "ti,mux-clock";
							clocks = <0x22 0x23 0x24 0x25>;
							ti,bit-shift = <0x16>;
							reg = <0x40>;
							linux,phandle = <0x5>;
							phandle = <0x5>;
						};

						adc_tsc_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x81>;
							phandle = <0x81>;
						};

						dcan0_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x3a>;
							phandle = <0x3a>;
						};

						dcan1_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x3c>;
							phandle = <0x3c>;
						};

						mcasp0_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x82>;
							phandle = <0x82>;
						};

						mcasp1_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x83>;
							phandle = <0x83>;
						};

						smartreflex0_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x84>;
							phandle = <0x84>;
						};

						smartreflex1_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x85>;
							phandle = <0x85>;
						};

						sha0_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x86>;
							phandle = <0x86>;
						};

						aes0_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x87>;
							phandle = <0x87>;
						};

						rng_fck {
							#clock-cells = <0x0>;
							compatible = "fixed-factor-clock";
							clocks = <0x5>;
							clock-mult = <0x1>;
							clock-div = <0x1>;
							linux,phandle = <0x88>;
							phandle = <0x88>;
						};

						ehrpwm0_tbclk@44e10664 {
							#clock-cells = <0x0>;
							compatible = "ti,gate-clock";
							clocks = <0x26>;
							ti,bit-shift = <0x0>;
							reg = <0x664>;
							linux,phandle = <0x89>;
							phandle = <0x89>;
						};

						ehrpwm1_tbclk@44e10664 {
							#clock-cells = <0x0>;
							compatible = "ti,gate-clock";
							clocks = <0x26>;
							ti,bit-shift = <0x1>;
							reg = <0x664>;
							linux,phandle = <0x8a>;
							phandle = <0x8a>;
						};

						ehrpwm2_tbclk@44e10664 {
							#clock-cells = <0x0>;
							compatible = "ti,gate-clock";
							clocks = <0x26>;
							ti,bit-shift = <0x2>;
							reg = <0x664>;
							linux,phandle = <0x8b>;
							phandle = <0x8b>;
						};
					};
				};

				wkup_m3_ipc@1324 {
					compatible = "ti,am3352-wkup-m3-ipc";
					reg = <0x1324 0x24>;
					interrupts = <0x4e>;
					ti,rproc = <0x27>;
					mboxes = <0x28 0x29>;
					ti,scale-data-fw = "am335x-bone-scale-data.bin";
					linux,phandle = <0x8c>;
					phandle = <0x8c>;
				};

				dma-router@f90 {
					compatible = "ti,am335x-edma-crossbar";
					reg = <0xf90 0x40>;
					#dma-cells = <0x3>;
					dma-requests = <0x20>;
					dma-masters = <0x2a>;
					linux,phandle = <0x34>;
					phandle = <0x34>;
				};

				clockdomains {
					linux,phandle = <0x8d>;
					phandle = <0x8d>;
				};
			};
		};

		interrupt-controller@48200000 {
			compatible = "ti,am33xx-intc";
			interrupt-controller;
			#interrupt-cells = <0x1>;
			reg = <0x48200000 0x1000>;
			linux,phandle = <0x1>;
			phandle = <0x1>;
		};

		edma@49000000 {
			compatible = "ti,edma3-tpcc";
			ti,hwmods = "tpcc";
			reg = <0x49000000 0x10000>;
			reg-names = "edma3_cc";
			interrupts = <0xc 0xd 0xe>;
			interrupt-names = "edma3_ccint", "emda3_mperr", "edma3_ccerrint";
			dma-requests = <0x40>;
			#dma-cells = <0x2>;
			ti,tptcs = <0x2b 0x7 0x2c 0x5 0x2d 0x0>;
			ti,edma-memcpy-channels = <0x14 0x15>;
			linux,phandle = <0x2a>;
			phandle = <0x2a>;
		};

		tptc@49800000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc0";
			reg = <0x49800000 0x100000>;
			interrupts = <0x70>;
			interrupt-names = "edma3_tcerrint";
			linux,phandle = <0x2b>;
			phandle = <0x2b>;
		};

		tptc@49900000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc1";
			reg = <0x49900000 0x100000>;
			interrupts = <0x71>;
			interrupt-names = "edma3_tcerrint";
			linux,phandle = <0x2c>;
			phandle = <0x2c>;
		};

		tptc@49a00000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc2";
			reg = <0x49a00000 0x100000>;
			interrupts = <0x72>;
			interrupt-names = "edma3_tcerrint";
			linux,phandle = <0x2d>;
			phandle = <0x2d>;
		};

		emif@4c000000 {
			compatible = "ti,emif-am3352";
			reg = <0x4c000000 0x1000>;
			sram = <0x4>;
			linux,phandle = <0x8e>;
			phandle = <0x8e>;
		};

		gpio@44e07000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			reg = <0x44e07000 0x1000>;
			interrupts = <0x60>;
			linux,phandle = <0x37>;
			phandle = <0x37>;
		};

		gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			reg = <0x4804c000 0x1000>;
			interrupts = <0x62>;
			linux,phandle = <0x4e>;
			phandle = <0x4e>;
		};

		gpio@481ac000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			reg = <0x481ac000 0x1000>;
			interrupts = <0x20>;
			linux,phandle = <0x8f>;
			phandle = <0x8f>;
		};

		gpio@481ae000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			reg = <0x481ae000 0x1000>;
			interrupts = <0x3e>;
			linux,phandle = <0x90>;
			phandle = <0x90>;
		};

		serial@44e09000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart1";
			clock-frequency = <0x2dc6c00>;
			reg = <0x44e09000 0x2000>;
			interrupts = <0x48>;
			status = "okay";
			dmas = <0x2a 0x1a 0x0 0x2a 0x1b 0x0>;
			dma-names = "tx", "rx";
			pinctrl-names = "default";
			pinctrl-0 = <0x2e>;
			linux,phandle = <0x91>;
			phandle = <0x91>;
		};

		serial@48022000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart2";
			clock-frequency = <0x2dc6c00>;
			reg = <0x48022000 0x2000>;
			interrupts = <0x49>;
			status = "disabled";
			dmas = <0x2a 0x1c 0x0 0x2a 0x1d 0x0>;
			dma-names = "tx", "rx";
			linux,phandle = <0x92>;
			phandle = <0x92>;
		};

		serial@48024000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart3";
			clock-frequency = <0x2dc6c00>;
			reg = <0x48024000 0x2000>;
			interrupts = <0x4a>;
			status = "disabled";
			dmas = <0x2a 0x1e 0x0 0x2a 0x1f 0x0>;
			dma-names = "tx", "rx";
			linux,phandle = <0x93>;
			phandle = <0x93>;
		};

		serial@481a6000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart4";
			clock-frequency = <0x2dc6c00>;
			reg = <0x481a6000 0x2000>;
			interrupts = <0x2c>;
			status = "disabled";
			linux,phandle = <0x94>;
			phandle = <0x94>;
		};

		serial@481a8000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart5";
			clock-frequency = <0x2dc6c00>;
			reg = <0x481a8000 0x2000>;
			interrupts = <0x2d>;
			status = "disabled";
			linux,phandle = <0x95>;
			phandle = <0x95>;
		};

		serial@481aa000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart6";
			clock-frequency = <0x2dc6c00>;
			reg = <0x481aa000 0x2000>;
			interrupts = <0x2e>;
			status = "disabled";
			linux,phandle = <0x96>;
			phandle = <0x96>;
		};

		i2c@44e0b000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c1";
			reg = <0x44e0b000 0x1000>;
			interrupts = <0x46>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x2f>;
			clock-frequency = <0x61a80>;
			linux,phandle = <0x97>;
			phandle = <0x97>;

			tps@24 {
				reg = <0x24>;
				compatible = "ti,tps65217";
				ti,pmic-shutdown-controller;
				interrupt-parent = <0x1>;
				interrupts = <0x7>;
				linux,phandle = <0x98>;
				phandle = <0x98>;

				regulators {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					regulator@0 {
						reg = <0x0>;
						regulator-compatible = "dcdc1";
						regulator-name = "vdds_dpr";
						regulator-always-on;
						linux,phandle = <0x99>;
						phandle = <0x99>;
					};

					regulator@1 {
						reg = <0x1>;
						regulator-compatible = "dcdc2";
						regulator-name = "vdd_mpu";
						regulator-min-microvolt = <0xe1d48>;
						regulator-max-microvolt = <0x1506d0>;
						regulator-boot-on;
						regulator-always-on;
						linux,phandle = <0x3>;
						phandle = <0x3>;
					};

					regulator@2 {
						reg = <0x2>;
						regulator-compatible = "dcdc3";
						regulator-name = "vdd_core";
						regulator-min-microvolt = <0xe1d48>;
						regulator-max-microvolt = <0x118c30>;
						regulator-boot-on;
						regulator-always-on;
						linux,phandle = <0x9a>;
						phandle = <0x9a>;
					};

					regulator@3 {
						reg = <0x3>;
						regulator-compatible = "ldo1";
						regulator-name = "vio,vrtc,vdds";
						regulator-always-on;
						linux,phandle = <0x9b>;
						phandle = <0x9b>;
					};

					regulator@4 {
						reg = <0x4>;
						regulator-compatible = "ldo2";
						regulator-name = "vdd_3v3aux";
						regulator-always-on;
						linux,phandle = <0x9c>;
						phandle = <0x9c>;
					};

					regulator@5 {
						reg = <0x5>;
						regulator-compatible = "ldo3";
						regulator-name = "vdd_1v8";
						regulator-always-on;
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						linux,phandle = <0x9d>;
						phandle = <0x9d>;
					};

					regulator@6 {
						reg = <0x6>;
						regulator-compatible = "ldo4";
						regulator-name = "vdd_3v3a";
						regulator-always-on;
						linux,phandle = <0x9e>;
						phandle = <0x9e>;
					};
				};
			};

			baseboard_eeprom@50 {
				compatible = "at,24c256";
				reg = <0x50>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				linux,phandle = <0x9f>;
				phandle = <0x9f>;

				baseboard_data@0 {
					reg = <0x0 0x100>;
					linux,phandle = <0x4f>;
					phandle = <0x4f>;
				};
			};

			tda19988 {
				compatible = "nxp,tda998x";
				reg = <0x70>;
				pinctrl-names = "default", "off";
				pinctrl-0 = <0x30>;
				pinctrl-1 = <0x31>;

				port {

					endpoint@0 {
						remote-endpoint = <0x32>;
						linux,phandle = <0x4a>;
						phandle = <0x4a>;
					};
				};
			};
		};

		i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			interrupts = <0x47>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x33>;
			clock-frequency = <0x61a80>;
			linux,phandle = <0xa0>;
			phandle = <0xa0>;
		};

		i2c@4819c000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c3";
			reg = <0x4819c000 0x1000>;
			interrupts = <0x1e>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0xdf>;
			clock-frequency = <0x186a0>;
			linux,phandle = <0xa1>;
			phandle = <0xa1>;

			cape_eeprom0@54 {
				compatible = "at,24c256";
				reg = <0x54>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				linux,phandle = <0xa2>;
				phandle = <0xa2>;

				cape_data@0 {
					reg = <0x0 0x100>;
					linux,phandle = <0x50>;
					phandle = <0x50>;
				};
			};

			cape_eeprom1@55 {
				compatible = "at,24c256";
				reg = <0x55>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				linux,phandle = <0xa3>;
				phandle = <0xa3>;

				cape_data@0 {
					reg = <0x0 0x100>;
					linux,phandle = <0x51>;
					phandle = <0x51>;
				};
			};

			cape_eeprom2@56 {
				compatible = "at,24c256";
				reg = <0x56>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				linux,phandle = <0xa4>;
				phandle = <0xa4>;

				cape_data@0 {
					reg = <0x0 0x100>;
					linux,phandle = <0x52>;
					phandle = <0x52>;
				};
			};

			cape_eeprom3@57 {
				compatible = "at,24c256";
				reg = <0x57>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				linux,phandle = <0xa5>;
				phandle = <0xa5>;

				cape_data@0 {
					reg = <0x0 0x100>;
					linux,phandle = <0x53>;
					phandle = <0x53>;
				};
			};
		};

		mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc1";
			ti,dual-volt;
			ti,needs-special-reset;
			ti,needs-special-hs-handling;
			dmas = <0x34 0x18 0x0 0x0 0x34 0x19 0x0 0x0>;
			dma-names = "tx", "rx";
			interrupts = <0x40>;
			interrupt-parent = <0x1>;
			reg = <0x48060000 0x1000>;
			status = "okay";
			bus-width = <0x4>;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x35>;
			pinctrl-1 = <0x36>;
			cd-gpios = <0x37 0x6 0x0>;
			cd-inverted;
			vmmc-supply = <0x38>;
			linux,phandle = <0xa6>;
			phandle = <0xa6>;
		};

		mmc@481d8000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc2";
			ti,needs-special-reset;
			dmas = <0x2a 0x2 0x0 0x2a 0x3 0x0>;
			dma-names = "tx", "rx";
			interrupts = <0x1c>;
			interrupt-parent = <0x1>;
			reg = <0x481d8000 0x1000>;
			status = "okay";
			vmmc-supply = <0x38>;
			pinctrl-names = "default";
			pinctrl-0 = <0x39>;
			bus-width = <0x8>;
			linux,phandle = <0xa7>;
			phandle = <0xa7>;
		};

		mmc@47810000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc3";
			ti,needs-special-reset;
			interrupts = <0x1d>;
			interrupt-parent = <0x1>;
			reg = <0x47810000 0x1000>;
			status = "disabled";
			linux,phandle = <0xa8>;
			phandle = <0xa8>;
		};

		spinlock@480ca000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x480ca000 0x1000>;
			ti,hwmods = "spinlock";
			#hwlock-cells = <0x1>;
			linux,phandle = <0xa9>;
			phandle = <0xa9>;
		};

		wdt@44e35000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
			reg = <0x44e35000 0x1000>;
			interrupts = <0x5b>;
			linux,phandle = <0xaa>;
			phandle = <0xaa>;
		};

		can@481cc000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can0";
			reg = <0x481cc000 0x2000>;
			clocks = <0x3a>;
			clock-names = "fck";
			syscon-raminit = <0x3b 0x644 0x0>;
			interrupts = <0x34>;
			status = "disabled";
			linux,phandle = <0xab>;
			phandle = <0xab>;
		};

		can@481d0000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can1";
			reg = <0x481d0000 0x2000>;
			clocks = <0x3c>;
			clock-names = "fck";
			syscon-raminit = <0x3b 0x644 0x1>;
			interrupts = <0x37>;
			status = "disabled";
			linux,phandle = <0xac>;
			phandle = <0xac>;
		};

		mailbox@480C8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480c8000 0x200>;
			interrupts = <0x4d>;
			ti,hwmods = "mailbox";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0x8>;
			linux,phandle = <0x28>;
			phandle = <0x28>;

			wkup_m3 {
				ti,mbox-send-noirq;
				ti,mbox-tx = <0x0 0x0 0x0>;
				ti,mbox-rx = <0x0 0x0 0x3>;
				linux,phandle = <0x29>;
				phandle = <0x29>;
			};

			mbox_pru0 {
				ti,mbox-tx = <0x2 0x0 0x0>;
				ti,mbox-rx = <0x3 0x0 0x0>;
				linux,phandle = <0x48>;
				phandle = <0x48>;
			};

			mbox_pru1 {
				ti,mbox-tx = <0x4 0x0 0x0>;
				ti,mbox-rx = <0x5 0x0 0x0>;
				linux,phandle = <0x49>;
				phandle = <0x49>;
			};
		};

		timer@44e31000 {
			compatible = "ti,am335x-timer-1ms";
			reg = <0x44e31000 0x400>;
			interrupts = <0x43>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
			linux,phandle = <0xad>;
			phandle = <0xad>;
		};

		timer@48040000 {
			compatible = "ti,am335x-timer";
			reg = <0x48040000 0x400>;
			interrupts = <0x44>;
			ti,hwmods = "timer2";
			linux,phandle = <0xae>;
			phandle = <0xae>;
		};

		timer@48042000 {
			compatible = "ti,am335x-timer";
			reg = <0x48042000 0x400>;
			interrupts = <0x45>;
			ti,hwmods = "timer3";
			linux,phandle = <0xaf>;
			phandle = <0xaf>;
		};

		timer@48044000 {
			compatible = "ti,am335x-timer";
			reg = <0x48044000 0x400>;
			interrupts = <0x5c>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
			linux,phandle = <0xb0>;
			phandle = <0xb0>;
		};

		timer@48046000 {
			compatible = "ti,am335x-timer";
			reg = <0x48046000 0x400>;
			interrupts = <0x5d>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
			linux,phandle = <0xb1>;
			phandle = <0xb1>;
		};

		timer@48048000 {
			compatible = "ti,am335x-timer";
			reg = <0x48048000 0x400>;
			interrupts = <0x5e>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
			linux,phandle = <0xb2>;
			phandle = <0xb2>;
		};

		timer@4804a000 {
			compatible = "ti,am335x-timer";
			reg = <0x4804a000 0x400>;
			interrupts = <0x5f>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
			linux,phandle = <0xb3>;
			phandle = <0xb3>;
		};

		rtc@44e3e000 {
			compatible = "ti,am3352-rtc", "ti,da830-rtc";
			reg = <0x44e3e000 0x1000>;
			interrupts = <0x4b 0x4c>;
			ti,hwmods = "rtc";
			system-power-controller;
			linux,phandle = <0xb4>;
			phandle = <0xb4>;
		};

		spi@48030000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg = <0x48030000 0x400>;
			interrupts = <0x41>;
			ti,spi-num-cs = <0x2>;
			ti,hwmods = "spi0";
			dmas = <0x2a 0x10 0x0 0x2a 0x11 0x0 0x2a 0x12 0x0 0x2a 0x13 0x0>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "okay";
			linux,phandle = <0xb5>;
			phandle = <0xb5>;
		};

		spi@481a0000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			reg = <0x481a0000 0x400>;
			interrupts = <0x7d>;
			ti,spi-num-cs = <0x2>;
			ti,hwmods = "spi1";
			dmas = <0x2a 0x2a 0x0 0x2a 0x2b 0x0 0x2a 0x2c 0x0 0x2a 0x2d 0x0>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "okay";
			linux,phandle = <0xb6>;
			phandle = <0xb6>;
		};

		usb@47400000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47400000 0x1000>;
			ranges;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ti,hwmods = "usb_otg_hs";
			status = "okay";
			linux,phandle = <0xb7>;
			phandle = <0xb7>;

			control@44e10620 {
				compatible = "ti,am335x-usb-ctrl-module";
				reg = <0x44e10620 0x10 0x44e10648 0x4>;
				reg-names = "phy_ctrl", "wakeup";
				status = "okay";
				linux,phandle = <0x3d>;
				phandle = <0x3d>;
			};

			usb-phy@47401300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401300 0x100>;
				reg-names = "phy";
				status = "okay";
				ti,ctrl_mod = <0x3d>;
				linux,phandle = <0x3e>;
				phandle = <0x3e>;
			};

			usb@47401000 {
				compatible = "ti,musb-am33xx";
				status = "okay";
				reg = <0x47401400 0x400 0x47401000 0x200>;
				reg-names = "mc", "control";
				interrupts = <0x12>;
				interrupt-names = "mc";
				dr_mode = "peripheral";
				mentor,multipoint = <0x1>;
				mentor,num-eps = <0x10>;
				mentor,ram-bits = <0xc>;
				mentor,power = <0x1f4>;
				phys = <0x3e>;
				dmas = <0x3f 0x0 0x0 0x3f 0x1 0x0 0x3f 0x2 0x0 0x3f 0x3 0x0 0x3f 0x4 0x0 0x3f 0x5 0x0 0x3f 0x6 0x0 0x3f 0x7 0x0 0x3f 0x8 0x0 0x3f 0x9 0x0 0x3f 0xa 0x0 0x3f 0xb 0x0 0x3f 0xc 0x0 0x3f 0xd 0x0 0x3f 0xe 0x0 0x3f 0x0 0x1 0x3f 0x1 0x1 0x3f 0x2 0x1 0x3f 0x3 0x1 0x3f 0x4 0x1 0x3f 0x5 0x1 0x3f 0x6 0x1 0x3f 0x7 0x1 0x3f 0x8 0x1 0x3f 0x9 0x1 0x3f 0xa 0x1 0x3f 0xb 0x1 0x3f 0xc 0x1 0x3f 0xd 0x1 0x3f 0xe 0x1>;
				dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15";
				linux,phandle = <0xb8>;
				phandle = <0xb8>;
			};

			usb-phy@47401b00 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401b00 0x100>;
				reg-names = "phy";
				status = "okay";
				ti,ctrl_mod = <0x3d>;
				linux,phandle = <0x40>;
				phandle = <0x40>;
			};

			usb@47401800 {
				compatible = "ti,musb-am33xx";
				status = "okay";
				reg = <0x47401c00 0x400 0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <0x13>;
				interrupt-names = "mc";
				dr_mode = "host";
				mentor,multipoint = <0x1>;
				mentor,num-eps = <0x10>;
				mentor,ram-bits = <0xc>;
				mentor,power = <0x1f4>;
				phys = <0x40>;
				dmas = <0x3f 0xf 0x0 0x3f 0x10 0x0 0x3f 0x11 0x0 0x3f 0x12 0x0 0x3f 0x13 0x0 0x3f 0x14 0x0 0x3f 0x15 0x0 0x3f 0x16 0x0 0x3f 0x17 0x0 0x3f 0x18 0x0 0x3f 0x19 0x0 0x3f 0x1a 0x0 0x3f 0x1b 0x0 0x3f 0x1c 0x0 0x3f 0x1d 0x0 0x3f 0xf 0x1 0x3f 0x10 0x1 0x3f 0x11 0x1 0x3f 0x12 0x1 0x3f 0x13 0x1 0x3f 0x14 0x1 0x3f 0x15 0x1 0x3f 0x16 0x1 0x3f 0x17 0x1 0x3f 0x18 0x1 0x3f 0x19 0x1 0x3f 0x1a 0x1 0x3f 0x1b 0x1 0x3f 0x1c 0x1 0x3f 0x1d 0x1>;
				dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", "tx15";
				linux,phandle = <0xb9>;
				phandle = <0xb9>;
			};

			dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg = <0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <0x11>;
				interrupt-names = "glue";
				#dma-cells = <0x2>;
				#dma-channels = <0x1e>;
				#dma-requests = <0x100>;
				status = "okay";
				linux,phandle = <0x3f>;
				phandle = <0x3f>;
			};
		};

		epwmss@48300000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48300000 0x10>;
			ti,hwmods = "epwmss0";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges = <0x48300100 0x48300100 0x80 0x48300180 0x48300180 0x80 0x48300200 0x48300200 0x80>;
			linux,phandle = <0xba>;
			phandle = <0xba>;

			ecap@48300100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x48300100 0x80>;
				interrupts = <0x1f>;
				interrupt-names = "ecap0";
				ti,hwmods = "ecap0";
				status = "disabled";
				linux,phandle = <0xbb>;
				phandle = <0xbb>;
			};

			ehrpwm@48300200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x48300200 0x80>;
				ti,hwmods = "ehrpwm0";
				status = "disabled";
				linux,phandle = <0xbc>;
				phandle = <0xbc>;
			};

			eqep@0x48300180 {
				compatible = "ti,am33xx-eqep";
				reg = <0x48300180 0x80>;
				interrupt-parent = <0x1>;
				interrupts = <0x4f>;
				ti,hwmods = "eqep0";
				status = "disabled";
				linux,phandle = <0xbd>;
				phandle = <0xbd>;
			};
		};

		epwmss@48302000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48302000 0x10>;
			ti,hwmods = "epwmss1";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges = <0x48302100 0x48302100 0x80 0x48302180 0x48302180 0x80 0x48302200 0x48302200 0x80>;
			linux,phandle = <0xbe>;
			phandle = <0xbe>;

			ecap@48302100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x48302100 0x80>;
				interrupts = <0x2f>;
				interrupt-names = "ecap1";
				ti,hwmods = "ecap1";
				status = "disabled";
				linux,phandle = <0xbf>;
				phandle = <0xbf>;
			};

			ehrpwm@48302200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x48302200 0x80>;
				ti,hwmods = "ehrpwm1";
				status = "disabled";
				linux,phandle = <0xc0>;
				phandle = <0xc0>;
			};

			eqep@0x48302180 {
				compatible = "ti,am33xx-eqep";
				reg = <0x48302180 0x80>;
				interrupt-parent = <0x1>;
				interrupts = <0x58>;
				ti,hwmods = "eqep1";
				status = "disabled";
				linux,phandle = <0xc1>;
				phandle = <0xc1>;
			};
		};

		epwmss@48304000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48304000 0x10>;
			ti,hwmods = "epwmss2";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges = <0x48304100 0x48304100 0x80 0x48304180 0x48304180 0x80 0x48304200 0x48304200 0x80>;
			linux,phandle = <0xc2>;
			phandle = <0xc2>;

			ecap@48304100 {
				compatible = "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x48304100 0x80>;
				interrupts = <0x3d>;
				interrupt-names = "ecap2";
				ti,hwmods = "ecap2";
				status = "disabled";
				linux,phandle = <0xc3>;
				phandle = <0xc3>;
			};

			ehrpwm@48304200 {
				compatible = "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x48304200 0x80>;
				ti,hwmods = "ehrpwm2";
				status = "disabled";
				linux,phandle = <0xc4>;
				phandle = <0xc4>;
			};

			eqep@0x48304180 {
				compatible = "ti,am33xx-eqep";
				reg = <0x48304180 0x80>;
				interrupt-parent = <0x1>;
				interrupts = <0x59>;
				ti,hwmods = "eqep2";
				status = "disabled";
				linux,phandle = <0xc5>;
				phandle = <0xc5>;
			};
		};

		ethernet@4a100000 {
			compatible = "ti,am335x-cpsw", "ti,cpsw";
			ti,hwmods = "cpgmac0";
			clocks = <0x41 0x42>;
			clock-names = "fck", "cpts";
			cpdma_channels = <0x8>;
			ale_entries = <0x400>;
			bd_ram_size = <0x2000>;
			no_bd_ram = <0x0>;
			rx_descs = <0x40>;
			mac_control = <0x20>;
			slaves = <0x1>;
			active_slave = <0x0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <0x1d>;
			reg = <0x4a100000 0x800 0x4a101200 0x100>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			interrupt-parent = <0x1>;
			interrupts = <0x28 0x29 0x2a 0x2b>;
			ranges;
			syscon = <0x3b>;
			status = "okay";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x43>;
			pinctrl-1 = <0x44>;
			linux,phandle = <0xc6>;
			phandle = <0xc6>;

			mdio@4a101000 {
				compatible = "ti,davinci_mdio";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <0xf4240>;
				reg = <0x4a101000 0x100>;
				status = "okay";
				pinctrl-names = "default", "sleep";
				pinctrl-0 = <0x45>;
				pinctrl-1 = <0x46>;
				linux,phandle = <0x47>;
				phandle = <0x47>;
			};

			slave@4a100200 {
				mac-address = [00 00 00 00 00 00];
				phy_id = <0x47 0x0>;
				phy-mode = "mii";
				linux,phandle = <0xc7>;
				phandle = <0xc7>;
			};

			slave@4a100300 {
				mac-address = [00 00 00 00 00 00];
				linux,phandle = <0xc8>;
				phandle = <0xc8>;
			};

			cpsw-phy-sel@44e10650 {
				compatible = "ti,am3352-cpsw-phy-sel";
				reg = <0x44e10650 0x4>;
				reg-names = "gmii-sel";
				linux,phandle = <0xc9>;
				phandle = <0xc9>;
			};
		};

		ocmcram@40300000 {
			compatible = "mmio-sram";
			reg = <0x40300000 0x10000>;
			map-exec;
			linux,phandle = <0x4>;
			phandle = <0x4>;
		};

		pruss@4a300000 {
			compatible = "ti,am3352-pruss";
			ti,hwmods = "pruss";
			reg = <0x4a300000 0x2000 0x4a302000 0x2000 0x4a310000 0x3000 0x4a320000 0x2000 0x4a326000 0x2000>;
			reg-names = "dram0", "dram1", "shrdram2", "intc", "cfg";
			interrupts = <0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			linux,phandle = <0xca>;
			phandle = <0xca>;

			pru@4a334000 {
				compatible = "ti,am3352-pru-rproc";
				reg = <0x4a334000 0x2000 0x4a322000 0x400 0x4a322400 0x100>;
				reg-names = "iram", "control", "debug";
				mboxes = <0x28 0x48>;
				linux,phandle = <0xcb>;
				phandle = <0xcb>;
			};

			pru@4a338000 {
				compatible = "ti,am3352-pru-rproc";
				reg = <0x4a338000 0x2000 0x4a324000 0x400 0x4a324400 0x100>;
				reg-names = "iram", "control", "debug";
				mboxes = <0x28 0x49>;
				linux,phandle = <0xcc>;
				phandle = <0xcc>;
			};
		};

		elm@48080000 {
			compatible = "ti,am3352-elm";
			reg = <0x48080000 0x2000>;
			interrupts = <0x4>;
			ti,hwmods = "elm";
			status = "disabled";
			linux,phandle = <0xcd>;
			phandle = <0xcd>;
		};

		lcdc@4830e000 {
			compatible = "ti,am33xx-tilcdc";
			reg = <0x4830e000 0x1000>;
			interrupt-parent = <0x1>;
			interrupts = <0x24>;
			ti,hwmods = "lcdc";
			status = "okay";
			linux,phandle = <0xce>;
			phandle = <0xce>;

			port {

				endpoint@0 {
					remote-endpoint = <0x4a>;
					linux,phandle = <0x32>;
					phandle = <0x32>;
				};
			};
		};

		tscadc@44e0d000 {
			compatible = "ti,am3359-tscadc";
			reg = <0x44e0d000 0x1000>;
			interrupt-parent = <0x1>;
			interrupts = <0x10>;
			ti,hwmods = "adc_tsc";
			status = "disabled";
			linux,phandle = <0xcf>;
			phandle = <0xcf>;

			tsc {
				compatible = "ti,am3359-tsc";
			};

			adc {
				#io-channel-cells = <0x1>;
				compatible = "ti,am3359-adc";
				linux,phandle = <0xd0>;
				phandle = <0xd0>;
			};
		};

		gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,no-idle-on-init;
			reg = <0x50000000 0x2000>;
			interrupts = <0x64>;
			dmas = <0x2a 0x34 0x0>;
			dma-names = "rxtx";
			gpmc,num-cs = <0x7>;
			gpmc,num-waitpins = <0x2>;
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			status = "disabled";
			linux,phandle = <0xd1>;
			phandle = <0xd1>;
		};

		sham@53100000 {
			compatible = "ti,omap4-sham";
			ti,hwmods = "sham";
			reg = <0x53100000 0x200>;
			interrupts = <0x6d>;
			dmas = <0x2a 0x24 0x0>;
			dma-names = "rx";
			status = "okay";
			linux,phandle = <0xd2>;
			phandle = <0xd2>;
		};

		aes@53500000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes";
			reg = <0x53500000 0xa0>;
			interrupts = <0x67>;
			dmas = <0x2a 0x6 0x0 0x2a 0x5 0x0>;
			dma-names = "tx", "rx";
			status = "okay";
			linux,phandle = <0xd3>;
			phandle = <0xd3>;
		};

		mcasp@48038000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp0";
			reg = <0x48038000 0x2000 0x46000000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <0x50 0x51>;
			interrupt-names = "tx", "rx";
			status = "okay";
			dmas = <0x2a 0x8 0x2 0x2a 0x9 0x2>;
			dma-names = "tx", "rx";
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <0x4b>;
			pinctrl-1 = <0x4c>;
			op-mode = <0x0>;
			tdm-slots = <0x2>;
			serial-dir = <0x0 0x0 0x1 0x0>;
			tx-num-evt = <0x1>;
			rx-num-evt = <0x1>;
			linux,phandle = <0x56>;
			phandle = <0x56>;
		};

		mcasp@4803C000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp1";
			reg = <0x4803c000 0x2000 0x46400000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <0x52 0x53>;
			interrupt-names = "tx", "rx";
			status = "okay";
			dmas = <0x2a 0xa 0x2 0x2a 0xb 0x2>;
			dma-names = "tx", "rx";
			linux,phandle = <0xd4>;
			phandle = <0xd4>;
		};

		rng@48310000 {
			compatible = "ti,omap4-rng";
			ti,hwmods = "rng";
			reg = <0x48310000 0x2000>;
			interrupts = <0x6f>;
			linux,phandle = <0xd5>;
			phandle = <0xd5>;
		};

		sgx@0x56000000 {
			compatible = "ti,am3352-sgx530", "img,sgx530";
			ti,hwmods = "gfx";
			reg = <0x56000000 0x1000000>;
			interrupts = <0x25>;
			status = "okay";
			linux,phandle = <0xd6>;
			phandle = <0xd6>;
		};
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <0x4d>;
		compatible = "gpio-leds";

		led@2 {
			label = "beaglebone:green:usr0";
			gpios = <0x4e 0x15 0x0>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};

		led@3 {
			label = "beaglebone:green:usr1";
			gpios = <0x4e 0x16 0x0>;
			linux,default-trigger = "mmc0";
			default-state = "off";
		};

		led@4 {
			label = "beaglebone:green:usr2";
			gpios = <0x4e 0x17 0x0>;
			linux,default-trigger = "cpu0";
			default-state = "off";
		};

		led@5 {
			label = "beaglebone:green:usr3";
			gpios = <0x4e 0x18 0x0>;
			linux,default-trigger = "mmc1";
			default-state = "off";
		};
	};

	fixedregulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		linux,phandle = <0x38>;
		phandle = <0x38>;
	};

	bone_capemgr {
		compatible = "ti,bone-capemgr";
		status = "okay";
		nvmem-cells = <0x4f 0x50 0x51 0x52 0x53>;
		nvmem-cell-names = "baseboard", "slot0", "slot1", "slot2", "slot3";
		#slots = <0x4>;

		baseboardmaps {

			board@0 {
				board-name = "A335BONE";
				compatible-name = "ti,beaglebone";
				linux,phandle = <0xd7>;
				phandle = <0xd7>;
			};

			board@1 {
				board-name = "A335BNLT";
				compatible-name = "ti,beaglebone-black";
				linux,phandle = <0xd8>;
				phandle = <0xd8>;
			};
		};
	};

	clk_mcasp0_fixed {
		#clock-cells = <0x0>;
		compatible = "fixed-clock";
		clock-frequency = <0x1770000>;
		linux,phandle = <0x54>;
		phandle = <0x54>;
	};

	clk_mcasp0 {
		#clock-cells = <0x0>;
		compatible = "gpio-gate-clock";
		clocks = <0x54>;
		enable-gpios = <0x4e 0x1b 0x0>;
		linux,phandle = <0x57>;
		phandle = <0x57>;
	};

	hdmi_audio@0 {
		compatible = "linux,hdmi-audio";
		status = "okay";
		linux,phandle = <0x55>;
		phandle = <0x55>;
	};

	sound {
		compatible = "ti,beaglebone-black-audio";
		ti,model = "TI BeagleBone Black";
		ti,audio-codec = <0x55>;
		ti,mcasp-controller = <0x56>;
		ti,audio-routing = "HDMI Out", "TX";
		clocks = <0x57>;
		clock-names = "mclk";
	};

	__symbols__ {
		ocp = "/ocp";
		l4_wkup = "/ocp/l4_wkup@44c00000";
		wkup_m3 = "/ocp/l4_wkup@44c00000/wkup_m3@100000";
		prcm = "/ocp/l4_wkup@44c00000/prcm@200000";
		prcm_clocks = "/ocp/l4_wkup@44c00000/prcm@200000/clocks";
		clk_32768_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/clk_32768_ck";
		clk_rc32k_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/clk_rc32k_ck";
		virt_19200000_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/virt_19200000_ck";
		virt_24000000_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/virt_24000000_ck";
		virt_25000000_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/virt_25000000_ck";
		virt_26000000_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/virt_26000000_ck";
		tclkin_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/tclkin_ck";
		dpll_core_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_core_ck";
		dpll_core_x2_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_core_x2_ck";
		dpll_core_m4_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_core_m4_ck";
		dpll_core_m5_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_core_m5_ck";
		dpll_core_m6_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_core_m6_ck";
		dpll_mpu_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_mpu_ck";
		dpll_mpu_m2_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_mpu_m2_ck";
		dpll_ddr_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_ddr_ck";
		dpll_ddr_m2_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_ddr_m2_ck";
		dpll_ddr_m2_div2_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_ddr_m2_div2_ck";
		dpll_disp_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_disp_ck";
		dpll_disp_m2_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_disp_m2_ck";
		dpll_per_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_per_ck";
		dpll_per_m2_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_per_m2_ck";
		dpll_per_m2_div4_wkupdm_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_per_m2_div4_wkupdm_ck";
		dpll_per_m2_div4_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_per_m2_div4_ck";
		cefuse_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/cefuse_fck";
		clk_24mhz = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/clk_24mhz";
		clkdiv32k_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/clkdiv32k_ck";
		clkdiv32k_ick = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/clkdiv32k_ick";
		l3_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/l3_gclk";
		pruss_ocp_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/pruss_ocp_gclk";
		mmu_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/mmu_fck";
		timer1_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/timer1_fck";
		timer2_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/timer2_fck";
		timer3_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/timer3_fck";
		timer4_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/timer4_fck";
		timer5_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/timer5_fck";
		timer6_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/timer6_fck";
		timer7_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/timer7_fck";
		usbotg_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/usbotg_fck";
		dpll_core_m4_div2_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dpll_core_m4_div2_ck";
		ieee5000_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/ieee5000_fck";
		wdt1_fck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/wdt1_fck";
		l4_rtc_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/l4_rtc_gclk";
		l4hs_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/l4hs_gclk";
		l3s_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/l3s_gclk";
		l4fw_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/l4fw_gclk";
		l4ls_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/l4ls_gclk";
		sysclk_div_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/sysclk_div_ck";
		cpsw_125mhz_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/cpsw_125mhz_gclk";
		cpsw_cpts_rft_clk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/cpsw_cpts_rft_clk";
		gpio0_dbclk_mux_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/gpio0_dbclk_mux_ck";
		gpio0_dbclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/gpio0_dbclk";
		gpio1_dbclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/gpio1_dbclk";
		gpio2_dbclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/gpio2_dbclk";
		gpio3_dbclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/gpio3_dbclk";
		lcd_gclk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/lcd_gclk";
		mmc_clk = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/mmc_clk";
		gfx_fclk_clksel_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/gfx_fclk_clksel_ck";
		gfx_fck_div_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/gfx_fck_div_ck";
		sysclkout_pre_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/sysclkout_pre_ck";
		clkout2_div_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/clkout2_div_ck";
		dbg_sysclk_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dbg_sysclk_ck";
		dbg_clka_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/dbg_clka_ck";
		stm_pmd_clock_mux_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/stm_pmd_clock_mux_ck";
		trace_pmd_clk_mux_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/trace_pmd_clk_mux_ck";
		stm_clk_div_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/stm_clk_div_ck";
		trace_clk_div_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/trace_clk_div_ck";
		clkout2_ck = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/clkout2_ck";
		prcm_clockdomains = "/ocp/l4_wkup@44c00000/prcm@200000/clockdomains";
		clk_24mhz_clkdm = "/ocp/l4_wkup@44c00000/prcm@200000/clockdomains/clk_24mhz_clkdm";
		scm = "/ocp/l4_wkup@44c00000/scm@210000";
		am33xx_pinmux = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800";
		user_leds_s0 = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/user_leds_s0";
		i2c0_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c0_pins";
		i2c1_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c1_pins";
		i2c2_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c2_pins";
		uart0_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_uart0_pins";
		clkout2_pin = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_clkout2_pin";
		cpsw_default = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/cpsw_default";
		cpsw_sleep = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/cpsw_sleep";
		davinci_mdio_default = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/davinci_mdio_default";
		davinci_mdio_sleep = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/davinci_mdio_sleep";
		mmc1_pins_default = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_mmc1_pins";
		mmc1_pins_sleep = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_mmc1_pins_sleep";
		emmc_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_emmc_pins";
		nxp_hdmi_bonelt_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/nxp_hdmi_bonelt_pins";
		nxp_hdmi_bonelt_off_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/nxp_hdmi_bonelt_off_pins";
		mcasp0_pins = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/mcasp0_pins";
		mcasp0_pins_sleep = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/mcasp0_pins_sleep";
		scm_conf = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0";
		scm_clocks = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks";
		sys_clkin_ck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/sys_clkin_ck";
		adc_tsc_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/adc_tsc_fck";
		dcan0_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/dcan0_fck";
		dcan1_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/dcan1_fck";
		mcasp0_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/mcasp0_fck";
		mcasp1_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/mcasp1_fck";
		smartreflex0_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/smartreflex0_fck";
		smartreflex1_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/smartreflex1_fck";
		sha0_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/sha0_fck";
		aes0_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/aes0_fck";
		rng_fck = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/rng_fck";
		ehrpwm0_tbclk = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/ehrpwm0_tbclk@44e10664";
		ehrpwm1_tbclk = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/ehrpwm1_tbclk@44e10664";
		ehrpwm2_tbclk = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/ehrpwm2_tbclk@44e10664";
		wkup_m3_ipc = "/ocp/l4_wkup@44c00000/scm@210000/wkup_m3_ipc@1324";
		edma_xbar = "/ocp/l4_wkup@44c00000/scm@210000/dma-router@f90";
		scm_clockdomains = "/ocp/l4_wkup@44c00000/scm@210000/clockdomains";
		intc = "/ocp/interrupt-controller@48200000";
		edma = "/ocp/edma@49000000";
		edma_tptc0 = "/ocp/tptc@49800000";
		edma_tptc1 = "/ocp/tptc@49900000";
		edma_tptc2 = "/ocp/tptc@49a00000";
		emif = "/ocp/emif@4c000000";
		gpio0 = "/ocp/gpio@44e07000";
		gpio1 = "/ocp/gpio@4804c000";
		gpio2 = "/ocp/gpio@481ac000";
		gpio3 = "/ocp/gpio@481ae000";
		uart0 = "/ocp/serial@44e09000";
		uart1 = "/ocp/serial@48022000";
		uart2 = "/ocp/serial@48024000";
		uart3 = "/ocp/serial@481a6000";
		uart4 = "/ocp/serial@481a8000";
		uart5 = "/ocp/serial@481aa000";
		i2c0 = "/ocp/i2c@44e0b000";
		tps = "/ocp/i2c@44e0b000/tps@24";
		dcdc1_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@0";
		dcdc2_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@1";
		dcdc3_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@2";
		ldo1_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@3";
		ldo2_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@4";
		ldo3_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@5";
		ldo4_reg = "/ocp/i2c@44e0b000/tps@24/regulators/regulator@6";
		baseboard_eeprom = "/ocp/i2c@44e0b000/baseboard_eeprom@50";
		baseboard_data = "/ocp/i2c@44e0b000/baseboard_eeprom@50/baseboard_data@0";
		hdmi_0 = "/ocp/i2c@44e0b000/tda19988/port/endpoint@0";
		i2c1 = "/ocp/i2c@4802a000";
		i2c2 = "/ocp/i2c@4819c000";
		cape_eeprom0 = "/ocp/i2c@4819c000/cape_eeprom0@54";
		cape0_data = "/ocp/i2c@4819c000/cape_eeprom0@54/cape_data@0";
		cape_eeprom1 = "/ocp/i2c@4819c000/cape_eeprom1@55";
		cape1_data = "/ocp/i2c@4819c000/cape_eeprom1@55/cape_data@0";
		cape_eeprom2 = "/ocp/i2c@4819c000/cape_eeprom2@56";
		cape2_data = "/ocp/i2c@4819c000/cape_eeprom2@56/cape_data@0";
		cape_eeprom3 = "/ocp/i2c@4819c000/cape_eeprom3@57";
		cape3_data = "/ocp/i2c@4819c000/cape_eeprom3@57/cape_data@0";
		mmc1 = "/ocp/mmc@48060000";
		mmc2 = "/ocp/mmc@481d8000";
		mmc3 = "/ocp/mmc@47810000";
		hwspinlock = "/ocp/spinlock@480ca000";
		wdt2 = "/ocp/wdt@44e35000";
		dcan0 = "/ocp/can@481cc000";
		dcan1 = "/ocp/can@481d0000";
		mailbox = "/ocp/mailbox@480C8000";
		mbox_wkupm3 = "/ocp/mailbox@480C8000/wkup_m3";
		mbox_pru0 = "/ocp/mailbox@480C8000/mbox_pru0";
		mbox_pru1 = "/ocp/mailbox@480C8000/mbox_pru1";
		timer1 = "/ocp/timer@44e31000";
		timer2 = "/ocp/timer@48040000";
		timer3 = "/ocp/timer@48042000";
		timer4 = "/ocp/timer@48044000";
		timer5 = "/ocp/timer@48046000";
		timer6 = "/ocp/timer@48048000";
		timer7 = "/ocp/timer@4804a000";
		rtc = "/ocp/rtc@44e3e000";
		spi0 = "/ocp/spi@48030000";
		spi1 = "/ocp/spi@481a0000";
		usb = "/ocp/usb@47400000";
		usb_ctrl_mod = "/ocp/usb@47400000/control@44e10620";
		usb0_phy = "/ocp/usb@47400000/usb-phy@47401300";
		usb0 = "/ocp/usb@47400000/usb@47401000";
		usb1_phy = "/ocp/usb@47400000/usb-phy@47401b00";
		usb1 = "/ocp/usb@47400000/usb@47401800";
		cppi41dma = "/ocp/usb@47400000/dma-controller@47402000";
		epwmss0 = "/ocp/epwmss@48300000";
		ecap0 = "/ocp/epwmss@48300000/ecap@48300100";
		ehrpwm0 = "/ocp/epwmss@48300000/ehrpwm@48300200";
		eqep0 = "/ocp/epwmss@48300000/eqep@0x48300180";
		epwmss1 = "/ocp/epwmss@48302000";
		ecap1 = "/ocp/epwmss@48302000/ecap@48302100";
		ehrpwm1 = "/ocp/epwmss@48302000/ehrpwm@48302200";
		eqep1 = "/ocp/epwmss@48302000/eqep@0x48302180";
		epwmss2 = "/ocp/epwmss@48304000";
		ecap2 = "/ocp/epwmss@48304000/ecap@48304100";
		ehrpwm2 = "/ocp/epwmss@48304000/ehrpwm@48304200";
		eqep2 = "/ocp/epwmss@48304000/eqep@0x48304180";
		mac = "/ocp/ethernet@4a100000";
		davinci_mdio = "/ocp/ethernet@4a100000/mdio@4a101000";
		cpsw_emac0 = "/ocp/ethernet@4a100000/slave@4a100200";
		cpsw_emac1 = "/ocp/ethernet@4a100000/slave@4a100300";
		phy_sel = "/ocp/ethernet@4a100000/cpsw-phy-sel@44e10650";
		ocmcram = "/ocp/ocmcram@40300000";
		pruss = "/ocp/pruss@4a300000";
		pru0 = "/ocp/pruss@4a300000/pru@4a334000";
		pru1 = "/ocp/pruss@4a300000/pru@4a338000";
		elm = "/ocp/elm@48080000";
		lcdc = "/ocp/lcdc@4830e000";
		lcdc_0 = "/ocp/lcdc@4830e000/port/endpoint@0";
		tscadc = "/ocp/tscadc@44e0d000";
		am335x_adc = "/ocp/tscadc@44e0d000/adc";
		gpmc = "/ocp/gpmc@50000000";
		sham = "/ocp/sham@53100000";
		aes = "/ocp/aes@53500000";
		mcasp0 = "/ocp/mcasp@48038000";
		mcasp1 = "/ocp/mcasp@4803C000";
		rng = "/ocp/rng@48310000";
		sgx = "/ocp/sgx@0x56000000";
		vmmcsd_fixed = "/fixedregulator@0";
		baseboard_beaglebone = "/bone_capemgr/baseboardmaps/board@0";
		baseboard_beaglebone_black = "/bone_capemgr/baseboardmaps/board@1";
		clk_mcasp0_fixed = "/clk_mcasp0_fixed";
		clk_mcasp0 = "/clk_mcasp0";
		hdmi_audio = "/hdmi_audio@0";
	};

	__local_fixups__ {
		interrupt-parent = <0x0>;

		cpus {

			cpu@0 {
				clocks = <0x0>;
				cpu0-supply = <0x0>;
			};
		};

		soc {

			mpu {
				sram = <0x0>;
			};
		};

		ocp {

			l4_wkup@44c00000 {

				prcm@200000 {

					clocks {

						dpll_core_ck {
							clocks = <0x0 0x4>;
						};

						dpll_core_x2_ck {
							clocks = <0x0>;
						};

						dpll_core_m4_ck {
							clocks = <0x0>;
						};

						dpll_core_m5_ck {
							clocks = <0x0>;
						};

						dpll_core_m6_ck {
							clocks = <0x0>;
						};

						dpll_mpu_ck {
							clocks = <0x0 0x4>;
						};

						dpll_mpu_m2_ck {
							clocks = <0x0>;
						};

						dpll_ddr_ck {
							clocks = <0x0 0x4>;
						};

						dpll_ddr_m2_ck {
							clocks = <0x0>;
						};

						dpll_ddr_m2_div2_ck {
							clocks = <0x0>;
						};

						dpll_disp_ck {
							clocks = <0x0 0x4>;
						};

						dpll_disp_m2_ck {
							clocks = <0x0>;
						};

						dpll_per_ck {
							clocks = <0x0 0x4>;
						};

						dpll_per_m2_ck {
							clocks = <0x0>;
						};

						dpll_per_m2_div4_wkupdm_ck {
							clocks = <0x0>;
						};

						dpll_per_m2_div4_ck {
							clocks = <0x0>;
						};

						cefuse_fck {
							clocks = <0x0>;
						};

						clk_24mhz {
							clocks = <0x0>;
						};

						clkdiv32k_ck {
							clocks = <0x0>;
						};

						clkdiv32k_ick {
							clocks = <0x0>;
						};

						l3_gclk {
							clocks = <0x0>;
						};

						pruss_ocp_gclk {
							clocks = <0x0 0x4>;
						};

						mmu_fck {
							clocks = <0x0>;
						};

						timer1_fck {
							clocks = <0x0 0x4 0x8 0xc 0x10>;
						};

						timer2_fck {
							clocks = <0x0 0x4 0x8>;
						};

						timer3_fck {
							clocks = <0x0 0x4 0x8>;
						};

						timer4_fck {
							clocks = <0x0 0x4 0x8>;
						};

						timer5_fck {
							clocks = <0x0 0x4 0x8>;
						};

						timer6_fck {
							clocks = <0x0 0x4 0x8>;
						};

						timer7_fck {
							clocks = <0x0 0x4 0x8>;
						};

						usbotg_fck {
							clocks = <0x0>;
						};

						dpll_core_m4_div2_ck {
							clocks = <0x0>;
						};

						ieee5000_fck {
							clocks = <0x0>;
						};

						wdt1_fck {
							clocks = <0x0 0x4>;
						};

						l4_rtc_gclk {
							clocks = <0x0>;
						};

						l4hs_gclk {
							clocks = <0x0>;
						};

						l3s_gclk {
							clocks = <0x0>;
						};

						l4fw_gclk {
							clocks = <0x0>;
						};

						l4ls_gclk {
							clocks = <0x0>;
						};

						sysclk_div_ck {
							clocks = <0x0>;
						};

						cpsw_125mhz_gclk {
							clocks = <0x0>;
						};

						cpsw_cpts_rft_clk {
							clocks = <0x0 0x4>;
						};

						gpio0_dbclk_mux_ck {
							clocks = <0x0 0x4 0x8>;
						};

						gpio0_dbclk {
							clocks = <0x0>;
						};

						gpio1_dbclk {
							clocks = <0x0>;
						};

						gpio2_dbclk {
							clocks = <0x0>;
						};

						gpio3_dbclk {
							clocks = <0x0>;
						};

						lcd_gclk {
							clocks = <0x0 0x4 0x8>;
						};

						mmc_clk {
							clocks = <0x0>;
						};

						gfx_fclk_clksel_ck {
							clocks = <0x0 0x4>;
						};

						gfx_fck_div_ck {
							clocks = <0x0>;
						};

						sysclkout_pre_ck {
							clocks = <0x0 0x4 0x8 0xc 0x10>;
						};

						clkout2_div_ck {
							clocks = <0x0>;
						};

						dbg_sysclk_ck {
							clocks = <0x0>;
						};

						dbg_clka_ck {
							clocks = <0x0>;
						};

						stm_pmd_clock_mux_ck {
							clocks = <0x0 0x4>;
						};

						trace_pmd_clk_mux_ck {
							clocks = <0x0 0x4>;
						};

						stm_clk_div_ck {
							clocks = <0x0>;
						};

						trace_clk_div_ck {
							clocks = <0x0>;
						};

						clkout2_ck {
							clocks = <0x0>;
						};
					};

					clockdomains {

						clk_24mhz_clkdm {
							clocks = <0x0>;
						};
					};
				};

				scm@210000 {

					pinmux@800 {
						pinctrl-0 = <0x0>;
					};

					scm_conf@0 {

						clocks {

							sys_clkin_ck {
								clocks = <0x0 0x4 0x8 0xc>;
							};

							adc_tsc_fck {
								clocks = <0x0>;
							};

							dcan0_fck {
								clocks = <0x0>;
							};

							dcan1_fck {
								clocks = <0x0>;
							};

							mcasp0_fck {
								clocks = <0x0>;
							};

							mcasp1_fck {
								clocks = <0x0>;
							};

							smartreflex0_fck {
								clocks = <0x0>;
							};

							smartreflex1_fck {
								clocks = <0x0>;
							};

							sha0_fck {
								clocks = <0x0>;
							};

							aes0_fck {
								clocks = <0x0>;
							};

							rng_fck {
								clocks = <0x0>;
							};

							ehrpwm0_tbclk@44e10664 {
								clocks = <0x0>;
							};

							ehrpwm1_tbclk@44e10664 {
								clocks = <0x0>;
							};

							ehrpwm2_tbclk@44e10664 {
								clocks = <0x0>;
							};
						};
					};

					wkup_m3_ipc@1324 {
						ti,rproc = <0x0>;
						mboxes = <0x0 0x4>;
					};

					dma-router@f90 {
						dma-masters = <0x0>;
					};
				};
			};

			edma@49000000 {
				ti,tptcs = <0x0 0x8 0x10>;
			};

			emif@4c000000 {
				sram = <0x0>;
			};

			serial@44e09000 {
				dmas = <0x0 0xc>;
				pinctrl-0 = <0x0>;
			};

			serial@48022000 {
				dmas = <0x0 0xc>;
			};

			serial@48024000 {
				dmas = <0x0 0xc>;
			};

			i2c@44e0b000 {
				pinctrl-0 = <0x0>;

				tps@24 {
					interrupt-parent = <0x0>;
				};

				tda19988 {
					pinctrl-0 = <0x0>;
					pinctrl-1 = <0x0>;

					port {

						endpoint@0 {
							remote-endpoint = <0x0>;
						};
					};
				};
			};

			i2c@4819c000 {
				pinctrl-0 = <0x0>;
			};

			mmc@48060000 {
				dmas = <0x0 0x10>;
				interrupt-parent = <0x0>;
				pinctrl-0 = <0x0>;
				pinctrl-1 = <0x0>;
				cd-gpios = <0x0>;
				vmmc-supply = <0x0>;
			};

			mmc@481d8000 {
				dmas = <0x0 0xc>;
				interrupt-parent = <0x0>;
				vmmc-supply = <0x0>;
				pinctrl-0 = <0x0>;
			};

			mmc@47810000 {
				interrupt-parent = <0x0>;
			};

			can@481cc000 {
				clocks = <0x0>;
				syscon-raminit = <0x0>;
			};

			can@481d0000 {
				clocks = <0x0>;
				syscon-raminit = <0x0>;
			};

			spi@48030000 {
				dmas = <0x0 0xc 0x18 0x24>;
			};

			spi@481a0000 {
				dmas = <0x0 0xc 0x18 0x24>;
			};

			usb@47400000 {

				usb-phy@47401300 {
					ti,ctrl_mod = <0x0>;
				};

				usb@47401000 {
					phys = <0x0>;
					dmas = <0x0 0xc 0x18 0x24 0x30 0x3c 0x48 0x54 0x60 0x6c 0x78 0x84 0x90 0x9c 0xa8 0xb4 0xc0 0xcc 0xd8 0xe4 0xf0 0xfc 0x108 0x114 0x120 0x12c 0x138 0x144 0x150 0x15c>;
				};

				usb-phy@47401b00 {
					ti,ctrl_mod = <0x0>;
				};

				usb@47401800 {
					phys = <0x0>;
					dmas = <0x0 0xc 0x18 0x24 0x30 0x3c 0x48 0x54 0x60 0x6c 0x78 0x84 0x90 0x9c 0xa8 0xb4 0xc0 0xcc 0xd8 0xe4 0xf0 0xfc 0x108 0x114 0x120 0x12c 0x138 0x144 0x150 0x15c>;
				};
			};

			epwmss@48300000 {

				eqep@0x48300180 {
					interrupt-parent = <0x0>;
				};
			};

			epwmss@48302000 {

				eqep@0x48302180 {
					interrupt-parent = <0x0>;
				};
			};

			epwmss@48304000 {

				eqep@0x48304180 {
					interrupt-parent = <0x0>;
				};
			};

			ethernet@4a100000 {
				clocks = <0x0 0x4>;
				interrupt-parent = <0x0>;
				syscon = <0x0>;
				pinctrl-0 = <0x0>;
				pinctrl-1 = <0x0>;

				mdio@4a101000 {
					pinctrl-0 = <0x0>;
					pinctrl-1 = <0x0>;
				};

				slave@4a100200 {
					phy_id = <0x0>;
				};
			};

			pruss@4a300000 {

				pru@4a334000 {
					mboxes = <0x0 0x4>;
				};

				pru@4a338000 {
					mboxes = <0x0 0x4>;
				};
			};

			lcdc@4830e000 {
				interrupt-parent = <0x0>;

				port {

					endpoint@0 {
						remote-endpoint = <0x0>;
					};
				};
			};

			tscadc@44e0d000 {
				interrupt-parent = <0x0>;
			};

			gpmc@50000000 {
				dmas = <0x0>;
			};

			sham@53100000 {
				dmas = <0x0>;
			};

			aes@53500000 {
				dmas = <0x0 0xc>;
			};

			mcasp@48038000 {
				dmas = <0x0 0xc>;
				pinctrl-0 = <0x0>;
				pinctrl-1 = <0x0>;
			};

			mcasp@4803C000 {
				dmas = <0x0 0xc>;
			};
		};

		leds {
			pinctrl-0 = <0x0>;

			led@2 {
				gpios = <0x0>;
			};

			led@3 {
				gpios = <0x0>;
			};

			led@4 {
				gpios = <0x0>;
			};

			led@5 {
				gpios = <0x0>;
			};
		};

		bone_capemgr {
			nvmem-cells = <0x0 0x4 0x8 0xc 0x10>;
		};

		clk_mcasp0 {
			clocks = <0x0>;
			enable-gpios = <0x0>;
		};

		sound {
			ti,audio-codec = <0x0>;
			ti,mcasp-controller = <0x0>;
			clocks = <0x0>;
		};
	};
};