diff --git a/llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp b/llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp
index 62aa7f700d414a..2090878d20c1b8 100644
--- a/llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp
+++ b/llvm/lib/Target/SBF/MCTargetDesc/SBFAsmBackend.cpp
@@ -27,8 +27,6 @@ class SBFAsmBackend : public MCAsmBackend {
   SBFAsmBackend(endianness Endian, const MCSubtargetInfo &STI)
       : MCAsmBackend(Endian),
         isSBFv2(STI.getCPU() == "sbfv2"),
-        isSolana(STI.hasFeature(SBF::FeatureSolana) ||
-                 STI.getTargetTriple().getArch() == Triple::sbf),
         relocAbs64(STI.hasFeature(SBF::FeatureRelocAbs64)) {}
   ~SBFAsmBackend() override = default;
 
@@ -53,7 +51,6 @@ class SBFAsmBackend : public MCAsmBackend {
                     const MCSubtargetInfo *STI) const override;
 private:
   bool isSBFv2;
-  bool isSolana;
   bool relocAbs64;
 };
 
@@ -110,7 +107,7 @@ void SBFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
 
 std::unique_ptr<MCObjectTargetWriter>
 SBFAsmBackend::createObjectTargetWriter() const {
-  return createSBFELFObjectWriter(0, isSolana, relocAbs64, isSBFv2);
+  return createSBFELFObjectWriter(0, relocAbs64, isSBFv2);
 }
 
 MCAsmBackend *llvm::createSBFAsmBackend(const Target &T,
diff --git a/llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp b/llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp
index 8e5b7353119b21..ea5307ed13767e 100644
--- a/llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp
+++ b/llvm/lib/Target/SBF/MCTargetDesc/SBFELFObjectWriter.cpp
@@ -22,7 +22,7 @@ namespace {
 
 class SBFELFObjectWriter : public MCELFObjectTargetWriter {
 public:
-  SBFELFObjectWriter(uint8_t OSABI, bool isSolana, bool relocAbs64, bool isSBFv2);
+  SBFELFObjectWriter(uint8_t OSABI, bool relocAbs64, bool isSBFv2);
   ~SBFELFObjectWriter() override = default;
 
 protected:
@@ -32,7 +32,6 @@ class SBFELFObjectWriter : public MCELFObjectTargetWriter {
   bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym,
                                unsigned Type) const override;
 private:
-  bool isSolana;
   bool relocAbs64;
 };
 
@@ -45,15 +44,15 @@ class SBFELFObjectWriter : public MCELFObjectTargetWriter {
 bool SBFELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
                                                  const MCSymbol &Sym,
                                                  unsigned Type) const {
-  return isSolana;
+  return true;
 }
 
-SBFELFObjectWriter::SBFELFObjectWriter(uint8_t OSABI, bool isSolana,
+SBFELFObjectWriter::SBFELFObjectWriter(uint8_t OSABI,
                                        bool relocAbs64, bool isSBFv2)
   : MCELFObjectTargetWriter(/*Is64Bit*/ true, OSABI,
                             isSBFv2 ? ELF::EM_SBF : ELF::EM_BPF,
                             /*HasRelocationAddend*/ false),
-      isSolana(isSolana), relocAbs64(relocAbs64) {}
+      relocAbs64(relocAbs64) {}
 
 unsigned SBFELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
                                           const MCFixup &Fixup,
@@ -73,7 +72,7 @@ unsigned SBFELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
     Ctx.reportError(Fixup.getLoc(), "2-byte relocations not supported");
     return ELF::R_SBF_NONE;
   case FK_Data_8:
-    return (isSolana && !relocAbs64) ? ELF::R_SBF_64_64 : ELF::R_SBF_64_ABS64;
+    return relocAbs64 ? ELF::R_SBF_64_ABS64 : ELF::R_SBF_64_64;
   case FK_Data_4:
     if (const MCSymbolRefExpr *A = Target.getSymA()) {
       const MCSymbol &Sym = A->getSymbol();
@@ -106,11 +105,11 @@ unsigned SBFELFObjectWriter::getRelocType(MCContext &Ctx, const MCValue &Target,
             return ELF::R_SBF_64_ABS32;
       }
     }
-    return isSolana ? ELF::R_SBF_64_32 : ELF::R_SBF_64_ABS32;
+    return ELF::R_SBF_64_32;
   }
 }
 
 std::unique_ptr<MCObjectTargetWriter>
-llvm::createSBFELFObjectWriter(uint8_t OSABI, bool isSolana, bool useRelocAbs64, bool isSBFv2) {
-  return std::make_unique<SBFELFObjectWriter>(OSABI, isSolana, useRelocAbs64, isSBFv2);
+llvm::createSBFELFObjectWriter(uint8_t OSABI, bool useRelocAbs64, bool isSBFv2) {
+  return std::make_unique<SBFELFObjectWriter>(OSABI, useRelocAbs64, isSBFv2);
 }
diff --git a/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h b/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h
index 81b11b57b3a5a9..f6cc55b67d2473 100644
--- a/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h
+++ b/llvm/lib/Target/SBF/MCTargetDesc/SBFMCTargetDesc.h
@@ -43,7 +43,7 @@ MCAsmBackend *createSBFbeAsmBackend(const Target &T, const MCSubtargetInfo &STI,
                                     const MCTargetOptions &Options);
 
 std::unique_ptr<MCObjectTargetWriter>
-createSBFELFObjectWriter(uint8_t OSABI, bool isSolana, bool useRelocAbs64, bool isSBFv2);
+createSBFELFObjectWriter(uint8_t OSABI, bool useRelocAbs64, bool isSBFv2);
 } // namespace llvm
 
 // Defines symbolic names for SBF registers.  This defines a mapping from
diff --git a/llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp b/llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp
index 6363d8d4ec0d42..5375e317b174dd 100644
--- a/llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp
@@ -191,22 +191,7 @@ void SBFDAGToDAGISel::Select(SDNode *Node) {
   switch (Opcode) {
   default:
     break;
-
-  case ISD::SDIV: {
-    if (!Subtarget->isSolana()) {
-      DebugLoc Empty;
-      const DebugLoc &DL = Node->getDebugLoc();
-      if (DL != Empty)
-        errs() << "Error at line " << DL.getLine() << ": ";
-      else
-        errs() << "Error: ";
-      errs() << "Unsupport signed division for DAG: ";
-      Node->print(errs(), CurDAG);
-      errs() << "\nPlease convert to unsigned div/mod.\n";
-    }
-    break;
-  }
-
+    
   case ISD::FrameIndex: {
     int FI = cast<FrameIndexSDNode>(Node)->getIndex();
     EVT VT = Node->getValueType(0);
diff --git a/llvm/lib/Target/SBF/SBFISelLowering.cpp b/llvm/lib/Target/SBF/SBFISelLowering.cpp
index 7c2a2b75f59b93..ab6837fb72167d 100644
--- a/llvm/lib/Target/SBF/SBFISelLowering.cpp
+++ b/llvm/lib/Target/SBF/SBFISelLowering.cpp
@@ -79,51 +79,29 @@ SBFTargetLowering::SBFTargetLowering(const TargetMachine &TM,
   setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
 
   for (auto VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i64}) {
-    if (Subtarget->isSolana()) {
-      // Implement custom lowering for all atomic operations
-      setOperationAction(ISD::ATOMIC_SWAP, VT, Custom);
-      setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Custom);
-      setOperationAction(ISD::ATOMIC_CMP_SWAP, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_AND, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_MAX, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_MIN, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_NAND, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_OR, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_UMAX, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_UMIN, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD_XOR, VT, Custom);
-      setOperationAction(ISD::ATOMIC_LOAD, VT, Expand);
-      setOperationAction(ISD::ATOMIC_STORE, VT, Expand);
-      continue;
-    }
-
-    if (VT == MVT::i64) {
-      continue;
-    }
-
-    // Set unsupported atomic operations as Custom so we can emit better error
-    // messages than fatal error from selectiondag.
-    if (VT == MVT::i32) {
-      if (STI.getHasAlu32())
-        continue;
-    } else {
-      setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom);
-    }
-
+    // Implement custom lowering for all atomic operations
+    setOperationAction(ISD::ATOMIC_SWAP, VT, Custom);
+    setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Custom);
+    setOperationAction(ISD::ATOMIC_CMP_SWAP, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom);
     setOperationAction(ISD::ATOMIC_LOAD_AND, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD_MAX, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD_MIN, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD_NAND, VT, Custom);
     setOperationAction(ISD::ATOMIC_LOAD_OR, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD_UMAX, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD_UMIN, VT, Custom);
     setOperationAction(ISD::ATOMIC_LOAD_XOR, VT, Custom);
-    setOperationAction(ISD::ATOMIC_SWAP, VT, Custom);
-    setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD, VT, Expand);
+    setOperationAction(ISD::ATOMIC_STORE, VT, Expand);
   }
 
   for (auto VT : { MVT::i32, MVT::i64 }) {
     if (VT == MVT::i32 && !STI.getHasAlu32())
       continue;
 
-    if (Subtarget->isSolana() && !STI.getHasPqrClass()) {
+    if (!STI.getHasPqrClass()) {
       setOperationAction(ISD::SDIV, VT, Expand);
       setOperationAction(ISD::SREM, VT, Expand);
       setOperationAction(ISD::MULHU, VT, Expand);
@@ -151,17 +129,10 @@ SBFTargetLowering::SBFTargetLowering(const TargetMachine &TM,
     setOperationAction(ISD::BR_CC, MVT::i32, Promote);
   }
 
-  if (Subtarget->isSolana()) {
-    setOperationAction(ISD::CTTZ, MVT::i64, Expand);
-    setOperationAction(ISD::CTLZ, MVT::i64, Expand);
-    setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
-    setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
-  } else {
-    setOperationAction(ISD::CTTZ, MVT::i64, Custom);
-    setOperationAction(ISD::CTLZ, MVT::i64, Custom);
-    setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Custom);
-    setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom);
-  }
+  setOperationAction(ISD::CTTZ, MVT::i64, Expand);
+  setOperationAction(ISD::CTLZ, MVT::i64, Expand);
+  setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
+  setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
 
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8, Expand);
@@ -203,7 +174,6 @@ SBFTargetLowering::SBFTargetLowering(const TargetMachine &TM,
     MaxLoadsPerMemcmp = 0;
   } else {
     auto SelectionDAGInfo = STI.getSelectionDAGInfo();
-    SelectionDAGInfo->setSolanaFlag(STI.isSolana());
     // inline memcpy() for kernel to see explicit copy
     unsigned CommonMaxStores =
       SelectionDAGInfo->getCommonMaxStoresPerMemFunc();
@@ -217,7 +187,7 @@ SBFTargetLowering::SBFTargetLowering(const TargetMachine &TM,
   // CPU/Feature control
   HasAlu32 = STI.getHasAlu32();
   HasJmpExt = STI.getHasJmpExt();
-  SBFRegisterInfo::FrameLength = STI.isSolana() ? 4096 : 512;
+  SBFRegisterInfo::FrameLength = 4096;
 }
 
 bool SBFTargetLowering::allowsMisalignedMemoryAccesses(
@@ -225,11 +195,11 @@ bool SBFTargetLowering::allowsMisalignedMemoryAccesses(
   if (!VT.isSimple()) {
     return false;
   }
-  bool isSolana = Subtarget->isSolana();
-  if (isSolana && Fast) {
+
+  if (Fast) {
     *Fast = 1;
   }
-  return isSolana;
+  return true;
 }
 
 bool SBFTargetLowering::isOffsetFoldingLegal(
@@ -324,16 +294,8 @@ void SBFTargetLowering::ReplaceNodeResults(SDNode *N,
   case ISD::ATOMIC_LOAD_UMAX:
   case ISD::ATOMIC_LOAD_UMIN:
   case ISD::ATOMIC_LOAD_XOR:
-    if (Subtarget->isSolana()) {
-      // We do lowering during legalization, see LowerOperation()
-      return;
-    }
-
-    if (HasAlu32 || Opcode == ISD::ATOMIC_LOAD_ADD)
-      err_msg = "Unsupported atomic operations, please use 32/64 bit version";
-    else
-      err_msg = "Unsupported atomic operations, please use 64 bit version";
-    break;
+    // We do lowering during legalization, see LowerOperation()
+    return;
   }
 
   SDLoc DL(N);
@@ -393,7 +355,7 @@ SDValue SBFTargetLowering::LowerFormalArguments(
   // Assign locations to all of the incoming arguments.
   SmallVector<CCValAssign, 16> ArgLocs;
   CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
-  if (Subtarget->isSolana() && Ins.size() > MaxArgs) {
+  if (Ins.size() > MaxArgs) {
     if (Subtarget->getEnableNewCallConvention()) {
       // Pass args 1-5 via registers, remaining args via stack.
       CCInfo.AnalyzeFormalArguments(Ins, getHasAlu32() ? CC_SBF32 : CC_SBF64);
@@ -442,7 +404,7 @@ SDValue SBFTargetLowering::LowerFormalArguments(
 
         break;
       }
-    } else if (Subtarget->isSolana()) {
+    } else {
       // Argument passed via stack
       assert(VA.isMemLoc() && "Should be isMemLoc");
 
@@ -481,18 +443,11 @@ SDValue SBFTargetLowering::LowerFormalArguments(
       }
 
       InVals.push_back(SDV);
-    } else {
-      fail(DL, DAG, "defined with too many args");
-      InVals.push_back(DAG.getConstant(0, DL, VA.getLocVT()));
     }
   }
 
-  if (Subtarget->isSolana()) {
-    if (IsVarArg) {
-      fail(DL, DAG, "Functions with VarArgs are not supported");
-    }
-  } else if (IsVarArg || MF.getFunction().hasStructRetAttr()) {
-    fail(DL, DAG, "functions with VarArgs or StructRet are not supported");
+  if (IsVarArg) {
+    fail(DL, DAG, "Functions with VarArgs are not supported");
   }
 
   return Chain;
@@ -527,7 +482,7 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
   // Analyze operands of the call, assigning locations to each operand.
   SmallVector<CCValAssign, 16> ArgLocs;
   CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());
-  if (Subtarget->isSolana() && Outs.size() > MaxArgs) {
+  if (Outs.size() > MaxArgs) {
     if (Subtarget->getEnableNewCallConvention()) {
       // Pass args 1-5 via registers, remaining args via stack
       CCInfo.AnalyzeCallOperands(Outs, getHasAlu32() ? CC_SBF32 : CC_SBF64);
@@ -543,18 +498,6 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
 
   unsigned NumBytes = CCInfo.getStackSize();
 
-  if (!Subtarget->isSolana()) {
-    if (Outs.size() > MaxArgs)
-      fail(CLI.DL, DAG, "too many args to ", Callee);
-
-    for (auto &Arg : Outs) {
-      ISD::ArgFlagsTy Flags = Arg.Flags;
-      if (!Flags.isByVal())
-        continue;
-
-      fail(CLI.DL, DAG, "pass by value not supported ", Callee);
-    }
-  }
 
   auto PtrVT = getPointerTy(MF.getDataLayout());
   Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, CLI.DL);
@@ -564,7 +507,7 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
   // Walk arg assignments
   bool HasStackArgs = false;
   unsigned e, i, ae = ArgLocs.size();
-  for (i = 0, e = (Subtarget->isSolana()) ? ae : std::min(ae, MaxArgs); i != e; ++i) {
+  for (i = 0, e = ae; i != e; ++i) {
     CCValAssign &VA = ArgLocs[i];
     SDValue Arg = OutVals[i];
 
@@ -585,7 +528,7 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
       break;
     }
 
-    if (Subtarget->isSolana() && VA.isMemLoc()) {
+    if (VA.isMemLoc()) {
       HasStackArgs = true;
       break;
     }
@@ -671,12 +614,6 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
                                         G->getOffset(), 0);
   } else if (ExternalSymbolSDNode *E = dyn_cast<ExternalSymbolSDNode>(Callee)) {
     Callee = DAG.getTargetExternalSymbol(E->getSymbol(), PtrVT, 0);
-    // This is not a warning but info, will be resolved on load
-    if (!Subtarget->isSolana()) {
-      fail(CLI.DL, DAG, Twine("A call to built-in function '"
-                              + StringRef(E->getSymbol())
-                              + "' remains unresolved"));
-    }
   }
 
   // Returns a chain & a flag for retval copy to use.
@@ -713,15 +650,12 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
 }
 
 bool SBFTargetLowering::shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const {
-  return Subtarget->isSolana() && (IsSigned || Type == MVT::i32);
+  return IsSigned || Type == MVT::i32;
 }
 
 bool SBFTargetLowering::CanLowerReturn(
     CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg,
     const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const {
-  if (!Subtarget->isSolana()) {
-    return true;
-  }
   // At minimal return Outs.size() <= 1, or check valid types in CC.
   SmallVector<CCValAssign, 16> RVLocs;
   CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context);
@@ -743,14 +677,9 @@ SBFTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
   // CCState - Info about the registers and stack slot.
   CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext());
 
-  if (Subtarget->isSolana()) {
-    if (Outs.size() > 1) {
-      fail(DL, DAG, "Only a single return supported");
-      assert(false);
-    }
-  } else if (MF.getFunction().getReturnType()->isAggregateType()) {
-    fail(DL, DAG, "only integer returns supported");
-    return DAG.getNode(Opc, DL, MVT::Other, Chain);
+  if (Outs.size() > 1) {
+    fail(DL, DAG, "Only a single return supported");
+    assert(false);
   }
 
   // Analize return values.
@@ -791,16 +720,9 @@ SDValue SBFTargetLowering::LowerCallResult(
   SmallVector<CCValAssign, 16> RVLocs;
   CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext());
 
-  if (Subtarget->isSolana()) {
-    if (Ins.size() > 1) {
-      fail(DL, DAG, "Only a single return supported");
-      assert(false);
-    }
-  } else if (Ins.size() >= 2) {
-    fail(DL, DAG, "only small returns supported");
-    for (unsigned i = 0, e = Ins.size(); i != e; ++i)
-      InVals.push_back(DAG.getConstant(0, DL, Ins[i].VT));
-    return DAG.getCopyFromReg(Chain, DL, 1, Ins[0].VT, InGlue).getValue(1);
+  if (Ins.size() > 1) {
+    fail(DL, DAG, "Only a single return supported");
+    assert(false);
   }
 
   CCInfo.AnalyzeCallResult(Ins, getHasAlu32() ? RetCC_SBF32 : RetCC_SBF64);
diff --git a/llvm/lib/Target/SBF/SBFInstrInfo.td b/llvm/lib/Target/SBF/SBFInstrInfo.td
index 4bc620a97e81ba..e61f7ff70515fe 100644
--- a/llvm/lib/Target/SBF/SBFInstrInfo.td
+++ b/llvm/lib/Target/SBF/SBFInstrInfo.td
@@ -54,7 +54,6 @@ def SBFIsLittleEndian : Predicate<"CurDAG->getDataLayout().isLittleEndian()">;
 def SBFIsBigEndian    : Predicate<"!CurDAG->getDataLayout().isLittleEndian()">;
 def SBFHasALU32 : Predicate<"Subtarget->getHasAlu32()">;
 def SBFNoALU32 : Predicate<"!Subtarget->getHasAlu32()">;
-def SBFSubtargetSolana : Predicate<"Subtarget->isSolana()">;
 def SBFHasLddw : Predicate<"!Subtarget->getNoLddw()">;
 def SBFNoLddw : Predicate<"Subtarget->getNoLddw()">;
 def SBFHasNeg : Predicate<"!Subtarget->getDisableNeg()">;
@@ -819,7 +818,7 @@ def : Pat<(atomic_load_sub_32 ADDRri:$addr, GPR32:$val),
 def : Pat<(atomic_load_sub_64 ADDRri:$addr, GPR:$val),
           (XFADDD ADDRri:$addr, (NEG_64 GPR:$val))>;
 
-let Predicates = [SBFSubtargetSolana], usesCustomInserter = 1, isCodeGenOnly = 1 in {
+let usesCustomInserter = 1, isCodeGenOnly = 1 in {
   def ATOMIC_FENCE : Pseudo<
     (outs),
     (ins),
diff --git a/llvm/lib/Target/SBF/SBFPreserveDIType.cpp b/llvm/lib/Target/SBF/SBFPreserveDIType.cpp
index ac21f37d109dda..de5b217fe549dc 100644
--- a/llvm/lib/Target/SBF/SBFPreserveDIType.cpp
+++ b/llvm/lib/Target/SBF/SBFPreserveDIType.cpp
@@ -55,7 +55,7 @@ static bool SBFPreserveDITypeImpl(Function &F) {
       if (!GV)
         continue;
 
-      if (GV->getName().startswith("llvm.bpf.btf.type.id")) {
+      if (GV->getName().starts_with("llvm.bpf.btf.type.id")) {
         if (!Call->getMetadata(LLVMContext::MD_preserve_access_index))
           report_fatal_error(
               "Missing metadata for llvm.bpf.btf.type.id intrinsic");
diff --git a/llvm/lib/Target/SBF/SBFRegisterInfo.cpp b/llvm/lib/Target/SBF/SBFRegisterInfo.cpp
index 699d2d0f98f075..de9659bf66f92d 100644
--- a/llvm/lib/Target/SBF/SBFRegisterInfo.cpp
+++ b/llvm/lib/Target/SBF/SBFRegisterInfo.cpp
@@ -54,28 +54,19 @@ static void WarnSize(int Offset, MachineFunction &MF, DebugLoc& DL)
     }
     OldMF = &(MF.getFunction());
 
-    if (MF.getSubtarget<SBFSubtarget>().isSolana()) {
-      dbgs() << "Error:";
-      if (DL) {
-        dbgs() << " ";
-        DL.print(dbgs());
-      }
-      uint64_t StackSize = MF.getFrameInfo().getStackSize();
-      dbgs() << " Function " << MF.getFunction().getName()
-             << " Stack offset of " << -Offset << " exceeded max offset of "
-             << -MaxOffset << " by " << MaxOffset - Offset
-             << " bytes, please minimize large stack variables. "
-             << "Estimated function frame size: " << StackSize << " bytes."
-             << " Exceeding the maximum stack offset may cause "
-                "undefined behavior during execution.\n\n";
-    } else {
-      DiagnosticInfoUnsupported DiagStackSize(
-          MF.getFunction(),
-          "SBF stack limit of 512 bytes is exceeded. "
-          "Please move large on stack variables into SBF per-cpu array map.\n",
-          DL, DiagnosticSeverity::DS_Error);
-      MF.getFunction().getContext().diagnose(DiagStackSize);
+    dbgs() << "Error:";
+    if (DL) {
+      dbgs() << " ";
+      DL.print(dbgs());
     }
+    uint64_t StackSize = MF.getFrameInfo().getStackSize();
+    dbgs() << " Function " << MF.getFunction().getName()
+           << " Stack offset of " << -Offset << " exceeded max offset of "
+           << -MaxOffset << " by " << MaxOffset - Offset
+           << " bytes, please minimize large stack variables. "
+           << "Estimated function frame size: " << StackSize << " bytes."
+           << " Exceeding the maximum stack offset may cause "
+              "undefined behavior during execution.\n\n";
   }
 }
 
diff --git a/llvm/lib/Target/SBF/SBFSelectionDAGInfo.cpp b/llvm/lib/Target/SBF/SBFSelectionDAGInfo.cpp
index 53f4e42b25e126..5e2b14507baedd 100644
--- a/llvm/lib/Target/SBF/SBFSelectionDAGInfo.cpp
+++ b/llvm/lib/Target/SBF/SBFSelectionDAGInfo.cpp
@@ -13,6 +13,8 @@
 #include "SBFTargetMachine.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/IR/DerivedTypes.h"
+#include "SBFSelectionDAGInfo.h"
+
 using namespace llvm;
 
 #define DEBUG_TYPE "sbf-selectiondag-info"
diff --git a/llvm/lib/Target/SBF/SBFSelectionDAGInfo.h b/llvm/lib/Target/SBF/SBFSelectionDAGInfo.h
index 104246c6718b86..8fc1638d49bb02 100644
--- a/llvm/lib/Target/SBF/SBFSelectionDAGInfo.h
+++ b/llvm/lib/Target/SBF/SBFSelectionDAGInfo.h
@@ -19,7 +19,7 @@ namespace llvm {
 
 class SBFSelectionDAGInfo : public SelectionDAGTargetInfo {
 public:
-  SBFSelectionDAGInfo() : isSolana(false) {}
+  SBFSelectionDAGInfo() {}
   SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
                                   SDValue Chain, SDValue Dst, SDValue Src,
                                   SDValue Size, Align Alignment,
@@ -28,15 +28,8 @@ class SBFSelectionDAGInfo : public SelectionDAGTargetInfo {
                                   MachinePointerInfo SrcPtrInfo) const override;
 
   unsigned getCommonMaxStoresPerMemFunc() const {
-    return isSolana ? 4 : 128;
+    return 4;
   }
-  void setSolanaFlag(bool value) const {
-    isSolana = value;
-  }
-
-private:
-  mutable bool isSolana;
-
 };
 
 }
diff --git a/llvm/lib/Target/SBF/SBFSubtarget.cpp b/llvm/lib/Target/SBF/SBFSubtarget.cpp
index e3474791ddc323..5b915a382e2bd8 100644
--- a/llvm/lib/Target/SBF/SBFSubtarget.cpp
+++ b/llvm/lib/Target/SBF/SBFSubtarget.cpp
@@ -35,7 +35,6 @@ SBFSubtarget &SBFSubtarget::initializeSubtargetDependencies(const Triple &TT,
 
 void SBFSubtarget::initializeEnvironment(const Triple &TT) {
   assert(TT.getArch() == Triple::sbf && "expected Triple::sbf");
-  IsSolana = true;
   HasJmpExt = false;
   HasAlu32 = false;
   UseDwarfRIS = false;
@@ -74,6 +73,4 @@ SBFSubtarget::SBFSubtarget(const Triple &TT, const std::string &CPU,
       FrameLowering(initializeSubtargetDependencies(TT, CPU, FS)),
       TLInfo(TM, *this) {
   assert(TT.getArch() == Triple::sbf && "expected Triple::sbf");
-  IsSolana = true;
-  TSInfo.setSolanaFlag(IsSolana);
 }
diff --git a/llvm/lib/Target/SBF/SBFSubtarget.h b/llvm/lib/Target/SBF/SBFSubtarget.h
index a21eca0f82da5e..2421403962700c 100644
--- a/llvm/lib/Target/SBF/SBFSubtarget.h
+++ b/llvm/lib/Target/SBF/SBFSubtarget.h
@@ -40,12 +40,6 @@ class SBFSubtarget : public SBFGenSubtargetInfo {
   void initSubtargetFeatures(StringRef CPU, StringRef FS);
 
 protected:
-  // unused
-  bool isDummyMode;
-
-  // whether to enable Solana extensions.
-  bool IsSolana;
-
   // whether the cpu supports jmp ext
   bool HasJmpExt;
 
@@ -95,7 +89,6 @@ class SBFSubtarget : public SBFGenSubtargetInfo {
   // ParseSubtargetFeatures - Parses features string setting specified
   // subtarget options.  Definition of function is auto generated by tblgen.
   void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
-  bool isSolana() const { return IsSolana; }
   bool getHasJmpExt() const { return HasJmpExt; }
   bool getHasAlu32() const { return HasAlu32; }
   bool getHasDynamicFrames() const { return HasDynamicFrames; }
diff --git a/llvm/lib/Target/SBF/SBFTargetFeatures.td b/llvm/lib/Target/SBF/SBFTargetFeatures.td
index 3644dbfdd0a1fb..91c8d2eb616c4e 100644
--- a/llvm/lib/Target/SBF/SBFTargetFeatures.td
+++ b/llvm/lib/Target/SBF/SBFTargetFeatures.td
@@ -10,18 +10,12 @@
 //
 //===----------------------------------------------------------------------===//
 
-def DummyFeature : SubtargetFeature<"dummy", "isDummyMode",
-                                    "true", "unused feature">;
-
 def ALU32 : SubtargetFeature<"alu32", "HasAlu32", "true",
                              "Enable ALU32 instructions">;
 
 def DwarfRIS: SubtargetFeature<"dwarfris", "UseDwarfRIS", "true",
                                "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections">;
 
-def FeatureSolana : SubtargetFeature<"solana", "IsSolana", "true",
-                                     "Enable Solana extensions">;
-
 def FeatureDynamicFrames : SubtargetFeature<"dynamic-frames", "HasDynamicFrames", "true",
                                             "Enable dynamic frames">;
 
@@ -56,6 +50,6 @@ def : Proc<"generic", []>;
 def : Proc<"v1", []>;
 def : Proc<"v2", []>;
 def : Proc<"v3", [ALU32]>;
-def : Proc<"sbfv2", [FeatureSolana, FeatureDynamicFrames, FeatureRelocAbs64, FeatureStaticSyscalls,
+def : Proc<"sbfv2", [FeatureDynamicFrames, FeatureRelocAbs64, FeatureStaticSyscalls,
                         FeatureDisableNeg, FeatureReverseSubImm, FeatureDisableLddw, FeatureCallxRegSrc,
                           FeaturePqrInstr, FeatureCallConv]>;
\ No newline at end of file