3 ¦Graphical representation of MIPS architecture.

[PandaEden]

• 3.I ¦M: Simplified image of MIPS pipeline. (like WinMips64)
• 3.II ¦M: Display current instruction occupying pipeline segment
• 3.III ¦M: Additional tables for Scoreboard and Tomasulo’s Algorithm
• 3.III.I ¦*S: Scoreboard/ additional tables only appear if relevant execution mode is selected
• 3.IV ¦S: More complex diagram of MIPS architecture. Showing Data Paths
• 3.IV.I ¦*C: A toggle to swap between Simplified/Advanced architecture appearance
• 3.IV.II ¦*C: Singling out a specific instruction in the pipeline and previewing its isolated execution.
• 3.IV.II.I ¦*Would: Complete complexity of MIPS Architecture displayed.