Machine Interrupt Enable (mie) Register Handling Issue: Bits That Must Remain Zero Are Incorrectly Set

[fly-1011]

Bug Description:

In the current implementation of the Nutshell processor, the Machine Interrupt Enable (mie) register appears to be handling certain bits incorrectly. According to the RISC-V specification, certain bits (such as bit 0 and bit 2) in the mie register must remain 0. However, during execution, these bits are being incorrectly set to 1.

Screenshots

Expected Behavior (Spike Simulation):

Machine Interrupt Enable (mie) register value: 0xA (binary 0000 1010)

Actual Behavior (Nutshell Processor):

Machine Interrupt Enable (mie) register value: 0x1F (binary 0001 1111)