Skip to content
This repository has been archived by the owner on Apr 19, 2021. It is now read-only.

Latest commit

 

History

History
8 lines (4 loc) · 184 Bytes

File metadata and controls

8 lines (4 loc) · 184 Bytes

Tomasulo-based-processor-back-end-v3

Simple Tomasulo based processor back-end using VHDL.

Replaced register renaming with reorder buffer.

Developed with Xilinx ISE Design Suite.