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MannarAmuthan committed Sep 16, 2023
1 parent b7820ab commit af9c41b
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Showing 7 changed files with 20 additions and 18 deletions.
7 changes: 4 additions & 3 deletions llvm/lib/Target/I8085/AsmParser/I8085AsmParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -57,8 +57,9 @@ class I8085AsmParser : public MCTargetAsmParser {
bool MatchingInlineAsm) override;

bool parseRegister(MCRegister &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
OperandMatchResultTy tryParseRegister(MCRegister &RegNo, SMLoc &StartLoc,
SMLoc &EndLoc) override;

ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
SMLoc &EndLoc) override;

bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
SMLoc NameLoc, OperandVector &Operands) override;
Expand Down Expand Up @@ -583,7 +584,7 @@ bool I8085AsmParser::parseRegister(MCRegister &RegNo, SMLoc &StartLoc,
return (RegNo == I8085::NoRegister);
}

OperandMatchResultTy I8085AsmParser::tryParseRegister(MCRegister &RegNo,
ParseStatus I8085AsmParser::tryParseRegister(MCRegister &RegNo,
SMLoc &StartLoc,
SMLoc &EndLoc) {
StartLoc = Parser.getTok().getLoc();
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10 changes: 4 additions & 6 deletions llvm/lib/Target/I8085/I8085AsmPrinter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -121,10 +121,8 @@ bool I8085AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
Register Reg = RegOp.getReg();

unsigned ByteNumber = ExtraCode[0] - 'A';

unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
(void)NumOpRegs;
const InlineAsm::Flag OpFlags(MI->getOperand(OpNum - 1).getImm());
const unsigned NumOpRegs = OpFlags.getNumOperandRegisters();

const I8085Subtarget &STI = MF->getSubtarget<I8085Subtarget>();
const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
Expand Down Expand Up @@ -167,8 +165,8 @@ bool I8085AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,

// If NumOpRegs == 2, then we assume it is product of a FrameIndex expansion
// and the second operand is an Imm.
unsigned OpFlags = MI->getOperand(OpNum - 1).getImm();
unsigned NumOpRegs = InlineAsm::getNumOperandRegisters(OpFlags);
const InlineAsm::Flag OpFlags(MI->getOperand(OpNum - 1).getImm());
const unsigned NumOpRegs = OpFlags.getNumOperandRegisters();

if (NumOpRegs == 2) {
O << '+' << MI->getOperand(OpNum + 1).getImm();
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/I8085/I8085ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -585,7 +585,7 @@ SDValue I8085TargetLowering::LowerFormalArguments(
// If the function takes variable number of arguments, make a frame index for
// the start of the first vararg value... for expansion of llvm.va_start.
if (isVarArg) {
unsigned StackSize = CCInfo.getNextStackOffset();
unsigned StackSize = CCInfo.getStackSize();
I8085MachineFunctionInfo *AFI = MF.getInfo<I8085MachineFunctionInfo>();

AFI->setVarArgsFrameIndex(MFI.CreateFixedObject(2, StackSize, true));
Expand Down Expand Up @@ -644,7 +644,7 @@ SDValue I8085TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
}

// Get a count of how many bytes are to be pushed on the stack.
unsigned NumBytes = CCInfo.getNextStackOffset();
unsigned NumBytes = CCInfo.getStackSize();


SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/I8085/MCTargetDesc/I8085ELFStreamer.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,8 @@
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/TargetParser/SubtargetFeature.h"

#include "I8085MCTargetDesc.h"

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2 changes: 1 addition & 1 deletion llvm/lib/Target/I8085/MCTargetDesc/I8085InstPrinter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,7 @@ const char *I8085InstPrinter::getPrettyRegisterName(unsigned RegNum,

void I8085InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperandInfo &MOI = this->MII.get(MI->getOpcode()).OpInfo[OpNo];
const MCOperandInfo &MOI = this->MII.get(MI->getOpcode()).operands()[OpNo];

if (OpNo >= MI->size()) {
// Not all operands are correctly disassembled at the moment. This means
Expand Down
9 changes: 6 additions & 3 deletions llvm/lib/Target/I8085/MCTargetDesc/I8085MCCodeEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,9 @@ unsigned I8085MCCodeEmitter::getMachineOpValue(const MCInst &MI,

void I8085MCCodeEmitter::emitInstruction(uint64_t Val, unsigned Size,
const MCSubtargetInfo &STI,
raw_ostream &OS) const {
SmallVectorImpl<char> &CB) const {

llvm::raw_svector_ostream OS(CB);

if(Size == 1){
uint8_t val = Val & 0xff;
Expand Down Expand Up @@ -160,7 +162,8 @@ void I8085MCCodeEmitter::emitInstruction(uint64_t Val, unsigned Size,
}
}

void I8085MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
void I8085MCCodeEmitter::encodeInstruction(const MCInst &MI,
SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
Expand All @@ -174,7 +177,7 @@ void I8085MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
assert(Size > 0 && "Instruction size cannot be zero");

uint64_t BinaryOpCode = getBinaryCodeForInstr(MI, Fixups, STI);
emitInstruction(BinaryOpCode, Size, STI, OS);
emitInstruction(BinaryOpCode, Size, STI, CB);
}

MCCodeEmitter *createI8085MCCodeEmitter(const MCInstrInfo &MCII,
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/I8085/MCTargetDesc/I8085MCCodeEmitter.h
Original file line number Diff line number Diff line change
Expand Up @@ -68,9 +68,9 @@ class I8085MCCodeEmitter : public MCCodeEmitter {
const MCSubtargetInfo &STI) const;

void emitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
raw_ostream &OS) const;
SmallVectorImpl<char> &CB) const;

void encodeInstruction(const MCInst &MI, raw_ostream &OS,
void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;

Expand Down

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