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Compiler Writer SDK
This page describes the Compiler Writer SDK and explains how to use it. The page also lists use-cases and current limitations. Using the information on this page, compiler writers can implement a compiler for languages of their choice (for example, for C++AMP, Python, and OpenMP). They can, for example, write a new compiler for C++AMP by using this reference implementation.
The first requirement of a compiler for any chosen language is a front-end that parses the high level source and outputs high-level IR. Some of the de-facto standard IRs are GIMPLE (GCC) and LLVMIR (LLVM compilers). As LLVM IR has become very popular with compiler writers for accelerator devices, the Compiler Writer SDK supports LLVM IR. Though the SDK has a CLANG-based front-end to generate LLVMIR from the high-level source, the compiler writer must have a mechanism that generates LLVMIR to be able to use the Compiler Writer SDK.
The Compiler Writer SDK has one HSAIL backend: the LLVM-HSAIL code generator. The code generator can be downloaded from https://github.com/HSAFoundation/LLVM-to-HSAIL-Test-Compiler. The code generator is based on LLVM 3.2 compiler. AMD provides the HSAIL target code generator with a few modifications in the LLVM core directories. The code generator is built and tested on Linux (Ubuntu 14.04) with some of the test files given with this drop. The code generator is basic, without any AMD-specific optimizations. The compiler writers are expected to write their own optimization if they require a better HSAIL code generator.
The Compiler Writer SDK contains a "tests" directory, which includes some test cases (kernel source files). The SDK also includes a script that uses the given CLANG-based front-end (CLC2) and generates the LLVMIR. The LLVM optimizer optimizes the IR (at O3). The HSAIL code generator generates the required BRIG/HSAIL files. The assembler/disassembler can be downloaded and built from HSAIL-tools on the GITHUB.
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The code generator is a basic HSAIL code generator only. The language may have language RT specific information (metadata) which may have to be generated along with this HSAIL. Some of the RTI (Runtime Info) generated in this code generator (in RTI blocks) was used for OpenCL RT, but similar info could be added for language-specific needs. For example, we have to generate metadata for each of the parameters (whether they are local, global, what types of pointers, alignment etc).
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The code generator does not add any implicit arguments for kernel arguments (such as for handling global offsets). The compiler can add this.
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The code generator is compatible with the HSAIL 1.0P specification and generates the code accordingly. This is tested to work with the HSAIL tools (libHSAIL, HSAIL assembler/disassembler) provided on the Foundation GITHUB.
Getting Started (Under Construction)
[HSA Platforms & Installation] (https://github.com/HSAFoundation/HSA-Docs-AMD/wiki/HSA-Platforms-&-Installation)
[CLOC Compiler and Sample SDK] (https://github.com/HSAFoundation/HSA-Docs-AMD/wiki/CLOC-Compiler-and-Sample-SDK)
[HSA Docker Containers] (https://github.com/HSAFoundation/HSA-Docs-AMD/wiki/HSA-Docker-Containers:---Downloading-and-Running-HSA-on-Docker)
[List of Specifications, Presentations, Drivers, Compilers, Tools, Libraries] (https://github.com/HSAFoundation/HSA-Docs-AMD/wiki/List-of-Specifications,-Presentations,-Drivers,-Compilers,-Tools,-Libraries)
[Performance Tuning] (https://github.com/HSAFoundation/HSA-Docs-AMD/wiki/Performance-Tuning)