diff --git a/.gitignore b/.gitignore index edc3dec5..9a63cfee 100644 --- a/.gitignore +++ b/.gitignore @@ -3,3 +3,4 @@ TAGS *.bak package_gd32_arcayi_index.json +.DS_Store diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_can.h b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_can.h index 9f2e82b8..f6d4fb28 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_can.h +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_can.h @@ -12,27 +12,27 @@ /* Copyright (c) 2020, GigaDevice Semiconductor Inc. - Redistribution and use in source and binary forms, with or without modification, + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright notice, this + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without specific prior written permission. - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ @@ -46,95 +46,95 @@ OF SUCH DAMAGE. #define CAN1 (CAN0 + 0x00000400U) /*!< CAN1 base address */ /* registers definitions */ -#define CAN_CTL(canx) REG32((canx) + 0x00U) /*!< CAN control register */ -#define CAN_STAT(canx) REG32((canx) + 0x04U) /*!< CAN status register */ -#define CAN_TSTAT(canx) REG32((canx) + 0x08U) /*!< CAN transmit status register*/ -#define CAN_RFIFO0(canx) REG32((canx) + 0x0CU) /*!< CAN receive FIFO0 register */ -#define CAN_RFIFO1(canx) REG32((canx) + 0x10U) /*!< CAN receive FIFO1 register */ -#define CAN_INTEN(canx) REG32((canx) + 0x14U) /*!< CAN interrupt enable register */ -#define CAN_ERR(canx) REG32((canx) + 0x18U) /*!< CAN error register */ -#define CAN_BT(canx) REG32((canx) + 0x1CU) /*!< CAN bit timing register */ -#define CAN_TMI0(canx) REG32((canx) + 0x180U) /*!< CAN transmit mailbox0 identifier register */ -#define CAN_TMP0(canx) REG32((canx) + 0x184U) /*!< CAN transmit mailbox0 property register */ -#define CAN_TMDATA00(canx) REG32((canx) + 0x188U) /*!< CAN transmit mailbox0 data0 register */ -#define CAN_TMDATA10(canx) REG32((canx) + 0x18CU) /*!< CAN transmit mailbox0 data1 register */ -#define CAN_TMI1(canx) REG32((canx) + 0x190U) /*!< CAN transmit mailbox1 identifier register */ -#define CAN_TMP1(canx) REG32((canx) + 0x194U) /*!< CAN transmit mailbox1 property register */ -#define CAN_TMDATA01(canx) REG32((canx) + 0x198U) /*!< CAN transmit mailbox1 data0 register */ -#define CAN_TMDATA11(canx) REG32((canx) + 0x19CU) /*!< CAN transmit mailbox1 data1 register */ -#define CAN_TMI2(canx) REG32((canx) + 0x1A0U) /*!< CAN transmit mailbox2 identifier register */ -#define CAN_TMP2(canx) REG32((canx) + 0x1A4U) /*!< CAN transmit mailbox2 property register */ -#define CAN_TMDATA02(canx) REG32((canx) + 0x1A8U) /*!< CAN transmit mailbox2 data0 register */ -#define CAN_TMDATA12(canx) REG32((canx) + 0x1ACU) /*!< CAN transmit mailbox2 data1 register */ -#define CAN_RFIFOMI0(canx) REG32((canx) + 0x1B0U) /*!< CAN receive FIFO0 mailbox identifier register */ -#define CAN_RFIFOMP0(canx) REG32((canx) + 0x1B4U) /*!< CAN receive FIFO0 mailbox property register */ -#define CAN_RFIFOMDATA00(canx) REG32((canx) + 0x1B8U) /*!< CAN receive FIFO0 mailbox data0 register */ -#define CAN_RFIFOMDATA10(canx) REG32((canx) + 0x1BCU) /*!< CAN receive FIFO0 mailbox data1 register */ -#define CAN_RFIFOMI1(canx) REG32((canx) + 0x1C0U) /*!< CAN receive FIFO1 mailbox identifier register */ -#define CAN_RFIFOMP1(canx) REG32((canx) + 0x1C4U) /*!< CAN receive FIFO1 mailbox property register */ -#define CAN_RFIFOMDATA01(canx) REG32((canx) + 0x1C8U) /*!< CAN receive FIFO1 mailbox data0 register */ -#define CAN_RFIFOMDATA11(canx) REG32((canx) + 0x1CCU) /*!< CAN receive FIFO1 mailbox data1 register */ -#define CAN_FCTL(canx) REG32((canx) + 0x200U) /*!< CAN filter control register */ -#define CAN_FMCFG(canx) REG32((canx) + 0x204U) /*!< CAN filter mode register */ -#define CAN_FSCFG(canx) REG32((canx) + 0x20CU) /*!< CAN filter scale register */ -#define CAN_FAFIFO(canx) REG32((canx) + 0x214U) /*!< CAN filter associated FIFO register */ -#define CAN_FW(canx) REG32((canx) + 0x21CU) /*!< CAN filter working register */ -#define CAN_F0DATA0(canx) REG32((canx) + 0x240U) /*!< CAN filter 0 data 0 register */ -#define CAN_F1DATA0(canx) REG32((canx) + 0x248U) /*!< CAN filter 1 data 0 register */ -#define CAN_F2DATA0(canx) REG32((canx) + 0x250U) /*!< CAN filter 2 data 0 register */ -#define CAN_F3DATA0(canx) REG32((canx) + 0x258U) /*!< CAN filter 3 data 0 register */ -#define CAN_F4DATA0(canx) REG32((canx) + 0x260U) /*!< CAN filter 4 data 0 register */ -#define CAN_F5DATA0(canx) REG32((canx) + 0x268U) /*!< CAN filter 5 data 0 register */ -#define CAN_F6DATA0(canx) REG32((canx) + 0x270U) /*!< CAN filter 6 data 0 register */ -#define CAN_F7DATA0(canx) REG32((canx) + 0x278U) /*!< CAN filter 7 data 0 register */ -#define CAN_F8DATA0(canx) REG32((canx) + 0x280U) /*!< CAN filter 8 data 0 register */ -#define CAN_F9DATA0(canx) REG32((canx) + 0x288U) /*!< CAN filter 9 data 0 register */ -#define CAN_F10DATA0(canx) REG32((canx) + 0x290U) /*!< CAN filter 10 data 0 register */ -#define CAN_F11DATA0(canx) REG32((canx) + 0x298U) /*!< CAN filter 11 data 0 register */ -#define CAN_F12DATA0(canx) REG32((canx) + 0x2A0U) /*!< CAN filter 12 data 0 register */ -#define CAN_F13DATA0(canx) REG32((canx) + 0x2A8U) /*!< CAN filter 13 data 0 register */ -#define CAN_F14DATA0(canx) REG32((canx) + 0x2B0U) /*!< CAN filter 14 data 0 register */ -#define CAN_F15DATA0(canx) REG32((canx) + 0x2B8U) /*!< CAN filter 15 data 0 register */ -#define CAN_F16DATA0(canx) REG32((canx) + 0x2C0U) /*!< CAN filter 16 data 0 register */ -#define CAN_F17DATA0(canx) REG32((canx) + 0x2C8U) /*!< CAN filter 17 data 0 register */ -#define CAN_F18DATA0(canx) REG32((canx) + 0x2D0U) /*!< CAN filter 18 data 0 register */ -#define CAN_F19DATA0(canx) REG32((canx) + 0x2D8U) /*!< CAN filter 19 data 0 register */ -#define CAN_F20DATA0(canx) REG32((canx) + 0x2E0U) /*!< CAN filter 20 data 0 register */ -#define CAN_F21DATA0(canx) REG32((canx) + 0x2E8U) /*!< CAN filter 21 data 0 register */ -#define CAN_F22DATA0(canx) REG32((canx) + 0x2F0U) /*!< CAN filter 22 data 0 register */ -#define CAN_F23DATA0(canx) REG32((canx) + 0x3F8U) /*!< CAN filter 23 data 0 register */ -#define CAN_F24DATA0(canx) REG32((canx) + 0x300U) /*!< CAN filter 24 data 0 register */ -#define CAN_F25DATA0(canx) REG32((canx) + 0x308U) /*!< CAN filter 25 data 0 register */ -#define CAN_F26DATA0(canx) REG32((canx) + 0x310U) /*!< CAN filter 26 data 0 register */ -#define CAN_F27DATA0(canx) REG32((canx) + 0x318U) /*!< CAN filter 27 data 0 register */ -#define CAN_F0DATA1(canx) REG32((canx) + 0x244U) /*!< CAN filter 0 data 1 register */ -#define CAN_F1DATA1(canx) REG32((canx) + 0x24CU) /*!< CAN filter 1 data 1 register */ -#define CAN_F2DATA1(canx) REG32((canx) + 0x254U) /*!< CAN filter 2 data 1 register */ -#define CAN_F3DATA1(canx) REG32((canx) + 0x25CU) /*!< CAN filter 3 data 1 register */ -#define CAN_F4DATA1(canx) REG32((canx) + 0x264U) /*!< CAN filter 4 data 1 register */ -#define CAN_F5DATA1(canx) REG32((canx) + 0x26CU) /*!< CAN filter 5 data 1 register */ -#define CAN_F6DATA1(canx) REG32((canx) + 0x274U) /*!< CAN filter 6 data 1 register */ -#define CAN_F7DATA1(canx) REG32((canx) + 0x27CU) /*!< CAN filter 7 data 1 register */ -#define CAN_F8DATA1(canx) REG32((canx) + 0x284U) /*!< CAN filter 8 data 1 register */ -#define CAN_F9DATA1(canx) REG32((canx) + 0x28CU) /*!< CAN filter 9 data 1 register */ -#define CAN_F10DATA1(canx) REG32((canx) + 0x294U) /*!< CAN filter 10 data 1 register */ -#define CAN_F11DATA1(canx) REG32((canx) + 0x29CU) /*!< CAN filter 11 data 1 register */ -#define CAN_F12DATA1(canx) REG32((canx) + 0x2A4U) /*!< CAN filter 12 data 1 register */ -#define CAN_F13DATA1(canx) REG32((canx) + 0x2ACU) /*!< CAN filter 13 data 1 register */ -#define CAN_F14DATA1(canx) REG32((canx) + 0x2B4U) /*!< CAN filter 14 data 1 register */ -#define CAN_F15DATA1(canx) REG32((canx) + 0x2BCU) /*!< CAN filter 15 data 1 register */ -#define CAN_F16DATA1(canx) REG32((canx) + 0x2C4U) /*!< CAN filter 16 data 1 register */ -#define CAN_F17DATA1(canx) REG32((canx) + 0x24CU) /*!< CAN filter 17 data 1 register */ -#define CAN_F18DATA1(canx) REG32((canx) + 0x2D4U) /*!< CAN filter 18 data 1 register */ -#define CAN_F19DATA1(canx) REG32((canx) + 0x2DCU) /*!< CAN filter 19 data 1 register */ -#define CAN_F20DATA1(canx) REG32((canx) + 0x2E4U) /*!< CAN filter 20 data 1 register */ -#define CAN_F21DATA1(canx) REG32((canx) + 0x2ECU) /*!< CAN filter 21 data 1 register */ -#define CAN_F22DATA1(canx) REG32((canx) + 0x2F4U) /*!< CAN filter 22 data 1 register */ -#define CAN_F23DATA1(canx) REG32((canx) + 0x2FCU) /*!< CAN filter 23 data 1 register */ -#define CAN_F24DATA1(canx) REG32((canx) + 0x304U) /*!< CAN filter 24 data 1 register */ -#define CAN_F25DATA1(canx) REG32((canx) + 0x30CU) /*!< CAN filter 25 data 1 register */ -#define CAN_F26DATA1(canx) REG32((canx) + 0x314U) /*!< CAN filter 26 data 1 register */ -#define CAN_F27DATA1(canx) REG32((canx) + 0x31CU) /*!< CAN filter 27 data 1 register */ +#define CAN_CTL(canx) REG32((canx) + 0x00000000U) /*!< CAN control register */ +#define CAN_STAT(canx) REG32((canx) + 0x00000004U) /*!< CAN status register */ +#define CAN_TSTAT(canx) REG32((canx) + 0x00000008U) /*!< CAN transmit status register*/ +#define CAN_RFIFO0(canx) REG32((canx) + 0x0000000CU) /*!< CAN receive FIFO0 register */ +#define CAN_RFIFO1(canx) REG32((canx) + 0x00000010U) /*!< CAN receive FIFO1 register */ +#define CAN_INTEN(canx) REG32((canx) + 0x00000014U) /*!< CAN interrupt enable register */ +#define CAN_ERR(canx) REG32((canx) + 0x00000018U) /*!< CAN error register */ +#define CAN_BT(canx) REG32((canx) + 0x0000001CU) /*!< CAN bit timing register */ +#define CAN_TMI0(canx) REG32((canx) + 0x00000180U) /*!< CAN transmit mailbox0 identifier register */ +#define CAN_TMP0(canx) REG32((canx) + 0x00000184U) /*!< CAN transmit mailbox0 property register */ +#define CAN_TMDATA00(canx) REG32((canx) + 0x00000188U) /*!< CAN transmit mailbox0 data0 register */ +#define CAN_TMDATA10(canx) REG32((canx) + 0x0000018CU) /*!< CAN transmit mailbox0 data1 register */ +#define CAN_TMI1(canx) REG32((canx) + 0x00000190U) /*!< CAN transmit mailbox1 identifier register */ +#define CAN_TMP1(canx) REG32((canx) + 0x00000194U) /*!< CAN transmit mailbox1 property register */ +#define CAN_TMDATA01(canx) REG32((canx) + 0x00000198U) /*!< CAN transmit mailbox1 data0 register */ +#define CAN_TMDATA11(canx) REG32((canx) + 0x0000019CU) /*!< CAN transmit mailbox1 data1 register */ +#define CAN_TMI2(canx) REG32((canx) + 0x000001A0U) /*!< CAN transmit mailbox2 identifier register */ +#define CAN_TMP2(canx) REG32((canx) + 0x000001A4U) /*!< CAN transmit mailbox2 property register */ +#define CAN_TMDATA02(canx) REG32((canx) + 0x000001A8U) /*!< CAN transmit mailbox2 data0 register */ +#define CAN_TMDATA12(canx) REG32((canx) + 0x000001ACU) /*!< CAN transmit mailbox2 data1 register */ +#define CAN_RFIFOMI0(canx) REG32((canx) + 0x000001B0U) /*!< CAN receive FIFO0 mailbox identifier register */ +#define CAN_RFIFOMP0(canx) REG32((canx) + 0x000001B4U) /*!< CAN receive FIFO0 mailbox property register */ +#define CAN_RFIFOMDATA00(canx) REG32((canx) + 0x000001B8U) /*!< CAN receive FIFO0 mailbox data0 register */ +#define CAN_RFIFOMDATA10(canx) REG32((canx) + 0x000001BCU) /*!< CAN receive FIFO0 mailbox data1 register */ +#define CAN_RFIFOMI1(canx) REG32((canx) + 0x000001C0U) /*!< CAN receive FIFO1 mailbox identifier register */ +#define CAN_RFIFOMP1(canx) REG32((canx) + 0x000001C4U) /*!< CAN receive FIFO1 mailbox property register */ +#define CAN_RFIFOMDATA01(canx) REG32((canx) + 0x000001C8U) /*!< CAN receive FIFO1 mailbox data0 register */ +#define CAN_RFIFOMDATA11(canx) REG32((canx) + 0x000001CCU) /*!< CAN receive FIFO1 mailbox data1 register */ +#define CAN_FCTL(canx) REG32((canx) + 0x00000200U) /*!< CAN filter control register */ +#define CAN_FMCFG(canx) REG32((canx) + 0x00000204U) /*!< CAN filter mode register */ +#define CAN_FSCFG(canx) REG32((canx) + 0x0000020CU) /*!< CAN filter scale register */ +#define CAN_FAFIFO(canx) REG32((canx) + 0x00000214U) /*!< CAN filter associated FIFO register */ +#define CAN_FW(canx) REG32((canx) + 0x0000021CU) /*!< CAN filter working register */ +#define CAN_F0DATA0(canx) REG32((canx) + 0x00000240U) /*!< CAN filter 0 data 0 register */ +#define CAN_F1DATA0(canx) REG32((canx) + 0x00000248U) /*!< CAN filter 1 data 0 register */ +#define CAN_F2DATA0(canx) REG32((canx) + 0x00000250U) /*!< CAN filter 2 data 0 register */ +#define CAN_F3DATA0(canx) REG32((canx) + 0x00000258U) /*!< CAN filter 3 data 0 register */ +#define CAN_F4DATA0(canx) REG32((canx) + 0x00000260U) /*!< CAN filter 4 data 0 register */ +#define CAN_F5DATA0(canx) REG32((canx) + 0x00000268U) /*!< CAN filter 5 data 0 register */ +#define CAN_F6DATA0(canx) REG32((canx) + 0x00000270U) /*!< CAN filter 6 data 0 register */ +#define CAN_F7DATA0(canx) REG32((canx) + 0x00000278U) /*!< CAN filter 7 data 0 register */ +#define CAN_F8DATA0(canx) REG32((canx) + 0x00000280U) /*!< CAN filter 8 data 0 register */ +#define CAN_F9DATA0(canx) REG32((canx) + 0x00000288U) /*!< CAN filter 9 data 0 register */ +#define CAN_F10DATA0(canx) REG32((canx) + 0x00000290U) /*!< CAN filter 10 data 0 register */ +#define CAN_F11DATA0(canx) REG32((canx) + 0x00000298U) /*!< CAN filter 11 data 0 register */ +#define CAN_F12DATA0(canx) REG32((canx) + 0x000002A0U) /*!< CAN filter 12 data 0 register */ +#define CAN_F13DATA0(canx) REG32((canx) + 0x000002A8U) /*!< CAN filter 13 data 0 register */ +#define CAN_F14DATA0(canx) REG32((canx) + 0x000002B0U) /*!< CAN filter 14 data 0 register */ +#define CAN_F15DATA0(canx) REG32((canx) + 0x000002B8U) /*!< CAN filter 15 data 0 register */ +#define CAN_F16DATA0(canx) REG32((canx) + 0x000002C0U) /*!< CAN filter 16 data 0 register */ +#define CAN_F17DATA0(canx) REG32((canx) + 0x000002C8U) /*!< CAN filter 17 data 0 register */ +#define CAN_F18DATA0(canx) REG32((canx) + 0x000002D0U) /*!< CAN filter 18 data 0 register */ +#define CAN_F19DATA0(canx) REG32((canx) + 0x000002D8U) /*!< CAN filter 19 data 0 register */ +#define CAN_F20DATA0(canx) REG32((canx) + 0x000002E0U) /*!< CAN filter 20 data 0 register */ +#define CAN_F21DATA0(canx) REG32((canx) + 0x000002E8U) /*!< CAN filter 21 data 0 register */ +#define CAN_F22DATA0(canx) REG32((canx) + 0x000002F0U) /*!< CAN filter 22 data 0 register */ +#define CAN_F23DATA0(canx) REG32((canx) + 0x000003F8U) /*!< CAN filter 23 data 0 register */ +#define CAN_F24DATA0(canx) REG32((canx) + 0x00000300U) /*!< CAN filter 24 data 0 register */ +#define CAN_F25DATA0(canx) REG32((canx) + 0x00000308U) /*!< CAN filter 25 data 0 register */ +#define CAN_F26DATA0(canx) REG32((canx) + 0x00000310U) /*!< CAN filter 26 data 0 register */ +#define CAN_F27DATA0(canx) REG32((canx) + 0x00000318U) /*!< CAN filter 27 data 0 register */ +#define CAN_F0DATA1(canx) REG32((canx) + 0x00000244U) /*!< CAN filter 0 data 1 register */ +#define CAN_F1DATA1(canx) REG32((canx) + 0x0000024CU) /*!< CAN filter 1 data 1 register */ +#define CAN_F2DATA1(canx) REG32((canx) + 0x00000254U) /*!< CAN filter 2 data 1 register */ +#define CAN_F3DATA1(canx) REG32((canx) + 0x0000025CU) /*!< CAN filter 3 data 1 register */ +#define CAN_F4DATA1(canx) REG32((canx) + 0x00000264U) /*!< CAN filter 4 data 1 register */ +#define CAN_F5DATA1(canx) REG32((canx) + 0x0000026CU) /*!< CAN filter 5 data 1 register */ +#define CAN_F6DATA1(canx) REG32((canx) + 0x00000274U) /*!< CAN filter 6 data 1 register */ +#define CAN_F7DATA1(canx) REG32((canx) + 0x0000027CU) /*!< CAN filter 7 data 1 register */ +#define CAN_F8DATA1(canx) REG32((canx) + 0x00000284U) /*!< CAN filter 8 data 1 register */ +#define CAN_F9DATA1(canx) REG32((canx) + 0x0000028CU) /*!< CAN filter 9 data 1 register */ +#define CAN_F10DATA1(canx) REG32((canx) + 0x00000294U) /*!< CAN filter 10 data 1 register */ +#define CAN_F11DATA1(canx) REG32((canx) + 0x0000029CU) /*!< CAN filter 11 data 1 register */ +#define CAN_F12DATA1(canx) REG32((canx) + 0x000002A4U) /*!< CAN filter 12 data 1 register */ +#define CAN_F13DATA1(canx) REG32((canx) + 0x000002ACU) /*!< CAN filter 13 data 1 register */ +#define CAN_F14DATA1(canx) REG32((canx) + 0x000002B4U) /*!< CAN filter 14 data 1 register */ +#define CAN_F15DATA1(canx) REG32((canx) + 0x000002BCU) /*!< CAN filter 15 data 1 register */ +#define CAN_F16DATA1(canx) REG32((canx) + 0x000002C4U) /*!< CAN filter 16 data 1 register */ +#define CAN_F17DATA1(canx) REG32((canx) + 0x0000024CU) /*!< CAN filter 17 data 1 register */ +#define CAN_F18DATA1(canx) REG32((canx) + 0x000002D4U) /*!< CAN filter 18 data 1 register */ +#define CAN_F19DATA1(canx) REG32((canx) + 0x000002DCU) /*!< CAN filter 19 data 1 register */ +#define CAN_F20DATA1(canx) REG32((canx) + 0x000002E4U) /*!< CAN filter 20 data 1 register */ +#define CAN_F21DATA1(canx) REG32((canx) + 0x000002ECU) /*!< CAN filter 21 data 1 register */ +#define CAN_F22DATA1(canx) REG32((canx) + 0x000002F4U) /*!< CAN filter 22 data 1 register */ +#define CAN_F23DATA1(canx) REG32((canx) + 0x000002FCU) /*!< CAN filter 23 data 1 register */ +#define CAN_F24DATA1(canx) REG32((canx) + 0x00000304U) /*!< CAN filter 24 data 1 register */ +#define CAN_F25DATA1(canx) REG32((canx) + 0x0000030CU) /*!< CAN filter 25 data 1 register */ +#define CAN_F26DATA1(canx) REG32((canx) + 0x00000314U) /*!< CAN filter 26 data 1 register */ +#define CAN_F27DATA1(canx) REG32((canx) + 0x0000031CU) /*!< CAN filter 27 data 1 register */ /* CAN transmit mailbox bank */ #define CAN_TMI(canx, bank) REG32((canx) + 0x180U + ((bank) * 0x10U)) /*!< CAN transmit mailbox identifier register */ @@ -146,7 +146,7 @@ OF SUCH DAMAGE. #define CAN_FDATA0(canx, bank) REG32((canx) + 0x240U + ((bank) * 0x8U) + 0x0U) /*!< CAN filter data 0 register */ #define CAN_FDATA1(canx, bank) REG32((canx) + 0x240U + ((bank) * 0x8U) + 0x4U) /*!< CAN filter data 1 register */ -/* CAN receive fifo mailbox bank */ +/* CAN receive FIFO mailbox bank */ #define CAN_RFIFOMI(canx, bank) REG32((canx) + 0x1B0U + ((bank) * 0x10U)) /*!< CAN receive FIFO mailbox identifier register */ #define CAN_RFIFOMP(canx, bank) REG32((canx) + 0x1B4U + ((bank) * 0x10U)) /*!< CAN receive FIFO mailbox property register */ #define CAN_RFIFOMDATA0(canx, bank) REG32((canx) + 0x1B8U + ((bank) * 0x10U)) /*!< CAN receive FIFO mailbox data0 register */ @@ -296,10 +296,10 @@ OF SUCH DAMAGE. #define CAN_FCTL_HBC1F BITS(8,13) /*!< header bank of CAN1 filter */ /* CAN_FMCFG */ -#define CAN_FMCFG_FMOD(regval) BIT(regval) /*!< filter mode, list or mask*/ +#define CAN_FMCFG_FMOD(regval) BIT(regval) /*!< filter mode, list or mask */ /* CAN_FSCFG */ -#define CAN_FSCFG_FS(regval) BIT(regval) /*!< filter scale, 32 bits or 16 bits*/ +#define CAN_FSCFG_FS(regval) BIT(regval) /*!< filter scale, 32 bits or 16 bits */ /* CAN_FAFIFO */ #define CAN_FAFIFOR_FAF(regval) BIT(regval) /*!< filter associated with FIFO */ @@ -310,7 +310,7 @@ OF SUCH DAMAGE. /* CAN_FxDATAy */ #define CAN_FDATA_FD(regval) BIT(regval) /*!< filter data */ -/* consts definitions */ +/* constants definitions */ /* define the CAN bit position and its register index offset */ #define CAN_REGIDX_BIT(regidx, bitpos) (((uint32_t)(regidx) << 6) | (uint32_t)(bitpos)) #define CAN_REG_VAL(canx, offset) (REG32((canx) + ((uint32_t)(offset) >> 6))) @@ -329,56 +329,54 @@ OF SUCH DAMAGE. #define ERR_REG_OFFSET ((uint8_t)0x18U) /*!< ERR register offset */ /* CAN flags */ -typedef enum -{ +typedef enum { /* flags in STAT register */ - CAN_FLAG_RXL = CAN_REGIDX_BIT(STAT_REG_OFFSET, 11U), /*!< RX level */ - CAN_FLAG_LASTRX = CAN_REGIDX_BIT(STAT_REG_OFFSET, 10U), /*!< last sample value of RX pin */ - CAN_FLAG_RS = CAN_REGIDX_BIT(STAT_REG_OFFSET, 9U), /*!< receiving state */ - CAN_FLAG_TS = CAN_REGIDX_BIT(STAT_REG_OFFSET, 8U), /*!< transmitting state */ - CAN_FLAG_SLPIF = CAN_REGIDX_BIT(STAT_REG_OFFSET, 4U), /*!< status change flag of entering sleep working mode */ - CAN_FLAG_WUIF = CAN_REGIDX_BIT(STAT_REG_OFFSET, 3U), /*!< status change flag of wakeup from sleep working mode */ - CAN_FLAG_ERRIF = CAN_REGIDX_BIT(STAT_REG_OFFSET, 2U), /*!< error flag */ - CAN_FLAG_SLPWS = CAN_REGIDX_BIT(STAT_REG_OFFSET, 1U), /*!< sleep working state */ - CAN_FLAG_IWS = CAN_REGIDX_BIT(STAT_REG_OFFSET, 0U), /*!< initial working state */ + CAN_FLAG_RXL = CAN_REGIDX_BIT(STAT_REG_OFFSET, 11U), /*!< RX level */ + CAN_FLAG_LASTRX = CAN_REGIDX_BIT(STAT_REG_OFFSET, 10U), /*!< last sample value of RX pin */ + CAN_FLAG_RS = CAN_REGIDX_BIT(STAT_REG_OFFSET, 9U), /*!< receiving state */ + CAN_FLAG_TS = CAN_REGIDX_BIT(STAT_REG_OFFSET, 8U), /*!< transmitting state */ + CAN_FLAG_SLPIF = CAN_REGIDX_BIT(STAT_REG_OFFSET, 4U), /*!< status change flag of entering sleep working mode */ + CAN_FLAG_WUIF = CAN_REGIDX_BIT(STAT_REG_OFFSET, 3U), /*!< status change flag of wakeup from sleep working mode */ + CAN_FLAG_ERRIF = CAN_REGIDX_BIT(STAT_REG_OFFSET, 2U), /*!< error flag */ + CAN_FLAG_SLPWS = CAN_REGIDX_BIT(STAT_REG_OFFSET, 1U), /*!< sleep working state */ + CAN_FLAG_IWS = CAN_REGIDX_BIT(STAT_REG_OFFSET, 0U), /*!< initial working state */ /* flags in TSTAT register */ - CAN_FLAG_TMLS2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 31U), /*!< transmit mailbox 2 last sending in Tx FIFO */ - CAN_FLAG_TMLS1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 30U), /*!< transmit mailbox 1 last sending in Tx FIFO */ - CAN_FLAG_TMLS0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 29U), /*!< transmit mailbox 0 last sending in Tx FIFO */ - CAN_FLAG_TME2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 28U), /*!< transmit mailbox 2 empty */ - CAN_FLAG_TME1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 27U), /*!< transmit mailbox 1 empty */ - CAN_FLAG_TME0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 26U), /*!< transmit mailbox 0 empty */ - CAN_FLAG_MTE2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 19U), /*!< mailbox 2 transmit error */ - CAN_FLAG_MTE1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 11U), /*!< mailbox 1 transmit error */ - CAN_FLAG_MTE0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 3U), /*!< mailbox 0 transmit error */ - CAN_FLAG_MAL2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 18U), /*!< mailbox 2 arbitration lost */ - CAN_FLAG_MAL1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 10U), /*!< mailbox 1 arbitration lost */ - CAN_FLAG_MAL0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 2U), /*!< mailbox 0 arbitration lost */ - CAN_FLAG_MTFNERR2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 17U), /*!< mailbox 2 transmit finished with no error */ - CAN_FLAG_MTFNERR1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 9U), /*!< mailbox 1 transmit finished with no error */ - CAN_FLAG_MTFNERR0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 1U), /*!< mailbox 0 transmit finished with no error */ - CAN_FLAG_MTF2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 16U), /*!< mailbox 2 transmit finished */ - CAN_FLAG_MTF1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 8U), /*!< mailbox 1 transmit finished */ - CAN_FLAG_MTF0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 0U), /*!< mailbox 0 transmit finished */ + CAN_FLAG_TMLS2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 31U), /*!< transmit mailbox 2 last sending in TX FIFO */ + CAN_FLAG_TMLS1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 30U), /*!< transmit mailbox 1 last sending in TX FIFO */ + CAN_FLAG_TMLS0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 29U), /*!< transmit mailbox 0 last sending in TX FIFO */ + CAN_FLAG_TME2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 28U), /*!< transmit mailbox 2 empty */ + CAN_FLAG_TME1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 27U), /*!< transmit mailbox 1 empty */ + CAN_FLAG_TME0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 26U), /*!< transmit mailbox 0 empty */ + CAN_FLAG_MTE2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 19U), /*!< mailbox 2 transmit error */ + CAN_FLAG_MTE1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 11U), /*!< mailbox 1 transmit error */ + CAN_FLAG_MTE0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 3U), /*!< mailbox 0 transmit error */ + CAN_FLAG_MAL2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 18U), /*!< mailbox 2 arbitration lost */ + CAN_FLAG_MAL1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 10U), /*!< mailbox 1 arbitration lost */ + CAN_FLAG_MAL0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 2U), /*!< mailbox 0 arbitration lost */ + CAN_FLAG_MTFNERR2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 17U), /*!< mailbox 2 transmit finished with no error */ + CAN_FLAG_MTFNERR1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 9U), /*!< mailbox 1 transmit finished with no error */ + CAN_FLAG_MTFNERR0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 1U), /*!< mailbox 0 transmit finished with no error */ + CAN_FLAG_MTF2 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 16U), /*!< mailbox 2 transmit finished */ + CAN_FLAG_MTF1 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 8U), /*!< mailbox 1 transmit finished */ + CAN_FLAG_MTF0 = CAN_REGIDX_BIT(TSTAT_REG_OFFSET, 0U), /*!< mailbox 0 transmit finished */ /* flags in RFIFO0 register */ - CAN_FLAG_RFO0 = CAN_REGIDX_BIT(RFIFO0_REG_OFFSET, 4U), /*!< receive FIFO0 overfull */ - CAN_FLAG_RFF0 = CAN_REGIDX_BIT(RFIFO0_REG_OFFSET, 3U), /*!< receive FIFO0 full */ + CAN_FLAG_RFO0 = CAN_REGIDX_BIT(RFIFO0_REG_OFFSET, 4U), /*!< receive FIFO0 overfull */ + CAN_FLAG_RFF0 = CAN_REGIDX_BIT(RFIFO0_REG_OFFSET, 3U), /*!< receive FIFO0 full */ /* flags in RFIFO1 register */ - CAN_FLAG_RFO1 = CAN_REGIDX_BIT(RFIFO1_REG_OFFSET, 4U), /*!< receive FIFO1 overfull */ - CAN_FLAG_RFF1 = CAN_REGIDX_BIT(RFIFO1_REG_OFFSET, 3U), /*!< receive FIFO1 full */ + CAN_FLAG_RFO1 = CAN_REGIDX_BIT(RFIFO1_REG_OFFSET, 4U), /*!< receive FIFO1 overfull */ + CAN_FLAG_RFF1 = CAN_REGIDX_BIT(RFIFO1_REG_OFFSET, 3U), /*!< receive FIFO1 full */ /* flags in ERR register */ - CAN_FLAG_BOERR = CAN_REGIDX_BIT(ERR_REG_OFFSET, 2U), /*!< bus-off error */ - CAN_FLAG_PERR = CAN_REGIDX_BIT(ERR_REG_OFFSET, 1U), /*!< passive error */ - CAN_FLAG_WERR = CAN_REGIDX_BIT(ERR_REG_OFFSET, 0U), /*!< warning error */ -}can_flag_enum; + CAN_FLAG_BOERR = CAN_REGIDX_BIT(ERR_REG_OFFSET, 2U), /*!< bus-off error */ + CAN_FLAG_PERR = CAN_REGIDX_BIT(ERR_REG_OFFSET, 1U), /*!< passive error */ + CAN_FLAG_WERR = CAN_REGIDX_BIT(ERR_REG_OFFSET, 0U), /*!< warning error */ +} can_flag_enum; /* CAN interrupt flags */ -typedef enum -{ +typedef enum { /* interrupt flags in STAT register */ - CAN_INT_FLAG_SLPIF = CAN_REGIDX_BITS(STAT_REG_OFFSET, 4U, 17U), /*!< status change interrupt flag of sleep working mode entering */ - CAN_INT_FLAG_WUIF = CAN_REGIDX_BITS(STAT_REG_OFFSET, 3U, 16), /*!< status change interrupt flag of wakeup from sleep working mode */ - CAN_INT_FLAG_ERRIF = CAN_REGIDX_BITS(STAT_REG_OFFSET, 2U, 15), /*!< error interrupt flag */ + CAN_INT_FLAG_SLPIF = CAN_REGIDX_BITS(STAT_REG_OFFSET, 4U, 17U), /*!< status change interrupt flag of sleep working mode entering */ + CAN_INT_FLAG_WUIF = CAN_REGIDX_BITS(STAT_REG_OFFSET, 3U, 16), /*!< status change interrupt flag of wakeup from sleep working mode */ + CAN_INT_FLAG_ERRIF = CAN_REGIDX_BITS(STAT_REG_OFFSET, 2U, 15), /*!< error interrupt flag */ /* interrupt flags in TSTAT register */ CAN_INT_FLAG_MTF2 = CAN_REGIDX_BITS(TSTAT_REG_OFFSET, 16U, 0U), /*!< mailbox 2 transmit finished interrupt flag */ CAN_INT_FLAG_MTF1 = CAN_REGIDX_BITS(TSTAT_REG_OFFSET, 8U, 0U), /*!< mailbox 1 transmit finished interrupt flag */ @@ -392,16 +390,15 @@ typedef enum CAN_INT_FLAG_RFF1 = CAN_REGIDX_BITS(RFIFO1_REG_OFFSET, 3U, 5U), /*!< receive FIFO1 full interrupt flag */ CAN_INT_FLAG_RFL1 = CAN_REGIDX_BITS(RFIFO1_REG_OFFSET, 2U, 4U), /*!< receive FIFO1 not empty interrupt flag */ /* interrupt flags in ERR register */ - CAN_INT_FLAG_ERRN = CAN_REGIDX_BITS(ERR_REG_OFFSET, 3U, 11U), /*!< error number interrupt flag */ - CAN_INT_FLAG_BOERR = CAN_REGIDX_BITS(ERR_REG_OFFSET, 2U, 10U), /*!< bus-off error interrupt flag */ - CAN_INT_FLAG_PERR = CAN_REGIDX_BITS(ERR_REG_OFFSET, 1U, 9U), /*!< passive error interrupt flag */ - CAN_INT_FLAG_WERR = CAN_REGIDX_BITS(ERR_REG_OFFSET, 0U, 8U), /*!< warning error interrupt flag */ -}can_interrupt_flag_enum; - -/* CAN initiliaze parameters struct */ -typedef struct -{ - uint8_t working_mode; /*!< CAN working mode */ + CAN_INT_FLAG_ERRN = CAN_REGIDX_BITS(ERR_REG_OFFSET, 3U, 11U), /*!< error number interrupt flag */ + CAN_INT_FLAG_BOERR = CAN_REGIDX_BITS(ERR_REG_OFFSET, 2U, 10U), /*!< bus-off error interrupt flag */ + CAN_INT_FLAG_PERR = CAN_REGIDX_BITS(ERR_REG_OFFSET, 1U, 9U), /*!< passive error interrupt flag */ + CAN_INT_FLAG_WERR = CAN_REGIDX_BITS(ERR_REG_OFFSET, 0U, 8U), /*!< warning error interrupt flag */ +} can_interrupt_flag_enum; + +/* CAN initiliaze parameters structure */ +typedef struct { + uint8_t working_mode; /*!< CAN working mode */ uint8_t resync_jump_width; /*!< CAN resynchronization jump width */ uint8_t time_segment_1; /*!< time segment 1 */ uint8_t time_segment_2; /*!< time segment 2 */ @@ -412,22 +409,20 @@ typedef struct ControlStatus rec_fifo_overwrite; /*!< receive FIFO overwrite mode */ ControlStatus trans_fifo_order; /*!< transmit FIFO order */ uint16_t prescaler; /*!< baudrate prescaler */ -}can_parameter_struct; +} can_parameter_struct; -/* CAN transmit message struct */ -typedef struct -{ +/* CAN transmit message structure */ +typedef struct { uint32_t tx_sfid; /*!< standard format frame identifier */ uint32_t tx_efid; /*!< extended format frame identifier */ uint8_t tx_ff; /*!< format of frame, standard or extended format */ uint8_t tx_ft; /*!< type of frame, data or remote */ uint8_t tx_dlen; /*!< data length */ uint8_t tx_data[8]; /*!< transmit data */ -}can_trasnmit_message_struct; +} can_trasnmit_message_struct; -/* CAN receive message struct */ -typedef struct -{ +/* CAN receive message structure */ +typedef struct { uint32_t rx_sfid; /*!< standard format frame identifier */ uint32_t rx_efid; /*!< extended format frame identifier */ uint8_t rx_ff; /*!< format of frame, standard or extended format */ @@ -437,10 +432,9 @@ typedef struct uint8_t rx_fi; /*!< filtering index */ } can_receive_message_struct; -/* CAN filter parameters struct */ -typedef struct -{ - uint16_t filter_list_high; /*!< filter list number high bits*/ +/* CAN filter parameters structure */ +typedef struct { + uint16_t filter_list_high; /*!< filter list number high bits */ uint16_t filter_list_low; /*!< filter list number low bits */ uint16_t filter_mask_high; /*!< filter mask number high bits */ uint16_t filter_mask_low; /*!< filter mask number low bits */ @@ -449,11 +443,10 @@ typedef struct uint16_t filter_mode; /*!< filter mode, list or mask */ uint16_t filter_bits; /*!< filter scale */ ControlStatus filter_enable; /*!< filter work or not */ -}can_filter_parameter_struct; +} can_filter_parameter_struct; /* CAN errors */ -typedef enum -{ +typedef enum { CAN_ERROR_NONE = 0, /*!< no error */ CAN_ERROR_FILL, /*!< fill error */ CAN_ERROR_FORMATE, /*!< format error */ @@ -462,38 +455,36 @@ typedef enum CAN_ERROR_BITDOMINANTER, /*!< bit dominant error */ CAN_ERROR_CRC, /*!< CRC error */ CAN_ERROR_SOFTWARECFG, /*!< software configure */ -}can_error_enum; +} can_error_enum; /* transmit states */ -typedef enum -{ - CAN_TRANSMIT_FAILED = 0U, /*!< CAN transmitted failure */ - CAN_TRANSMIT_OK = 1U, /*!< CAN transmitted success */ - CAN_TRANSMIT_PENDING = 2U, /*!< CAN transmitted pending */ - CAN_TRANSMIT_NOMAILBOX = 4U, /*!< no empty mailbox to be used for CAN */ -}can_transmit_state_enum; - -typedef enum -{ +typedef enum { + CAN_TRANSMIT_FAILED = 0U, /*!< CAN transmitted failure */ + CAN_TRANSMIT_OK = 1U, /*!< CAN transmitted success */ + CAN_TRANSMIT_PENDING = 2U, /*!< CAN transmitted pending */ + CAN_TRANSMIT_NOMAILBOX = 4U, /*!< no empty mailbox to be used for CAN */ +} can_transmit_state_enum; + +typedef enum { CAN_INIT_STRUCT = 0, /* CAN initiliaze parameters struct */ CAN_FILTER_STRUCT, /* CAN filter parameters struct */ CAN_TX_MESSAGE_STRUCT, /* CAN transmit message struct */ CAN_RX_MESSAGE_STRUCT, /* CAN receive message struct */ -}can_struct_type_enum; +} can_struct_type_enum; -/* CAN baudrate prescaler*/ +/* CAN baudrate prescaler */ #define BT_BAUDPSC(regval) (BITS(0,9) & ((uint32_t)(regval) << 0)) -/* CAN bit segment 1*/ +/* CAN bit segment 1 */ #define BT_BS1(regval) (BITS(16,19) & ((uint32_t)(regval) << 16)) -/* CAN bit segment 2*/ +/* CAN bit segment 2 */ #define BT_BS2(regval) (BITS(20,22) & ((uint32_t)(regval) << 20)) -/* CAN resynchronization jump width*/ +/* CAN resynchronization jump width */ #define BT_SJW(regval) (BITS(24,25) & ((uint32_t)(regval) << 24)) -/* CAN communication mode*/ +/* CAN communication mode */ #define BT_MODE(regval) (BITS(30,31) & ((uint32_t)(regval) << 30)) /* CAN FDATA high 16 bits */ @@ -502,13 +493,13 @@ typedef enum /* CAN FDATA low 16 bits */ #define FDATA_MASK_LOW(regval) (BITS(0,15) & ((uint32_t)(regval) << 0)) -/* CAN1 filter start bank_number*/ +/* CAN1 filter start bank_number */ #define FCTL_HBC1F(regval) (BITS(8,13) & ((uint32_t)(regval) << 8)) -/* CAN transmit mailbox extended identifier*/ +/* CAN transmit mailbox extended identifier */ #define TMI_EFID(regval) (BITS(3,31) & ((uint32_t)(regval) << 3)) -/* CAN transmit mailbox standard identifier*/ +/* CAN transmit mailbox standard identifier */ #define TMI_SFID(regval) (BITS(21,31) & ((uint32_t)(regval) << 21)) /* transmit data byte 0 */ @@ -520,25 +511,25 @@ typedef enum /* transmit data byte 2 */ #define TMDATA0_DB2(regval) (BITS(16,23) & ((uint32_t)(regval) << 16)) -/* transmit data byte 3 */ +/* transmit data byte 3 */ #define TMDATA0_DB3(regval) (BITS(24,31) & ((uint32_t)(regval) << 24)) -/* transmit data byte 4 */ +/* transmit data byte 4 */ #define TMDATA1_DB4(regval) (BITS(0,7) & ((uint32_t)(regval) << 0)) -/* transmit data byte 5 */ +/* transmit data byte 5 */ #define TMDATA1_DB5(regval) (BITS(8,15) & ((uint32_t)(regval) << 8)) -/* transmit data byte 6 */ +/* transmit data byte 6 */ #define TMDATA1_DB6(regval) (BITS(16,23) & ((uint32_t)(regval) << 16)) -/* transmit data byte 7 */ +/* transmit data byte 7 */ #define TMDATA1_DB7(regval) (BITS(24,31) & ((uint32_t)(regval) << 24)) -/* receive mailbox extended identifier*/ +/* receive mailbox extended identifier */ #define GET_RFIFOMI_EFID(regval) GET_BITS((uint32_t)(regval), 3U, 31U) -/* receive mailbox standrad identifier*/ +/* receive mailbox standard identifier */ #define GET_RFIFOMI_SFID(regval) GET_BITS((uint32_t)(regval), 21U, 31U) /* receive data length */ @@ -571,25 +562,25 @@ typedef enum /* receive data byte 7 */ #define GET_RFIFOMDATA1_DB7(regval) GET_BITS((uint32_t)(regval), 24U, 31U) -/* error number */ +/* error number */ #define GET_ERR_ERRN(regval) GET_BITS((uint32_t)(regval), 4U, 6U) -/* transmit error count */ +/* transmit error count */ #define GET_ERR_TECNT(regval) GET_BITS((uint32_t)(regval), 16U, 23U) -/* receive error count */ +/* receive error count */ #define GET_ERR_RECNT(regval) GET_BITS((uint32_t)(regval), 24U, 31U) /* CAN errors */ #define ERR_ERRN(regval) (BITS(4,6) & ((uint32_t)(regval) << 4)) -#define CAN_ERRN_0 ERR_ERRN(0U) /* no error */ -#define CAN_ERRN_1 ERR_ERRN(1U) /*!< fill error */ -#define CAN_ERRN_2 ERR_ERRN(2U) /*!< format error */ -#define CAN_ERRN_3 ERR_ERRN(3U) /*!< ACK error */ -#define CAN_ERRN_4 ERR_ERRN(4U) /*!< bit recessive error */ -#define CAN_ERRN_5 ERR_ERRN(5U) /*!< bit dominant error */ -#define CAN_ERRN_6 ERR_ERRN(6U) /*!< CRC error */ -#define CAN_ERRN_7 ERR_ERRN(7U) /*!< software error */ +#define CAN_ERRN_0 ERR_ERRN(0U) /*!< no error */ +#define CAN_ERRN_1 ERR_ERRN(1U) /*!< fill error */ +#define CAN_ERRN_2 ERR_ERRN(2U) /*!< format error */ +#define CAN_ERRN_3 ERR_ERRN(3U) /*!< ACK error */ +#define CAN_ERRN_4 ERR_ERRN(4U) /*!< bit recessive error */ +#define CAN_ERRN_5 ERR_ERRN(5U) /*!< bit dominant error */ +#define CAN_ERRN_6 ERR_ERRN(6U) /*!< CRC error */ +#define CAN_ERRN_7 ERR_ERRN(7U) /*!< software error */ #define CAN_STATE_PENDING ((uint32_t)0x00000000U) /*!< CAN pending */ @@ -643,11 +634,11 @@ typedef enum #define CAN_FF_STANDARD ((uint32_t)0x00000000U) /*!< standard frame */ #define CAN_FF_EXTENDED ((uint32_t)0x00000004U) /*!< extended frame */ -/* CAN receive fifo */ +/* CAN receive FIFO */ #define CAN_FIFO0 ((uint8_t)0x00U) /*!< receive FIFO0 */ #define CAN_FIFO1 ((uint8_t)0x01U) /*!< receive FIFO1 */ -/* frame number of receive fifo */ +/* frame number of receive FIFO */ #define CAN_RFIF_RFL_MASK ((uint32_t)0x00000003U) /*!< mask for frame number in receive FIFOx */ #define CAN_SFID_MASK ((uint32_t)0x000007FFU) /*!< mask of standard identifier */ @@ -693,15 +684,18 @@ typedef enum #define CAN_INT_SLPW CAN_INTEN_SLPWIE /*!< sleep working interrupt enable */ /* function declarations */ +/* initialization functions */ /* deinitialize CAN */ void can_deinit(uint32_t can_periph); -/* initialize CAN struct */ -void can_struct_para_init(can_struct_type_enum type, void* p_struct); +/* initialize CAN structure */ +void can_struct_para_init(can_struct_type_enum type, void *p_struct); /* initialize CAN */ -ErrStatus can_init(uint32_t can_periph, can_parameter_struct* can_parameter_init); -/* CAN filter init */ -void can_filter_init(can_filter_parameter_struct* can_filter_parameter_init); -/* set can1 fliter start bank number */ +ErrStatus can_init(uint32_t can_periph, can_parameter_struct *can_parameter_init); +/* CAN filter initialization */ +void can_filter_init(can_filter_parameter_struct *can_filter_parameter_init); + +/* function configuration */ +/* set can1 filter start bank number */ void can1_filter_start_bank(uint8_t start_bank); /* enable functions */ /* CAN debug freeze enable */ @@ -715,14 +709,14 @@ void can_time_trigger_mode_disable(uint32_t can_periph); /* transmit functions */ /* transmit CAN message */ -uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct* transmit_message); +uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct *transmit_message); /* get CAN transmit state */ can_transmit_state_enum can_transmit_states(uint32_t can_periph, uint8_t mailbox_number); /* stop CAN transmission */ void can_transmission_stop(uint32_t can_periph, uint8_t mailbox_number); /* CAN receive message */ -void can_message_receive(uint32_t can_periph, uint8_t fifo_number, can_receive_message_struct* receive_message); -/* CAN release fifo */ +void can_message_receive(uint32_t can_periph, uint8_t fifo_number, can_receive_message_struct *receive_message); +/* CAN release FIFO */ void can_fifo_release(uint32_t can_periph, uint8_t fifo_number); /* CAN receive message length */ uint8_t can_receive_message_length_get(uint32_t can_periph, uint8_t fifo_number); @@ -731,21 +725,22 @@ ErrStatus can_working_mode_set(uint32_t can_periph, uint8_t working_mode); /* CAN wakeup from sleep mode */ ErrStatus can_wakeup(uint32_t can_periph); -/* CAN get error */ +/* CAN get error type */ can_error_enum can_error_get(uint32_t can_periph); /* get CAN receive error number */ uint8_t can_receive_error_number_get(uint32_t can_periph); /* get CAN transmit error number */ uint8_t can_transmit_error_number_get(uint32_t can_periph); -/* CAN interrupt enable */ -void can_interrupt_enable(uint32_t can_periph, uint32_t interrupt); -/* CAN interrupt disable */ -void can_interrupt_disable(uint32_t can_periph, uint32_t interrupt); +/* interrupt & flag functions */ /* CAN get flag state */ FlagStatus can_flag_get(uint32_t can_periph, can_flag_enum flag); /* CAN clear flag state */ void can_flag_clear(uint32_t can_periph, can_flag_enum flag); +/* CAN interrupt enable */ +void can_interrupt_enable(uint32_t can_periph, uint32_t interrupt); +/* CAN interrupt disable */ +void can_interrupt_disable(uint32_t can_periph, uint32_t interrupt); /* CAN get interrupt flag state */ FlagStatus can_interrupt_flag_get(uint32_t can_periph, can_interrupt_flag_enum flag); /* CAN clear interrupt flag state */ diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_ctc.h b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_ctc.h index 96675b54..61efe688 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_ctc.h +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_ctc.h @@ -41,13 +41,13 @@ OF SUCH DAMAGE. #include "gd32f30x.h" /* CTC definitions */ -#define CTC CTC_BASE +#define CTC CTC_BASE /*!< CTC base address */ /* registers definitions */ -#define CTC_CTL0 REG32((CTC) + 0x00U) /*!< CTC control register 0 */ -#define CTC_CTL1 REG32((CTC) + 0x04U) /*!< CTC control register 1 */ -#define CTC_STAT REG32((CTC) + 0x08U) /*!< CTC status register */ -#define CTC_INTC REG32((CTC) + 0x0CU) /*!< CTC interrupt clear register */ +#define CTC_CTL0 REG32((CTC) + 0x00000000U) /*!< CTC control register 0 */ +#define CTC_CTL1 REG32((CTC) + 0x00000004U) /*!< CTC control register 1 */ +#define CTC_STAT REG32((CTC) + 0x00000008U) /*!< CTC status register */ +#define CTC_INTC REG32((CTC) + 0x0000000CU) /*!< CTC interrupt clear register */ /* bits definitions */ /* CTC_CTL0 */ @@ -169,6 +169,10 @@ uint16_t ctc_counter_reload_value_read(void); uint8_t ctc_irc48m_trim_value_read(void); /* interrupt & flag functions */ +/* get CTC flag */ +FlagStatus ctc_flag_get(uint32_t flag); +/* clear CTC flag */ +void ctc_flag_clear(uint32_t flag); /* enable the CTC interrupt */ void ctc_interrupt_enable(uint32_t interrupt); /* disable the CTC interrupt */ @@ -177,9 +181,5 @@ void ctc_interrupt_disable(uint32_t interrupt); FlagStatus ctc_interrupt_flag_get(uint32_t int_flag); /* clear CTC interrupt flag */ void ctc_interrupt_flag_clear(uint32_t int_flag); -/* get CTC flag */ -FlagStatus ctc_flag_get(uint32_t flag); -/* clear CTC flag */ -void ctc_flag_clear(uint32_t flag); #endif /* GD32F30X_CTC_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_exti.h b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_exti.h index 9930f358..ae92ee6a 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_exti.h +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_exti.h @@ -163,26 +163,26 @@ OF SUCH DAMAGE. #define EXTI_SWIEV_SWIEV19 BIT(19) /*!< software interrupt/event request from line 19 */ /* EXTI_PD */ -#define EXTI_PD_PD0 BIT(0) /*!< interrupt/event pending status from line 0 */ -#define EXTI_PD_PD1 BIT(1) /*!< interrupt/event pending status from line 1 */ -#define EXTI_PD_PD2 BIT(2) /*!< interrupt/event pending status from line 2 */ -#define EXTI_PD_PD3 BIT(3) /*!< interrupt/event pending status from line 3 */ -#define EXTI_PD_PD4 BIT(4) /*!< interrupt/event pending status from line 4 */ -#define EXTI_PD_PD5 BIT(5) /*!< interrupt/event pending status from line 5 */ -#define EXTI_PD_PD6 BIT(6) /*!< interrupt/event pending status from line 6 */ -#define EXTI_PD_PD7 BIT(7) /*!< interrupt/event pending status from line 7 */ -#define EXTI_PD_PD8 BIT(8) /*!< interrupt/event pending status from line 8 */ -#define EXTI_PD_PD9 BIT(9) /*!< interrupt/event pending status from line 9 */ -#define EXTI_PD_PD10 BIT(10) /*!< interrupt/event pending status from line 10 */ -#define EXTI_PD_PD11 BIT(11) /*!< interrupt/event pending status from line 11 */ -#define EXTI_PD_PD12 BIT(12) /*!< interrupt/event pending status from line 12 */ -#define EXTI_PD_PD13 BIT(13) /*!< interrupt/event pending status from line 13 */ -#define EXTI_PD_PD14 BIT(14) /*!< interrupt/event pending status from line 14 */ -#define EXTI_PD_PD15 BIT(15) /*!< interrupt/event pending status from line 15 */ -#define EXTI_PD_PD16 BIT(16) /*!< interrupt/event pending status from line 16 */ -#define EXTI_PD_PD17 BIT(17) /*!< interrupt/event pending status from line 17 */ -#define EXTI_PD_PD18 BIT(18) /*!< interrupt/event pending status from line 18 */ -#define EXTI_PD_PD19 BIT(19) /*!< interrupt/event pending status from line 19 */ +#define EXTI_PD_PD0 BIT(0) /*!< interrupt pending status from line 0 */ +#define EXTI_PD_PD1 BIT(1) /*!< interrupt pending status from line 1 */ +#define EXTI_PD_PD2 BIT(2) /*!< interrupt pending status from line 2 */ +#define EXTI_PD_PD3 BIT(3) /*!< interrupt pending status from line 3 */ +#define EXTI_PD_PD4 BIT(4) /*!< interrupt pending status from line 4 */ +#define EXTI_PD_PD5 BIT(5) /*!< interrupt pending status from line 5 */ +#define EXTI_PD_PD6 BIT(6) /*!< interrupt pending status from line 6 */ +#define EXTI_PD_PD7 BIT(7) /*!< interrupt pending status from line 7 */ +#define EXTI_PD_PD8 BIT(8) /*!< interrupt pending status from line 8 */ +#define EXTI_PD_PD9 BIT(9) /*!< interrupt pending status from line 9 */ +#define EXTI_PD_PD10 BIT(10) /*!< interrupt pending status from line 10 */ +#define EXTI_PD_PD11 BIT(11) /*!< interrupt pending status from line 11 */ +#define EXTI_PD_PD12 BIT(12) /*!< interrupt pending status from line 12 */ +#define EXTI_PD_PD13 BIT(13) /*!< interrupt pending status from line 13 */ +#define EXTI_PD_PD14 BIT(14) /*!< interrupt pending status from line 14 */ +#define EXTI_PD_PD15 BIT(15) /*!< interrupt pending status from line 15 */ +#define EXTI_PD_PD16 BIT(16) /*!< interrupt pending status from line 16 */ +#define EXTI_PD_PD17 BIT(17) /*!< interrupt pending status from line 17 */ +#define EXTI_PD_PD18 BIT(18) /*!< interrupt pending status from line 18 */ +#define EXTI_PD_PD19 BIT(19) /*!< interrupt pending status from line 19 */ /* constants definitions */ /* EXTI line number */ @@ -207,7 +207,7 @@ typedef enum EXTI_16 = BIT(16), /*!< EXTI line 16 */ EXTI_17 = BIT(17), /*!< EXTI line 17 */ EXTI_18 = BIT(18), /*!< EXTI line 18 */ - EXTI_19 = BIT(19), /*!< EXTI line 19 */ + EXTI_19 = BIT(19) /*!< EXTI line 19 */ }exti_line_enum; /* external interrupt and event */ @@ -222,34 +222,37 @@ typedef enum { EXTI_TRIG_RISING = 0, /*!< EXTI rising edge trigger */ EXTI_TRIG_FALLING, /*!< EXTI falling edge trigger */ - EXTI_TRIG_BOTH /*!< EXTI rising and falling edge trigger */ + EXTI_TRIG_BOTH, /*!< EXTI rising and falling edge trigger */ + EXTI_TRIG_NONE /*!< without rising edge or falling edge trigger */ }exti_trig_type_enum; /* function declarations */ +/* initialization, EXTI lines configuration functions */ /* deinitialize the EXTI */ void exti_deinit(void); -/* enable the configuration of EXTI initialize */ +/* initialize the EXTI line x */ void exti_init(exti_line_enum linex, exti_mode_enum mode, exti_trig_type_enum trig_type); /* enable the interrupts from EXTI line x */ void exti_interrupt_enable(exti_line_enum linex); -/* enable the events from EXTI line x */ -void exti_event_enable(exti_line_enum linex); /* disable the interrupts from EXTI line x */ void exti_interrupt_disable(exti_line_enum linex); +/* enable the events from EXTI line x */ +void exti_event_enable(exti_line_enum linex); /* disable the events from EXTI line x */ void exti_event_disable(exti_line_enum linex); +/* enable the software interrupt event from EXTI line x */ +void exti_software_interrupt_enable(exti_line_enum linex); +/* disable the software interrupt event from EXTI line x */ +void exti_software_interrupt_disable(exti_line_enum linex); -/* get EXTI lines pending flag */ +/* interrupt & flag functions */ +/* get EXTI line x interrupt pending flag */ FlagStatus exti_flag_get(exti_line_enum linex); -/* clear EXTI lines pending flag */ +/* clear EXTI line x interrupt pending flag */ void exti_flag_clear(exti_line_enum linex); -/* get EXTI lines flag when the interrupt flag is set */ +/* get EXTI line x interrupt pending flag */ FlagStatus exti_interrupt_flag_get(exti_line_enum linex); -/* clear EXTI lines pending flag */ +/* clear EXTI line x interrupt pending flag */ void exti_interrupt_flag_clear(exti_line_enum linex); -/* enable the EXTI software interrupt event */ -void exti_software_interrupt_enable(exti_line_enum linex); -/* disable the EXTI software interrupt event */ -void exti_software_interrupt_disable(exti_line_enum linex); #endif /* GD32F30X_EXTI_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_gpio.h b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_gpio.h index b7b46848..4054b7bc 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_gpio.h +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_gpio.h @@ -261,7 +261,7 @@ OF SUCH DAMAGE. #define AFIO_PCF0_SWJ_CFG BITS(24,26) /*!< serial wire JTAG configuration */ #define AFIO_PCF0_SPI2_REMAP BIT(28) /*!< SPI2/I2S2 remapping */ #define AFIO_PCF0_TIMER1ITR0_REMAP BIT(29) /*!< TIMER1 internal trigger 0 remapping */ -#define AFIO_PCF0_TIMER1ITI0_REMAP BIT(29) /*!< TIMER1 internal trigger 0 remapping */ +#define AFIO_PCF0_TIMER1ITI1_REMAP BIT(29) /*!< TIMER1 internal trigger 0 remapping */ #define AFIO_PCF0_PTP_PPS_REMAP BIT(30) /*!< ethernet PTP PPS remapping */ #else diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_spi.h b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_spi.h index 23d24b1a..24da60a6 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_spi.h +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_spi.h @@ -300,7 +300,7 @@ void spi_dma_enable(uint32_t spi_periph, uint8_t dma); /* disable SPI DMA */ void spi_dma_disable(uint32_t spi_periph, uint8_t dma); -/* SPI/I2S transfer configure functions */ +/* SPI/I2S transfer functions */ /* configure SPI/I2S data frame format */ void spi_i2s_data_frame_format_config(uint32_t spi_periph, uint16_t frame_format); /* SPI transmit data */ @@ -309,6 +309,9 @@ void spi_i2s_data_transmit(uint32_t spi_periph, uint16_t data); uint16_t spi_i2s_data_receive(uint32_t spi_periph); /* configure SPI bidirectional transfer direction */ void spi_bidirectional_transfer_config(uint32_t spi_periph, uint32_t transfer_direction); +/* clear TI Mode Format Error flag status */ +void spi_i2s_format_error_clear(uint32_t spi_periph, uint32_t flag); + /* SPI CRC functions */ /* set SPI CRC polynomial */ @@ -323,6 +326,8 @@ void spi_crc_off(uint32_t spi_periph); void spi_crc_next(uint32_t spi_periph); /* get SPI CRC send value or receive value */ uint16_t spi_crc_get(uint32_t spi_periph, uint8_t crc); +/* clear SPI CRC error flag status */ +void spi_crc_error_clear(uint32_t spi_periph); /* SPI TI mode functions */ /* enable SPI TI mode */ @@ -359,7 +364,5 @@ void spi_i2s_interrupt_disable(uint32_t spi_periph, uint8_t interrupt); FlagStatus spi_i2s_interrupt_flag_get(uint32_t spi_periph, uint8_t interrupt); /* get SPI and I2S flag status */ FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t flag); -/* clear SPI CRC error flag status */ -void spi_crc_error_clear(uint32_t spi_periph); #endif /* GD32F30X_SPI_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_usart.h b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_usart.h index d9754c67..7eaac57a 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_usart.h +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Include/gd32f30x_usart.h @@ -41,106 +41,106 @@ OF SUCH DAMAGE. #include "gd32f30x.h" /* USARTx(x=0,1,2)/UARTx(x=3,4) definitions */ -#define USART1 USART_BASE /*!< USART1 base address */ -#define USART2 (USART_BASE+0x00000400U) /*!< USART2 base address */ -#define UART3 (USART_BASE+0x00000800U) /*!< UART3 base address */ -#define UART4 (USART_BASE+0x00000C00U) /*!< UART4 base address */ -#define USART0 (USART_BASE+0x0000F400U) /*!< USART0 base address */ +#define USART1 USART_BASE /*!< USART1 base address */ +#define USART2 (USART_BASE+0x00000400U) /*!< USART2 base address */ +#define UART3 (USART_BASE+0x00000800U) /*!< UART3 base address */ +#define UART4 (USART_BASE+0x00000C00U) /*!< UART4 base address */ +#define USART0 (USART_BASE+0x0000F400U) /*!< USART0 base address */ /* registers definitions */ -#define USART_STAT0(usartx) REG32((usartx) + 0x00U) /*!< USART status register 0 */ -#define USART_DATA(usartx) REG32((usartx) + 0x04U) /*!< USART data register */ -#define USART_BAUD(usartx) REG32((usartx) + 0x08U) /*!< USART baud rate register */ -#define USART_CTL0(usartx) REG32((usartx) + 0x0CU) /*!< USART control register 0 */ -#define USART_CTL1(usartx) REG32((usartx) + 0x10U) /*!< USART control register 1 */ -#define USART_CTL2(usartx) REG32((usartx) + 0x14U) /*!< USART control register 2 */ -#define USART_GP(usartx) REG32((usartx) + 0x18U) /*!< USART guard time and prescaler register */ -#define USART_CTL3(usartx) REG32((usartx) + 0x80U) /*!< USART control register 3 */ -#define USART_RT(usartx) REG32((usartx) + 0x84U) /*!< USART receiver timeout register */ -#define USART_STAT1(usartx) REG32((usartx) + 0x88U) /*!< USART status register 1 */ +#define USART_STAT0(usartx) REG32((usartx) + 0x00000000U) /*!< USART status register 0 */ +#define USART_DATA(usartx) REG32((usartx) + 0x00000004U) /*!< USART data register */ +#define USART_BAUD(usartx) REG32((usartx) + 0x00000008U) /*!< USART baud rate register */ +#define USART_CTL0(usartx) REG32((usartx) + 0x0000000CU) /*!< USART control register 0 */ +#define USART_CTL1(usartx) REG32((usartx) + 0x00000010U) /*!< USART control register 1 */ +#define USART_CTL2(usartx) REG32((usartx) + 0x00000014U) /*!< USART control register 2 */ +#define USART_GP(usartx) REG32((usartx) + 0x00000018U) /*!< USART guard time and prescaler register */ +#define USART_CTL3(usartx) REG32((usartx) + 0x00000080U) /*!< USART control register 3 */ +#define USART_RT(usartx) REG32((usartx) + 0x00000084U) /*!< USART receiver timeout register */ +#define USART_STAT1(usartx) REG32((usartx) + 0x00000088U) /*!< USART status register 1 */ /* bits definitions */ /* USARTx_STAT0 */ -#define USART_STAT0_PERR BIT(0) /*!< parity error flag */ -#define USART_STAT0_FERR BIT(1) /*!< frame error flag */ -#define USART_STAT0_NERR BIT(2) /*!< noise error flag */ -#define USART_STAT0_ORERR BIT(3) /*!< overrun error */ -#define USART_STAT0_IDLEF BIT(4) /*!< IDLE frame detected flag */ -#define USART_STAT0_RBNE BIT(5) /*!< read data buffer not empty */ -#define USART_STAT0_TC BIT(6) /*!< transmission complete */ -#define USART_STAT0_TBE BIT(7) /*!< transmit data buffer empty */ -#define USART_STAT0_LBDF BIT(8) /*!< LIN break detected flag */ -#define USART_STAT0_CTSF BIT(9) /*!< CTS change flag */ +#define USART_STAT0_PERR BIT(0) /*!< parity error flag */ +#define USART_STAT0_FERR BIT(1) /*!< frame error flag */ +#define USART_STAT0_NERR BIT(2) /*!< noise error flag */ +#define USART_STAT0_ORERR BIT(3) /*!< overrun error */ +#define USART_STAT0_IDLEF BIT(4) /*!< IDLE frame detected flag */ +#define USART_STAT0_RBNE BIT(5) /*!< read data buffer not empty */ +#define USART_STAT0_TC BIT(6) /*!< transmission complete */ +#define USART_STAT0_TBE BIT(7) /*!< transmit data buffer empty */ +#define USART_STAT0_LBDF BIT(8) /*!< LIN break detected flag */ +#define USART_STAT0_CTSF BIT(9) /*!< CTS change flag */ /* USARTx_DATA */ -#define USART_DATA_DATA BITS(0,8) /*!< transmit or read data value */ +#define USART_DATA_DATA BITS(0,8) /*!< transmit or read data value */ /* USARTx_BAUD */ -#define USART_BAUD_FRADIV BITS(0,3) /*!< fraction part of baud-rate divider */ -#define USART_BAUD_INTDIV BITS(4,15) /*!< integer part of baud-rate divider */ +#define USART_BAUD_FRADIV BITS(0,3) /*!< fraction part of baud-rate divider */ +#define USART_BAUD_INTDIV BITS(4,15) /*!< integer part of baud-rate divider */ /* USARTx_CTL0 */ -#define USART_CTL0_SBKCMD BIT(0) /*!< send break command */ -#define USART_CTL0_RWU BIT(1) /*!< receiver wakeup from mute mode */ -#define USART_CTL0_REN BIT(2) /*!< receiver enable */ -#define USART_CTL0_TEN BIT(3) /*!< transmitter enable */ -#define USART_CTL0_IDLEIE BIT(4) /*!< idle line detected interrupt enable */ -#define USART_CTL0_RBNEIE BIT(5) /*!< read data buffer not empty interrupt and overrun error interrupt enable */ -#define USART_CTL0_TCIE BIT(6) /*!< transmission complete interrupt enable */ -#define USART_CTL0_TBEIE BIT(7) /*!< transmitter buffer empty interrupt enable */ -#define USART_CTL0_PERRIE BIT(8) /*!< parity error interrupt enable */ -#define USART_CTL0_PM BIT(9) /*!< parity mode */ -#define USART_CTL0_PCEN BIT(10) /*!< parity check function enable */ -#define USART_CTL0_WM BIT(11) /*!< wakeup method in mute mode */ -#define USART_CTL0_WL BIT(12) /*!< word length */ -#define USART_CTL0_UEN BIT(13) /*!< USART enable */ +#define USART_CTL0_SBKCMD BIT(0) /*!< send break command */ +#define USART_CTL0_RWU BIT(1) /*!< receiver wakeup from mute mode */ +#define USART_CTL0_REN BIT(2) /*!< enable receiver */ +#define USART_CTL0_TEN BIT(3) /*!< enable transmitter */ +#define USART_CTL0_IDLEIE BIT(4) /*!< enable idle line detected interrupt */ +#define USART_CTL0_RBNEIE BIT(5) /*!< enable read data buffer not empty interrupt and overrun error interrupt */ +#define USART_CTL0_TCIE BIT(6) /*!< enable transmission complete interrupt */ +#define USART_CTL0_TBEIE BIT(7) /*!< enable transmitter buffer empty interrupt */ +#define USART_CTL0_PERRIE BIT(8) /*!< enable parity error interrupt */ +#define USART_CTL0_PM BIT(9) /*!< parity mode */ +#define USART_CTL0_PCEN BIT(10) /*!< enable parity check function */ +#define USART_CTL0_WM BIT(11) /*!< wakeup method in mute mode */ +#define USART_CTL0_WL BIT(12) /*!< word length */ +#define USART_CTL0_UEN BIT(13) /*!< enable USART */ /* USARTx_CTL1 */ -#define USART_CTL1_ADDR BITS(0,3) /*!< address of USART */ -#define USART_CTL1_LBLEN BIT(5) /*!< LIN break frame length */ -#define USART_CTL1_LBDIE BIT(6) /*!< LIN break detected interrupt eanble */ -#define USART_CTL1_CLEN BIT(8) /*!< CK length */ -#define USART_CTL1_CPH BIT(9) /*!< CK phase */ -#define USART_CTL1_CPL BIT(10) /*!< CK polarity */ -#define USART_CTL1_CKEN BIT(11) /*!< CK pin enable */ -#define USART_CTL1_STB BITS(12,13) /*!< STOP bits length */ -#define USART_CTL1_LMEN BIT(14) /*!< LIN mode enable */ +#define USART_CTL1_ADDR BITS(0,3) /*!< address of USART */ +#define USART_CTL1_LBLEN BIT(5) /*!< LIN break frame length */ +#define USART_CTL1_LBDIE BIT(6) /*!< eanble LIN break detected interrupt */ +#define USART_CTL1_CLEN BIT(8) /*!< CK length */ +#define USART_CTL1_CPH BIT(9) /*!< CK phase */ +#define USART_CTL1_CPL BIT(10) /*!< CK polarity */ +#define USART_CTL1_CKEN BIT(11) /*!< enable CK pin */ +#define USART_CTL1_STB BITS(12,13) /*!< STOP bits length */ +#define USART_CTL1_LMEN BIT(14) /*!< enable LIN mode */ /* USARTx_CTL2 */ -#define USART_CTL2_ERRIE BIT(0) /*!< error interrupt enable */ -#define USART_CTL2_IREN BIT(1) /*!< IrDA mode enable */ -#define USART_CTL2_IRLP BIT(2) /*!< IrDA low-power */ -#define USART_CTL2_HDEN BIT(3) /*!< half-duplex enable */ -#define USART_CTL2_NKEN BIT(4) /*!< NACK enable in smartcard mode */ -#define USART_CTL2_SCEN BIT(5) /*!< smartcard mode enable */ -#define USART_CTL2_DENR BIT(6) /*!< DMA request enable for reception */ -#define USART_CTL2_DENT BIT(7) /*!< DMA request enable for transmission */ -#define USART_CTL2_RTSEN BIT(8) /*!< RTS enable */ -#define USART_CTL2_CTSEN BIT(9) /*!< CTS enable */ -#define USART_CTL2_CTSIE BIT(10) /*!< CTS interrupt enable */ +#define USART_CTL2_ERRIE BIT(0) /*!< enable error interrupt */ +#define USART_CTL2_IREN BIT(1) /*!< enable IrDA mode */ +#define USART_CTL2_IRLP BIT(2) /*!< IrDA low-power */ +#define USART_CTL2_HDEN BIT(3) /*!< enable half-duplex */ +#define USART_CTL2_NKEN BIT(4) /*!< mode NACK enable in smartcard */ +#define USART_CTL2_SCEN BIT(5) /*!< senable martcard mode */ +#define USART_CTL2_DENR BIT(6) /*!< enable DMA request for reception */ +#define USART_CTL2_DENT BIT(7) /*!< enable DMA request for transmission */ +#define USART_CTL2_RTSEN BIT(8) /*!< enable RTS */ +#define USART_CTL2_CTSEN BIT(9) /*!< enable CTS */ +#define USART_CTL2_CTSIE BIT(10) /*!< enable CTS interrupt */ /* USARTx_GP */ -#define USART_GP_PSC BITS(0,7) /*!< prescaler value for dividing the system clock */ -#define USART_GP_GUAT BITS(8,15) /*!< guard time value in smartcard mode */ +#define USART_GP_PSC BITS(0,7) /*!< prescaler value for dividing the system clock */ +#define USART_GP_GUAT BITS(8,15) /*!< guard time value in smartcard mode */ /* USARTx_CTL3 */ -#define USART_CTL3_RTEN BIT(0) /*!< receiver timeout enable */ -#define USART_CTL3_SCRTNUM BITS(1,3) /*!< smartcard auto-retry number */ -#define USART_CTL3_RTIE BIT(4) /*!< interrupt enable bit of receive timeout event */ -#define USART_CTL3_EBIE BIT(5) /*!< interrupt enable bit of end of block event */ -#define USART_CTL3_RINV BIT(8) /*!< RX pin level inversion */ -#define USART_CTL3_TINV BIT(9) /*!< TX pin level inversion */ -#define USART_CTL3_DINV BIT(10) /*!< data bit level inversion */ -#define USART_CTL3_MSBF BIT(11) /*!< most significant bit first */ +#define USART_CTL3_RTEN BIT(0) /*!< enable receiver timeout */ +#define USART_CTL3_SCRTNUM BITS(1,3) /*!< smartcard auto-retry number */ +#define USART_CTL3_RTIE BIT(4) /*!< interrupt enable bit of receive timeout event */ +#define USART_CTL3_EBIE BIT(5) /*!< interrupt enable bit of end of block event */ +#define USART_CTL3_RINV BIT(8) /*!< RX pin level inversion */ +#define USART_CTL3_TINV BIT(9) /*!< TX pin level inversion */ +#define USART_CTL3_DINV BIT(10) /*!< data bit level inversion */ +#define USART_CTL3_MSBF BIT(11) /*!< most significant bit first */ /* USARTx_RT */ -#define USART_RT_RT BITS(0,23) /*!< receiver timeout threshold */ -#define USART_RT_BL BITS(24,31) /*!< block length */ +#define USART_RT_RT BITS(0,23) /*!< receiver timeout threshold */ +#define USART_RT_BL BITS(24,31) /*!< block length */ /* USARTx_STAT1 */ -#define USART_STAT1_RTF BIT(11) /*!< receiver timeout flag */ -#define USART_STAT1_EBF BIT(12) /*!< end of block flag */ -#define USART_STAT1_BSY BIT(16) /*!< busy flag */ +#define USART_STAT1_RTF BIT(11) /*!< receiver timeout flag */ +#define USART_STAT1_EBF BIT(12) /*!< end of block flag */ +#define USART_STAT1_BSY BIT(16) /*!< busy flag */ /* constants definitions */ /* define the USART bit position and its register index offset */ @@ -153,31 +153,31 @@ OF SUCH DAMAGE. #define USART_BIT_POS2(val) (((uint32_t)(val) & 0x1F0000U) >> 16) /* register offset */ -#define USART_STAT0_REG_OFFSET 0x00U /*!< STAT0 register offset */ -#define USART_STAT1_REG_OFFSET 0x88U /*!< STAT1 register offset */ -#define USART_CTL0_REG_OFFSET 0x0CU /*!< CTL0 register offset */ -#define USART_CTL1_REG_OFFSET 0x10U /*!< CTL1 register offset */ -#define USART_CTL2_REG_OFFSET 0x14U /*!< CTL2 register offset */ -#define USART_CTL3_REG_OFFSET 0x80U /*!< CTL3 register offset */ +#define USART_STAT0_REG_OFFSET ((uint32_t)0x00000000U) /*!< STAT0 register offset */ +#define USART_STAT1_REG_OFFSET ((uint32_t)0x00000088U) /*!< STAT1 register offset */ +#define USART_CTL0_REG_OFFSET ((uint32_t)0x0000000CU) /*!< CTL0 register offset */ +#define USART_CTL1_REG_OFFSET ((uint32_t)0x00000010U) /*!< CTL1 register offset */ +#define USART_CTL2_REG_OFFSET ((uint32_t)0x00000014U) /*!< CTL2 register offset */ +#define USART_CTL3_REG_OFFSET ((uint32_t)0x00000080U) /*!< CTL3 register offset */ /* USART flags */ typedef enum { /* flags in STAT0 register */ - USART_FLAG_CTS = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 9U), /*!< CTS change flag */ - USART_FLAG_LBD = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 8U), /*!< LIN break detected flag */ - USART_FLAG_TBE = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 7U), /*!< transmit data buffer empty */ - USART_FLAG_TC = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 6U), /*!< transmission complete */ - USART_FLAG_RBNE = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 5U), /*!< read data buffer not empty */ - USART_FLAG_IDLE = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 4U), /*!< IDLE frame detected flag */ - USART_FLAG_ORERR = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 3U), /*!< overrun error */ - USART_FLAG_NERR = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 2U), /*!< noise error flag */ - USART_FLAG_FERR = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 1U), /*!< frame error flag */ - USART_FLAG_PERR = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 0U), /*!< parity error flag */ + USART_FLAG_CTS = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 9U), /*!< CTS change flag */ + USART_FLAG_LBD = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 8U), /*!< LIN break detected flag */ + USART_FLAG_TBE = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 7U), /*!< transmit data buffer empty */ + USART_FLAG_TC = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 6U), /*!< transmission complete */ + USART_FLAG_RBNE = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 5U), /*!< read data buffer not empty */ + USART_FLAG_IDLE = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 4U), /*!< IDLE frame detected flag */ + USART_FLAG_ORERR = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 3U), /*!< overrun error */ + USART_FLAG_NERR = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 2U), /*!< noise error flag */ + USART_FLAG_FERR = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 1U), /*!< frame error flag */ + USART_FLAG_PERR = USART_REGIDX_BIT(USART_STAT0_REG_OFFSET, 0U), /*!< parity error flag */ /* flags in STAT1 register */ - USART_FLAG_BSY = USART_REGIDX_BIT(USART_STAT1_REG_OFFSET, 16U), /*!< busy flag */ - USART_FLAG_EB = USART_REGIDX_BIT(USART_STAT1_REG_OFFSET, 12U), /*!< end of block flag */ - USART_FLAG_RT = USART_REGIDX_BIT(USART_STAT1_REG_OFFSET, 11U), /*!< receiver timeout flag */ + USART_FLAG_BSY = USART_REGIDX_BIT(USART_STAT1_REG_OFFSET, 16U), /*!< busy flag */ + USART_FLAG_EB = USART_REGIDX_BIT(USART_STAT1_REG_OFFSET, 12U), /*!< end of block flag */ + USART_FLAG_RT = USART_REGIDX_BIT(USART_STAT1_REG_OFFSET, 11U) /*!< receiver timeout flag */ }usart_flag_enum; /* USART interrupt flags */ @@ -199,124 +199,124 @@ typedef enum USART_INT_FLAG_ERR_FERR = USART_REGIDX_BIT2(USART_CTL2_REG_OFFSET, 0U, USART_STAT0_REG_OFFSET, 1U), /*!< error interrupt and frame error flag */ /* interrupt flags in CTL3 register */ USART_INT_FLAG_EB = USART_REGIDX_BIT2(USART_CTL3_REG_OFFSET, 5U, USART_STAT1_REG_OFFSET, 12U), /*!< interrupt enable bit of end of block event and flag */ - USART_INT_FLAG_RT = USART_REGIDX_BIT2(USART_CTL3_REG_OFFSET, 4U, USART_STAT1_REG_OFFSET, 11U), /*!< interrupt enable bit of receive timeout event and flag */ + USART_INT_FLAG_RT = USART_REGIDX_BIT2(USART_CTL3_REG_OFFSET, 4U, USART_STAT1_REG_OFFSET, 11U) /*!< interrupt enable bit of receive timeout event and flag */ }usart_interrupt_flag_enum; /* USART interrupt enable or disable */ typedef enum { /* interrupt in CTL0 register */ - USART_INT_PERR = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 8U), /*!< parity error interrupt */ - USART_INT_TBE = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 7U), /*!< transmitter buffer empty interrupt */ - USART_INT_TC = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 6U), /*!< transmission complete interrupt */ - USART_INT_RBNE = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 5U), /*!< read data buffer not empty interrupt and overrun error interrupt */ - USART_INT_IDLE = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 4U), /*!< IDLE line detected interrupt */ + USART_INT_PERR = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 8U), /*!< parity error interrupt */ + USART_INT_TBE = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 7U), /*!< transmitter buffer empty interrupt */ + USART_INT_TC = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 6U), /*!< transmission complete interrupt */ + USART_INT_RBNE = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 5U), /*!< read data buffer not empty interrupt and overrun error interrupt */ + USART_INT_IDLE = USART_REGIDX_BIT(USART_CTL0_REG_OFFSET, 4U), /*!< IDLE line detected interrupt */ /* interrupt in CTL1 register */ - USART_INT_LBD = USART_REGIDX_BIT(USART_CTL1_REG_OFFSET, 6U), /*!< LIN break detected interrupt */ + USART_INT_LBD = USART_REGIDX_BIT(USART_CTL1_REG_OFFSET, 6U), /*!< LIN break detected interrupt */ /* interrupt in CTL2 register */ - USART_INT_CTS = USART_REGIDX_BIT(USART_CTL2_REG_OFFSET, 10U), /*!< CTS interrupt */ - USART_INT_ERR = USART_REGIDX_BIT(USART_CTL2_REG_OFFSET, 0U), /*!< error interrupt */ + USART_INT_CTS = USART_REGIDX_BIT(USART_CTL2_REG_OFFSET, 10U), /*!< CTS interrupt */ + USART_INT_ERR = USART_REGIDX_BIT(USART_CTL2_REG_OFFSET, 0U), /*!< error interrupt */ /* interrupt in CTL3 register */ - USART_INT_EB = USART_REGIDX_BIT(USART_CTL3_REG_OFFSET, 5U), /*!< end of block interrupt */ - USART_INT_RT = USART_REGIDX_BIT(USART_CTL3_REG_OFFSET, 4U), /*!< receive timeout interrupt */ + USART_INT_EB = USART_REGIDX_BIT(USART_CTL3_REG_OFFSET, 5U), /*!< end of block interrupt */ + USART_INT_RT = USART_REGIDX_BIT(USART_CTL3_REG_OFFSET, 4U) /*!< receive timeout interrupt */ }usart_interrupt_enum; -/* USART invert configure */ +/* configure USART invert */ typedef enum { /* data bit level inversion */ - USART_DINV_ENABLE, /*!< data bit level inversion */ - USART_DINV_DISABLE, /*!< data bit level not inversion */ + USART_DINV_ENABLE, /*!< data bit level inversion */ + USART_DINV_DISABLE, /*!< data bit level not inversion */ /* TX pin level inversion */ - USART_TXPIN_ENABLE, /*!< TX pin level inversion */ - USART_TXPIN_DISABLE, /*!< TX pin level not inversion */ + USART_TXPIN_ENABLE, /*!< TX pin level inversion */ + USART_TXPIN_DISABLE, /*!< TX pin level not inversion */ /* RX pin level inversion */ - USART_RXPIN_ENABLE, /*!< RX pin level inversion */ - USART_RXPIN_DISABLE, /*!< RX pin level not inversion */ + USART_RXPIN_ENABLE, /*!< RX pin level inversion */ + USART_RXPIN_DISABLE /*!< RX pin level not inversion */ }usart_invert_enum; -/* USART receiver configure */ +/* configure USART receiver */ #define CTL0_REN(regval) (BIT(2) & ((uint32_t)(regval) << 2)) -#define USART_RECEIVE_ENABLE CTL0_REN(1) /*!< enable receiver */ -#define USART_RECEIVE_DISABLE CTL0_REN(0) /*!< disable receiver */ +#define USART_RECEIVE_ENABLE CTL0_REN(1) /*!< enable receiver */ +#define USART_RECEIVE_DISABLE CTL0_REN(0) /*!< disable receiver */ -/* USART transmitter configure */ +/* configure USART transmitter */ #define CTL0_TEN(regval) (BIT(3) & ((uint32_t)(regval) << 3)) -#define USART_TRANSMIT_ENABLE CTL0_TEN(1) /*!< enable transmitter */ -#define USART_TRANSMIT_DISABLE CTL0_TEN(0) /*!< disable transmitter */ +#define USART_TRANSMIT_ENABLE CTL0_TEN(1) /*!< enable transmitter */ +#define USART_TRANSMIT_DISABLE CTL0_TEN(0) /*!< disable transmitter */ /* USART parity bits definitions */ #define CTL0_PM(regval) (BITS(9,10) & ((uint32_t)(regval) << 9)) -#define USART_PM_NONE CTL0_PM(0) /*!< no parity */ -#define USART_PM_EVEN CTL0_PM(2) /*!< even parity */ -#define USART_PM_ODD CTL0_PM(3) /*!< odd parity */ +#define USART_PM_NONE CTL0_PM(0) /*!< no parity */ +#define USART_PM_EVEN CTL0_PM(2) /*!< even parity */ +#define USART_PM_ODD CTL0_PM(3) /*!< odd parity */ /* USART wakeup method in mute mode */ #define CTL0_WM(regval) (BIT(11) & ((uint32_t)(regval) << 11)) -#define USART_WM_IDLE CTL0_WM(0) /*!< idle line */ -#define USART_WM_ADDR CTL0_WM(1) /*!< address match */ +#define USART_WM_IDLE CTL0_WM(0) /*!< idle line */ +#define USART_WM_ADDR CTL0_WM(1) /*!< address match */ /* USART word length definitions */ #define CTL0_WL(regval) (BIT(12) & ((uint32_t)(regval) << 12)) -#define USART_WL_8BIT CTL0_WL(0) /*!< 8 bits */ -#define USART_WL_9BIT CTL0_WL(1) /*!< 9 bits */ +#define USART_WL_8BIT CTL0_WL(0) /*!< 8 bits */ +#define USART_WL_9BIT CTL0_WL(1) /*!< 9 bits */ /* USART stop bits definitions */ #define CTL1_STB(regval) (BITS(12,13) & ((uint32_t)(regval) << 12)) -#define USART_STB_1BIT CTL1_STB(0) /*!< 1 bit */ -#define USART_STB_0_5BIT CTL1_STB(1) /*!< 0.5 bit */ -#define USART_STB_2BIT CTL1_STB(2) /*!< 2 bits */ -#define USART_STB_1_5BIT CTL1_STB(3) /*!< 1.5 bits */ +#define USART_STB_1BIT CTL1_STB(0) /*!< 1 bit */ +#define USART_STB_0_5BIT CTL1_STB(1) /*!< 0.5 bit */ +#define USART_STB_2BIT CTL1_STB(2) /*!< 2 bits */ +#define USART_STB_1_5BIT CTL1_STB(3) /*!< 1.5 bits */ /* USART LIN break frame length */ #define CTL1_LBLEN(regval) (BIT(5) & ((uint32_t)(regval) << 5)) -#define USART_LBLEN_10B CTL1_LBLEN(0) /*!< 10 bits */ -#define USART_LBLEN_11B CTL1_LBLEN(1) /*!< 11 bits */ +#define USART_LBLEN_10B CTL1_LBLEN(0) /*!< 10 bits */ +#define USART_LBLEN_11B CTL1_LBLEN(1) /*!< 11 bits */ /* USART CK length */ #define CTL1_CLEN(regval) (BIT(8) & ((uint32_t)(regval) << 8)) -#define USART_CLEN_NONE CTL1_CLEN(0) /*!< there are 7 CK pulses for an 8 bit frame and 8 CK pulses for a 9 bit frame */ -#define USART_CLEN_EN CTL1_CLEN(1) /*!< there are 8 CK pulses for an 8 bit frame and 9 CK pulses for a 9 bit frame */ +#define USART_CLEN_NONE CTL1_CLEN(0) /*!< there are 7 CK pulses for an 8 bit frame and 8 CK pulses for a 9 bit frame */ +#define USART_CLEN_EN CTL1_CLEN(1) /*!< there are 8 CK pulses for an 8 bit frame and 9 CK pulses for a 9 bit frame */ /* USART clock phase */ #define CTL1_CPH(regval) (BIT(9) & ((uint32_t)(regval) << 9)) -#define USART_CPH_1CK CTL1_CPH(0) /*!< first clock transition is the first data capture edge */ -#define USART_CPH_2CK CTL1_CPH(1) /*!< second clock transition is the first data capture edge */ +#define USART_CPH_1CK CTL1_CPH(0) /*!< first clock transition is the first data capture edge */ +#define USART_CPH_2CK CTL1_CPH(1) /*!< second clock transition is the first data capture edge */ /* USART clock polarity */ #define CTL1_CPL(regval) (BIT(10) & ((uint32_t)(regval) << 10)) -#define USART_CPL_LOW CTL1_CPL(0) /*!< steady low value on CK pin */ -#define USART_CPL_HIGH CTL1_CPL(1) /*!< steady high value on CK pin */ +#define USART_CPL_LOW CTL1_CPL(0) /*!< steady low value on CK pin */ +#define USART_CPL_HIGH CTL1_CPL(1) /*!< steady high value on CK pin */ -/* USART DMA request for receive configure */ -#define CLT2_DENR(regval) (BIT(6) & ((uint32_t)(regval) << 6)) -#define USART_DENR_ENABLE CLT2_DENR(1) /*!< DMA request enable for reception */ -#define USART_DENR_DISABLE CLT2_DENR(0) /*!< DMA request disable for reception */ +/* configure USART DMA request for reception */ +#define CTL2_DENR(regval) (BIT(6) & ((uint32_t)(regval) << 6)) +#define USART_RECEIVE_DMA_ENABLE CTL2_DENR(1) /*!< enable DAM request for reception */ +#define USART_RECEIVE_DMA_DISABLE CTL2_DENR(0) /*!< disable DAM request for reception */ -/* USART DMA request for transmission configure */ -#define CLT2_DENT(regval) (BIT(7) & ((uint32_t)(regval) << 7)) -#define USART_DENT_ENABLE CLT2_DENT(1) /*!< DMA request enable for transmission */ -#define USART_DENT_DISABLE CLT2_DENT(0) /*!< DMA request disable for transmission */ +/* configure USART DMA request for transmission */ +#define CTL2_DENT(regval) (BIT(7) & ((uint32_t)(regval) << 7)) +#define USART_TRANSMIT_DMA_ENABLE CTL2_DENT(1) /*!< enable DAM request for transmission */ +#define USART_TRANSMIT_DMA_DISABLE CTL2_DENT(0) /*!< disable DAM request for transmission */ -/* USART RTS configure */ +/* configure USART RTS */ #define CLT2_RTSEN(regval) (BIT(8) & ((uint32_t)(regval) << 8)) -#define USART_RTS_ENABLE CLT2_RTSEN(1) /*!< RTS enable */ -#define USART_RTS_DISABLE CLT2_RTSEN(0) /*!< RTS disable */ +#define USART_RTS_ENABLE CLT2_RTSEN(1) /*!< enable RTS */ +#define USART_RTS_DISABLE CLT2_RTSEN(0) /*!< disable RTS */ -/* USART CTS configure */ +/* configure USART CTS */ #define CLT2_CTSEN(regval) (BIT(9) & ((uint32_t)(regval) << 9)) -#define USART_CTS_ENABLE CLT2_CTSEN(1) /*!< CTS enable */ -#define USART_CTS_DISABLE CLT2_CTSEN(0) /*!< CTS disable */ +#define USART_CTS_ENABLE CLT2_CTSEN(1) /*!< enable CTS */ +#define USART_CTS_DISABLE CLT2_CTSEN(0) /*!< disable CTS */ -/* USART IrDA low-power enable */ +/* enable USART IrDA low-power */ #define CTL2_IRLP(regval) (BIT(2) & ((uint32_t)(regval) << 2)) -#define USART_IRLP_LOW CTL2_IRLP(1) /*!< low-power */ -#define USART_IRLP_NORMAL CTL2_IRLP(0) /*!< normal */ +#define USART_IRLP_LOW CTL2_IRLP(1) /*!< low-power */ +#define USART_IRLP_NORMAL CTL2_IRLP(0) /*!< normal */ /* USART data is transmitted/received with the LSB/MSB first */ #define CTL3_MSBF(regval) (BIT(11) & ((uint32_t)(regval) << 11)) -#define USART_MSBF_LSB CTL3_MSBF(0) /*!< LSB first */ -#define USART_MSBF_MSB CTL3_MSBF(1) /*!< MSB first */ +#define USART_MSBF_LSB CTL3_MSBF(0) /*!< LSB first */ +#define USART_MSBF_MSB CTL3_MSBF(1) /*!< MSB first */ /* function declarations */ /* initialization functions */ @@ -351,7 +351,7 @@ void usart_receiver_timeout_disable(uint32_t usart_periph); /* configure receiver timeout threshold */ void usart_receiver_timeout_threshold_config(uint32_t usart_periph, uint32_t rtimeout); /* USART transmit data function */ -void usart_data_transmit(uint32_t usart_periph, uint32_t data); +void usart_data_transmit(uint32_t usart_periph, uint16_t data); /* USART receive data function */ uint16_t usart_data_receive(uint32_t usart_periph); @@ -386,12 +386,12 @@ void usart_halfduplex_disable(uint32_t usart_periph); void usart_synchronous_clock_enable(uint32_t usart_periph); /* disable CK pin in synchronous mode */ void usart_synchronous_clock_disable(uint32_t usart_periph); -/* configure usart synchronous mode parameters */ +/* configure USART synchronous mode parameters */ void usart_synchronous_clock_config(uint32_t usart_periph, uint32_t clen, uint32_t cph, uint32_t cpl); /* smartcard communication */ /* configure guard time value in smartcard mode */ -void usart_guard_time_config(uint32_t usart_periph,uint32_t guat); +void usart_guard_time_config(uint32_t usart_periph,uint8_t guat); /* enable smartcard mode */ void usart_smartcard_mode_enable(uint32_t usart_periph); /* disable smartcard mode */ @@ -401,9 +401,9 @@ void usart_smartcard_mode_nack_enable(uint32_t usart_periph); /* disable NACK in smartcard mode */ void usart_smartcard_mode_nack_disable(uint32_t usart_periph); /* configure smartcard auto-retry number */ -void usart_smartcard_autoretry_config(uint32_t usart_periph, uint32_t scrtnum); +void usart_smartcard_autoretry_config(uint32_t usart_periph, uint8_t scrtnum); /* configure block length */ -void usart_block_length_config(uint32_t usart_periph, uint32_t bl); +void usart_block_length_config(uint32_t usart_periph, uint8_t bl); /* IrDA communication */ /* enable IrDA mode */ @@ -422,10 +422,10 @@ void usart_hardware_flow_rts_config(uint32_t usart_periph, uint32_t rtsconfig); void usart_hardware_flow_cts_config(uint32_t usart_periph, uint32_t ctsconfig); /* DMA communication */ -/* configure USART DMA for reception */ -void usart_dma_receive_config(uint32_t usart_periph, uint32_t dmacmd); -/* configure USART DMA for transmission */ -void usart_dma_transmit_config(uint32_t usart_periph, uint32_t dmacmd); +/* configure USART DMA reception */ +void usart_dma_receive_config(uint32_t usart_periph, uint8_t dmacmd); +/* configure USART DMA transmission */ +void usart_dma_transmit_config(uint32_t usart_periph, uint8_t dmacmd); /* flag & interrupt functions */ /* get flag in STAT0/STAT1 register */ diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_adc.c b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_adc.c index f3ac3e52..14247232 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_adc.c +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_adc.c @@ -680,7 +680,7 @@ FlagStatus adc_flag_get(uint32_t adc_periph , uint32_t adc_flag) */ void adc_flag_clear(uint32_t adc_periph , uint32_t adc_flag) { - ADC_STAT(adc_periph) &= ~((uint32_t)adc_flag); + ADC_STAT(adc_periph) = ~((uint32_t)adc_flag); } /*! @@ -739,7 +739,7 @@ FlagStatus adc_interrupt_flag_get(uint32_t adc_periph , uint32_t adc_interrupt) */ void adc_interrupt_flag_clear(uint32_t adc_periph , uint32_t adc_interrupt) { - ADC_STAT(adc_periph) &= ~((uint32_t)adc_interrupt); + ADC_STAT(adc_periph) = ~((uint32_t)adc_interrupt); } /*! diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_can.c b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_can.c index 4fec4914..1cb0504e 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_can.c +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_can.c @@ -14,27 +14,27 @@ /* Copyright (c) 2020, GigaDevice Semiconductor Inc. - Redistribution and use in source and binary forms, with or without modification, + Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright notice, this + 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without specific prior written permission. - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ @@ -44,24 +44,24 @@ OF SUCH DAMAGE. #define CAN_ERROR_HANDLE(s) do{}while(1) /*! - \brief deinitialize CAN + \brief deinitialize CAN \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval none */ void can_deinit(uint32_t can_periph) { #ifdef GD32F30X_CL - if(CAN0 == can_periph){ + if(CAN0 == can_periph) { rcu_periph_reset_enable(RCU_CAN0RST); rcu_periph_reset_disable(RCU_CAN0RST); - }else{ + } else { rcu_periph_reset_enable(RCU_CAN1RST); rcu_periph_reset_disable(RCU_CAN1RST); } #else - if(CAN0 == can_periph){ + if(CAN0 == can_periph) { rcu_periph_reset_enable(RCU_CAN0RST); rcu_periph_reset_disable(RCU_CAN0RST); } @@ -70,91 +70,90 @@ void can_deinit(uint32_t can_periph) /*! \brief initialize CAN parameter struct with a default value - \param[in] type: the type of CAN parameter struct + \param[in] type: the type of CAN parameter struct only one parameter can be selected which is shown as below: \arg CAN_INIT_STRUCT: the CAN initial struct \arg CAN_FILTER_STRUCT: the CAN filter struct \arg CAN_TX_MESSAGE_STRUCT: the CAN TX message struct \arg CAN_RX_MESSAGE_STRUCT: the CAN RX message struct - \param[in] p_struct: the pointer of the specific struct - \param[out] none + \param[out] p_struct: the pointer of the specific struct \retval none */ -void can_struct_para_init(can_struct_type_enum type, void* p_struct) +void can_struct_para_init(can_struct_type_enum type, void *p_struct) { uint8_t i; - - if(NULL == p_struct){ + + if(NULL == p_struct) { CAN_ERROR_HANDLE("struct parameter can not be NULL \r\n"); } - + /* get type of the struct */ - switch(type){ - /* used for can_init() */ - case CAN_INIT_STRUCT: - ((can_parameter_struct*)p_struct)->auto_bus_off_recovery = DISABLE; - ((can_parameter_struct*)p_struct)->auto_retrans = DISABLE; - ((can_parameter_struct*)p_struct)->auto_wake_up = DISABLE; - ((can_parameter_struct*)p_struct)->prescaler = 0x03FFU; - ((can_parameter_struct*)p_struct)->rec_fifo_overwrite = DISABLE; - ((can_parameter_struct*)p_struct)->resync_jump_width = CAN_BT_SJW_1TQ; - ((can_parameter_struct*)p_struct)->time_segment_1 = CAN_BT_BS1_3TQ; - ((can_parameter_struct*)p_struct)->time_segment_2 = CAN_BT_BS2_1TQ; - ((can_parameter_struct*)p_struct)->time_triggered = DISABLE; - ((can_parameter_struct*)p_struct)->trans_fifo_order = DISABLE; - ((can_parameter_struct*)p_struct)->working_mode = CAN_NORMAL_MODE; - - break; - /* used for can_filter_init() */ - case CAN_FILTER_STRUCT: - ((can_filter_parameter_struct*)p_struct)->filter_bits = CAN_FILTERBITS_32BIT; - ((can_filter_parameter_struct*)p_struct)->filter_enable = DISABLE; - ((can_filter_parameter_struct*)p_struct)->filter_fifo_number = CAN_FIFO0; - ((can_filter_parameter_struct*)p_struct)->filter_list_high = 0x0000U; - ((can_filter_parameter_struct*)p_struct)->filter_list_low = 0x0000U; - ((can_filter_parameter_struct*)p_struct)->filter_mask_high = 0x0000U; - ((can_filter_parameter_struct*)p_struct)->filter_mask_low = 0x0000U; - ((can_filter_parameter_struct*)p_struct)->filter_mode = CAN_FILTERMODE_MASK; - ((can_filter_parameter_struct*)p_struct)->filter_number = 0U; - - break; - /* used for can_message_transmit() */ - case CAN_TX_MESSAGE_STRUCT: - for(i = 0U; i < 8U; i++){ - ((can_trasnmit_message_struct*)p_struct)->tx_data[i] = 0U; - } - - ((can_trasnmit_message_struct*)p_struct)->tx_dlen = 0u; - ((can_trasnmit_message_struct*)p_struct)->tx_efid = 0U; - ((can_trasnmit_message_struct*)p_struct)->tx_ff = (uint8_t)CAN_FF_STANDARD; - ((can_trasnmit_message_struct*)p_struct)->tx_ft = (uint8_t)CAN_FT_DATA; - ((can_trasnmit_message_struct*)p_struct)->tx_sfid = 0U; - - break; - /* used for can_message_receive() */ - case CAN_RX_MESSAGE_STRUCT: - for(i = 0U; i < 8U; i++){ - ((can_receive_message_struct*)p_struct)->rx_data[i] = 0U; - } - - ((can_receive_message_struct*)p_struct)->rx_dlen = 0U; - ((can_receive_message_struct*)p_struct)->rx_efid = 0U; - ((can_receive_message_struct*)p_struct)->rx_ff = (uint8_t)CAN_FF_STANDARD; - ((can_receive_message_struct*)p_struct)->rx_fi = 0U; - ((can_receive_message_struct*)p_struct)->rx_ft = (uint8_t)CAN_FT_DATA; - ((can_receive_message_struct*)p_struct)->rx_sfid = 0U; - - break; - - default: - CAN_ERROR_HANDLE("parameter is invalid \r\n"); + switch(type) { + /* used for can_init() */ + case CAN_INIT_STRUCT: + ((can_parameter_struct *)p_struct)->auto_bus_off_recovery = DISABLE; + ((can_parameter_struct *)p_struct)->auto_retrans = DISABLE; + ((can_parameter_struct *)p_struct)->auto_wake_up = DISABLE; + ((can_parameter_struct *)p_struct)->prescaler = 0x03FFU; + ((can_parameter_struct *)p_struct)->rec_fifo_overwrite = DISABLE; + ((can_parameter_struct *)p_struct)->resync_jump_width = CAN_BT_SJW_1TQ; + ((can_parameter_struct *)p_struct)->time_segment_1 = CAN_BT_BS1_3TQ; + ((can_parameter_struct *)p_struct)->time_segment_2 = CAN_BT_BS2_1TQ; + ((can_parameter_struct *)p_struct)->time_triggered = DISABLE; + ((can_parameter_struct *)p_struct)->trans_fifo_order = DISABLE; + ((can_parameter_struct *)p_struct)->working_mode = CAN_NORMAL_MODE; + + break; + /* used for can_filter_init() */ + case CAN_FILTER_STRUCT: + ((can_filter_parameter_struct *)p_struct)->filter_bits = CAN_FILTERBITS_32BIT; + ((can_filter_parameter_struct *)p_struct)->filter_enable = DISABLE; + ((can_filter_parameter_struct *)p_struct)->filter_fifo_number = CAN_FIFO0; + ((can_filter_parameter_struct *)p_struct)->filter_list_high = 0x0000U; + ((can_filter_parameter_struct *)p_struct)->filter_list_low = 0x0000U; + ((can_filter_parameter_struct *)p_struct)->filter_mask_high = 0x0000U; + ((can_filter_parameter_struct *)p_struct)->filter_mask_low = 0x0000U; + ((can_filter_parameter_struct *)p_struct)->filter_mode = CAN_FILTERMODE_MASK; + ((can_filter_parameter_struct *)p_struct)->filter_number = 0U; + + break; + /* used for can_message_transmit() */ + case CAN_TX_MESSAGE_STRUCT: + for(i = 0U; i < 8U; i++) { + ((can_trasnmit_message_struct *)p_struct)->tx_data[i] = 0U; + } + + ((can_trasnmit_message_struct *)p_struct)->tx_dlen = 0u; + ((can_trasnmit_message_struct *)p_struct)->tx_efid = 0U; + ((can_trasnmit_message_struct *)p_struct)->tx_ff = (uint8_t)CAN_FF_STANDARD; + ((can_trasnmit_message_struct *)p_struct)->tx_ft = (uint8_t)CAN_FT_DATA; + ((can_trasnmit_message_struct *)p_struct)->tx_sfid = 0U; + + break; + /* used for can_message_receive() */ + case CAN_RX_MESSAGE_STRUCT: + for(i = 0U; i < 8U; i++) { + ((can_receive_message_struct *)p_struct)->rx_data[i] = 0U; + } + + ((can_receive_message_struct *)p_struct)->rx_dlen = 0U; + ((can_receive_message_struct *)p_struct)->rx_efid = 0U; + ((can_receive_message_struct *)p_struct)->rx_ff = (uint8_t)CAN_FF_STANDARD; + ((can_receive_message_struct *)p_struct)->rx_fi = 0U; + ((can_receive_message_struct *)p_struct)->rx_ft = (uint8_t)CAN_FT_DATA; + ((can_receive_message_struct *)p_struct)->rx_sfid = 0U; + + break; + + default: + CAN_ERROR_HANDLE("parameter is invalid \r\n"); } } /*! \brief initialize CAN \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] can_parameter_init: parameters for CAN initializtion \arg working_mode: CAN_NORMAL_MODE, CAN_LOOPBACK_MODE, CAN_SILENT_MODE, CAN_SILENT_LOOPBACK_MODE \arg resync_jump_width: CAN_BT_SJW_xTQ(x=1, 2, 3, 4) @@ -170,23 +169,23 @@ void can_struct_para_init(can_struct_type_enum type, void* p_struct) \param[out] none \retval ErrStatus: SUCCESS or ERROR */ -ErrStatus can_init(uint32_t can_periph, can_parameter_struct* can_parameter_init) +ErrStatus can_init(uint32_t can_periph, can_parameter_struct *can_parameter_init) { uint32_t timeout = CAN_TIMEOUT; ErrStatus flag = ERROR; - + /* disable sleep mode */ CAN_CTL(can_periph) &= ~CAN_CTL_SLPWMOD; /* enable initialize mode */ CAN_CTL(can_periph) |= CAN_CTL_IWMOD; /* wait ACK */ - while((CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)) && (0U != timeout)){ + while((CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)) && (0U != timeout)) { timeout--; } /* check initialize working success */ - if(CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)){ + if(CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)) { flag = ERROR; - }else{ + } else { /* set the bit timing register */ CAN_BT(can_periph) = (BT_MODE((uint32_t)can_parameter_init->working_mode) | \ BT_SJW((uint32_t)can_parameter_init->resync_jump_width) | \ @@ -195,138 +194,138 @@ ErrStatus can_init(uint32_t can_periph, can_parameter_struct* can_parameter_init BT_BAUDPSC(((uint32_t)(can_parameter_init->prescaler) - 1U))); /* time trigger communication mode */ - if(ENABLE == can_parameter_init->time_triggered){ + if(ENABLE == can_parameter_init->time_triggered) { CAN_CTL(can_periph) |= CAN_CTL_TTC; - }else{ + } else { CAN_CTL(can_periph) &= ~CAN_CTL_TTC; } - /* automatic bus-off managment */ - if(ENABLE == can_parameter_init->auto_bus_off_recovery){ + /* automatic bus-off management */ + if(ENABLE == can_parameter_init->auto_bus_off_recovery) { CAN_CTL(can_periph) |= CAN_CTL_ABOR; - }else{ + } else { CAN_CTL(can_periph) &= ~CAN_CTL_ABOR; } /* automatic wakeup mode */ - if(ENABLE == can_parameter_init->auto_wake_up){ + if(ENABLE == can_parameter_init->auto_wake_up) { CAN_CTL(can_periph) |= CAN_CTL_AWU; - }else{ + } else { CAN_CTL(can_periph) &= ~CAN_CTL_AWU; } - /* automatic retransmission mode disable */ - if(ENABLE == can_parameter_init->auto_retrans){ + /* automatic retransmission mode */ + if(ENABLE == can_parameter_init->auto_retrans) { CAN_CTL(can_periph) &= ~CAN_CTL_ARD; - }else{ + } else { CAN_CTL(can_periph) |= CAN_CTL_ARD; } - /* receive fifo overwrite mode */ - if(ENABLE == can_parameter_init->rec_fifo_overwrite){ + /* receive FIFO overwrite mode */ + if(ENABLE == can_parameter_init->rec_fifo_overwrite) { CAN_CTL(can_periph) &= ~CAN_CTL_RFOD; - }else{ + } else { CAN_CTL(can_periph) |= CAN_CTL_RFOD; - } - /* transmit fifo order */ - if(ENABLE == can_parameter_init->trans_fifo_order){ + } + /* transmit FIFO order */ + if(ENABLE == can_parameter_init->trans_fifo_order) { CAN_CTL(can_periph) |= CAN_CTL_TFO; - }else{ + } else { CAN_CTL(can_periph) &= ~CAN_CTL_TFO; - } + } /* disable initialize mode */ CAN_CTL(can_periph) &= ~CAN_CTL_IWMOD; timeout = CAN_TIMEOUT; /* wait the ACK */ - while((CAN_STAT_IWS == (CAN_STAT(can_periph) & CAN_STAT_IWS)) && (0U != timeout)){ + while((CAN_STAT_IWS == (CAN_STAT(can_periph) & CAN_STAT_IWS)) && (0U != timeout)) { timeout--; } /* check exit initialize mode */ - if(0U != timeout){ + if(0U != timeout) { flag = SUCCESS; } - } + } return flag; } /*! - \brief initialize CAN filter + \brief initialize CAN filter \param[in] can_filter_parameter_init: struct for CAN filter initialization \arg filter_list_high: 0x0000 - 0xFFFF \arg filter_list_low: 0x0000 - 0xFFFF \arg filter_mask_high: 0x0000 - 0xFFFF \arg filter_mask_low: 0x0000 - 0xFFFF - \arg filter_fifo_number: CAN_FIFO0, CAN_FIFO1 + \arg filter_fifo_number: CAN_FIFO0, CAN_FIFO1 \arg filter_number: 0 - 27 \arg filter_mode: CAN_FILTERMODE_MASK, CAN_FILTERMODE_LIST - \arg filter_bits: CAN_FILTERBITS_32BIT, CAN_FILTERBITS_16BIT + \arg filter_bits: CAN_FILTERBITS_32BIT, CAN_FILTERBITS_16BIT \arg filter_enable: ENABLE or DISABLE \param[out] none \retval none */ -void can_filter_init(can_filter_parameter_struct* can_filter_parameter_init) +void can_filter_init(can_filter_parameter_struct *can_filter_parameter_init) { uint32_t val = 0U; - + val = ((uint32_t)1) << (can_filter_parameter_init->filter_number); /* filter lock disable */ CAN_FCTL(CAN0) |= CAN_FCTL_FLD; /* disable filter */ CAN_FW(CAN0) &= ~(uint32_t)val; - + /* filter 16 bits */ - if(CAN_FILTERBITS_16BIT == can_filter_parameter_init->filter_bits){ + if(CAN_FILTERBITS_16BIT == can_filter_parameter_init->filter_bits) { /* set filter 16 bits */ CAN_FSCFG(CAN0) &= ~(uint32_t)val; /* first 16 bits list and first 16 bits mask or first 16 bits list and second 16 bits list */ CAN_FDATA0(CAN0, can_filter_parameter_init->filter_number) = \ - FDATA_MASK_HIGH((can_filter_parameter_init->filter_mask_low) & CAN_FILTER_MASK_16BITS) | \ - FDATA_MASK_LOW((can_filter_parameter_init->filter_list_low) & CAN_FILTER_MASK_16BITS); + FDATA_MASK_HIGH((can_filter_parameter_init->filter_mask_low) & CAN_FILTER_MASK_16BITS) | \ + FDATA_MASK_LOW((can_filter_parameter_init->filter_list_low) & CAN_FILTER_MASK_16BITS); /* second 16 bits list and second 16 bits mask or third 16 bits list and fourth 16 bits list */ CAN_FDATA1(CAN0, can_filter_parameter_init->filter_number) = \ - FDATA_MASK_HIGH((can_filter_parameter_init->filter_mask_high) & CAN_FILTER_MASK_16BITS) | \ - FDATA_MASK_LOW((can_filter_parameter_init->filter_list_high) & CAN_FILTER_MASK_16BITS); + FDATA_MASK_HIGH((can_filter_parameter_init->filter_mask_high) & CAN_FILTER_MASK_16BITS) | \ + FDATA_MASK_LOW((can_filter_parameter_init->filter_list_high) & CAN_FILTER_MASK_16BITS); } /* filter 32 bits */ - if(CAN_FILTERBITS_32BIT == can_filter_parameter_init->filter_bits){ + if(CAN_FILTERBITS_32BIT == can_filter_parameter_init->filter_bits) { /* set filter 32 bits */ CAN_FSCFG(CAN0) |= (uint32_t)val; /* 32 bits list or first 32 bits list */ CAN_FDATA0(CAN0, can_filter_parameter_init->filter_number) = \ - FDATA_MASK_HIGH((can_filter_parameter_init->filter_list_high) & CAN_FILTER_MASK_16BITS) | - FDATA_MASK_LOW((can_filter_parameter_init->filter_list_low) & CAN_FILTER_MASK_16BITS); + FDATA_MASK_HIGH((can_filter_parameter_init->filter_list_high) & CAN_FILTER_MASK_16BITS) | + FDATA_MASK_LOW((can_filter_parameter_init->filter_list_low) & CAN_FILTER_MASK_16BITS); /* 32 bits mask or second 32 bits list */ CAN_FDATA1(CAN0, can_filter_parameter_init->filter_number) = \ - FDATA_MASK_HIGH((can_filter_parameter_init->filter_mask_high) & CAN_FILTER_MASK_16BITS) | - FDATA_MASK_LOW((can_filter_parameter_init->filter_mask_low) & CAN_FILTER_MASK_16BITS); + FDATA_MASK_HIGH((can_filter_parameter_init->filter_mask_high) & CAN_FILTER_MASK_16BITS) | + FDATA_MASK_LOW((can_filter_parameter_init->filter_mask_low) & CAN_FILTER_MASK_16BITS); } - + /* filter mode */ - if(CAN_FILTERMODE_MASK == can_filter_parameter_init->filter_mode){ + if(CAN_FILTERMODE_MASK == can_filter_parameter_init->filter_mode) { /* mask mode */ CAN_FMCFG(CAN0) &= ~(uint32_t)val; - }else{ + } else { /* list mode */ CAN_FMCFG(CAN0) |= (uint32_t)val; } - + /* filter FIFO */ - if(CAN_FIFO0 == (can_filter_parameter_init->filter_fifo_number)){ + if(CAN_FIFO0 == (can_filter_parameter_init->filter_fifo_number)) { /* FIFO0 */ CAN_FAFIFO(CAN0) &= ~(uint32_t)val; - }else{ + } else { /* FIFO1 */ CAN_FAFIFO(CAN0) |= (uint32_t)val; } - + /* filter working */ - if(ENABLE == can_filter_parameter_init->filter_enable){ - + if(ENABLE == can_filter_parameter_init->filter_enable) { + CAN_FW(CAN0) |= (uint32_t)val; } - + /* filter lock enable */ CAN_FCTL(CAN0) &= ~CAN_FCTL_FLD; } /*! - \brief set CAN1 fliter start bank number + \brief set CAN1 filter start bank number \param[in] start_bank: CAN1 start bank number only one parameter can be selected which is shown as below: \arg (1..27) @@ -340,28 +339,29 @@ void can1_filter_start_bank(uint8_t start_bank) /* set CAN1 filter start number */ CAN_FCTL(CAN0) &= ~(uint32_t)CAN_FCTL_HBC1F; CAN_FCTL(CAN0) |= FCTL_HBC1F(start_bank); - /* filter lock enaable */ + /* filter lock enable */ CAN_FCTL(CAN0) &= ~CAN_FCTL_FLD; } /*! \brief enable CAN debug freeze \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval none */ void can_debug_freeze_enable(uint32_t can_periph) { + /* set DFZ bit */ CAN_CTL(can_periph) |= CAN_CTL_DFZ; #ifdef GD32F30X_CL - if(CAN0 == can_periph){ + if(CAN0 == can_periph) { dbg_periph_enable(DBG_CAN0_HOLD); - }else{ + } else { dbg_periph_enable(DBG_CAN1_HOLD); } #else - if(CAN0 == can_periph){ + if(CAN0 == can_periph) { dbg_periph_enable(DBG_CAN0_HOLD); } #endif @@ -370,22 +370,23 @@ void can_debug_freeze_enable(uint32_t can_periph) /*! \brief disable CAN debug freeze \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval none */ void can_debug_freeze_disable(uint32_t can_periph) { + /* set DFZ bit */ CAN_CTL(can_periph) &= ~CAN_CTL_DFZ; #ifdef GD32F30X_CL - if(CAN0 == can_periph){ + if(CAN0 == can_periph) { dbg_periph_disable(DBG_CAN0_HOLD); - }else{ + } else { dbg_periph_disable(DBG_CAN1_HOLD); } #else - if(CAN0 == can_periph){ - dbg_periph_enable(DBG_CAN0_HOLD); + if(CAN0 == can_periph) { + dbg_periph_disable(DBG_CAN0_HOLD); } #endif } @@ -393,18 +394,18 @@ void can_debug_freeze_disable(uint32_t can_periph) /*! \brief enable CAN time trigger mode \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval none */ void can_time_trigger_mode_enable(uint32_t can_periph) { uint8_t mailbox_number; - - /* enable the tcc mode */ + + /* enable the TTC mode */ CAN_CTL(can_periph) |= CAN_CTL_TTC; /* enable time stamp */ - for(mailbox_number = 0U; mailbox_number < 3U; mailbox_number++){ + for(mailbox_number = 0U; mailbox_number < 3U; mailbox_number++) { CAN_TMP(can_periph, mailbox_number) |= CAN_TMP_TSEN; } } @@ -412,18 +413,18 @@ void can_time_trigger_mode_enable(uint32_t can_periph) /*! \brief disable CAN time trigger mode \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval none */ void can_time_trigger_mode_disable(uint32_t can_periph) { - uint8_t mailbox_number; - - /* disable the TCC mode */ + uint8_t mailbox_number; + + /* disable the TTC mode */ CAN_CTL(can_periph) &= ~CAN_CTL_TTC; /* reset TSEN bits */ - for(mailbox_number = 0U; mailbox_number < 3U; mailbox_number++){ + for(mailbox_number = 0U; mailbox_number < 3U; mailbox_number++) { CAN_TMP(can_periph, mailbox_number) &= ~CAN_TMP_TSEN; } } @@ -431,7 +432,7 @@ void can_time_trigger_mode_disable(uint32_t can_periph) /*! \brief transmit CAN message \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] transmit_message: struct for CAN transmit message \arg tx_sfid: 0x00000000 - 0x000007FF \arg tx_efid: 0x00000000 - 0x1FFFFFFF @@ -442,48 +443,48 @@ void can_time_trigger_mode_disable(uint32_t can_periph) \param[out] none \retval mailbox_number */ -uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct* transmit_message) +uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct *transmit_message) { uint8_t mailbox_number = CAN_MAILBOX0; /* select one empty mailbox */ - if(CAN_TSTAT_TME0 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME0)){ + if(CAN_TSTAT_TME0 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME0)) { mailbox_number = CAN_MAILBOX0; - }else if(CAN_TSTAT_TME1 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME1)){ + } else if(CAN_TSTAT_TME1 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME1)) { mailbox_number = CAN_MAILBOX1; - }else if(CAN_TSTAT_TME2 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME2)){ + } else if(CAN_TSTAT_TME2 == (CAN_TSTAT(can_periph)&CAN_TSTAT_TME2)) { mailbox_number = CAN_MAILBOX2; - }else{ + } else { mailbox_number = CAN_NOMAILBOX; } /* return no mailbox empty */ - if(CAN_NOMAILBOX == mailbox_number){ + if(CAN_NOMAILBOX == mailbox_number) { return CAN_NOMAILBOX; } - + CAN_TMI(can_periph, mailbox_number) &= CAN_TMI_TEN; - if(CAN_FF_STANDARD == transmit_message->tx_ff){ + if(CAN_FF_STANDARD == transmit_message->tx_ff) { /* set transmit mailbox standard identifier */ CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_SFID(transmit_message->tx_sfid) | \ - transmit_message->tx_ft); - }else{ + transmit_message->tx_ft); + } else { /* set transmit mailbox extended identifier */ CAN_TMI(can_periph, mailbox_number) |= (uint32_t)(TMI_EFID(transmit_message->tx_efid) | \ - transmit_message->tx_ff | \ - transmit_message->tx_ft); + transmit_message->tx_ff | \ + transmit_message->tx_ft); } /* set the data length */ CAN_TMP(can_periph, mailbox_number) &= ~CAN_TMP_DLENC; CAN_TMP(can_periph, mailbox_number) |= transmit_message->tx_dlen; /* set the data */ CAN_TMDATA0(can_periph, mailbox_number) = TMDATA0_DB3(transmit_message->tx_data[3]) | \ - TMDATA0_DB2(transmit_message->tx_data[2]) | \ - TMDATA0_DB1(transmit_message->tx_data[1]) | \ - TMDATA0_DB0(transmit_message->tx_data[0]); + TMDATA0_DB2(transmit_message->tx_data[2]) | \ + TMDATA0_DB1(transmit_message->tx_data[1]) | \ + TMDATA0_DB0(transmit_message->tx_data[0]); CAN_TMDATA1(can_periph, mailbox_number) = TMDATA1_DB7(transmit_message->tx_data[7]) | \ - TMDATA1_DB6(transmit_message->tx_data[6]) | \ - TMDATA1_DB5(transmit_message->tx_data[5]) | \ - TMDATA1_DB4(transmit_message->tx_data[4]); + TMDATA1_DB6(transmit_message->tx_data[6]) | \ + TMDATA1_DB5(transmit_message->tx_data[5]) | \ + TMDATA1_DB4(transmit_message->tx_data[4]); /* enable transmission */ CAN_TMI(can_periph, mailbox_number) |= CAN_TMI_TEN; @@ -491,9 +492,9 @@ uint8_t can_message_transmit(uint32_t can_periph, can_trasnmit_message_struct* t } /*! - \brief get CAN transmit state + \brief get CAN transmit state \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] mailbox_number only one parameter can be selected which is shown as below: \arg CAN_MAILBOX(x=0,1,2) @@ -504,9 +505,9 @@ can_transmit_state_enum can_transmit_states(uint32_t can_periph, uint8_t mailbox { can_transmit_state_enum state = CAN_TRANSMIT_FAILED; uint32_t val = 0U; - - /* check selected mailbox state */ - switch(mailbox_number){ + + /* check selected mailbox state */ + switch(mailbox_number) { /* mailbox0 */ case CAN_MAILBOX0: val = CAN_TSTAT(can_periph) & (CAN_TSTAT_MTF0 | CAN_TSTAT_MTFNERR0 | CAN_TSTAT_TME0); @@ -523,26 +524,26 @@ can_transmit_state_enum can_transmit_states(uint32_t can_periph, uint8_t mailbox val = CAN_TRANSMIT_FAILED; break; } - - switch(val){ - /* transmit pending */ - case (CAN_STATE_PENDING): + + switch(val) { + /* transmit pending */ + case(CAN_STATE_PENDING): state = CAN_TRANSMIT_PENDING; break; - /* mailbox0 transmit succeeded */ - case (CAN_TSTAT_MTF0 | CAN_TSTAT_MTFNERR0 | CAN_TSTAT_TME0): + /* mailbox0 transmit succeeded */ + case(CAN_TSTAT_MTF0 | CAN_TSTAT_MTFNERR0 | CAN_TSTAT_TME0): state = CAN_TRANSMIT_OK; break; - /* mailbox1 transmit succeeded */ - case (CAN_TSTAT_MTF1 | CAN_TSTAT_MTFNERR1 | CAN_TSTAT_TME1): + /* mailbox1 transmit succeeded */ + case(CAN_TSTAT_MTF1 | CAN_TSTAT_MTFNERR1 | CAN_TSTAT_TME1): state = CAN_TRANSMIT_OK; break; - /* mailbox2 transmit succeeded */ - case (CAN_TSTAT_MTF2 | CAN_TSTAT_MTFNERR2 | CAN_TSTAT_TME2): + /* mailbox2 transmit succeeded */ + case(CAN_TSTAT_MTF2 | CAN_TSTAT_MTFNERR2 | CAN_TSTAT_TME2): state = CAN_TRANSMIT_OK; break; - /* transmit failed */ - default: + /* transmit failed */ + default: state = CAN_TRANSMIT_FAILED; break; } @@ -552,7 +553,7 @@ can_transmit_state_enum can_transmit_states(uint32_t can_periph, uint8_t mailbox /*! \brief stop CAN transmission \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] mailbox_number only one parameter can be selected which is shown as below: \arg CAN_MAILBOXx(x=0,1,2) @@ -561,19 +562,19 @@ can_transmit_state_enum can_transmit_states(uint32_t can_periph, uint8_t mailbox */ void can_transmission_stop(uint32_t can_periph, uint8_t mailbox_number) { - if(CAN_MAILBOX0 == mailbox_number){ + if(CAN_MAILBOX0 == mailbox_number) { CAN_TSTAT(can_periph) |= CAN_TSTAT_MST0; - while(CAN_TSTAT_MST0 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST0)){ + while(CAN_TSTAT_MST0 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST0)) { } - }else if(CAN_MAILBOX1 == mailbox_number){ + } else if(CAN_MAILBOX1 == mailbox_number) { CAN_TSTAT(can_periph) |= CAN_TSTAT_MST1; - while(CAN_TSTAT_MST1 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST1)){ + while(CAN_TSTAT_MST1 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST1)) { } - }else if(CAN_MAILBOX2 == mailbox_number){ + } else if(CAN_MAILBOX2 == mailbox_number) { CAN_TSTAT(can_periph) |= CAN_TSTAT_MST2; - while(CAN_TSTAT_MST2 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST2)){ + while(CAN_TSTAT_MST2 == (CAN_TSTAT(can_periph) & CAN_TSTAT_MST2)) { } - }else{ + } else { /* illegal parameters */ } } @@ -581,7 +582,7 @@ void can_transmission_stop(uint32_t can_periph, uint8_t mailbox_number) /*! \brief CAN receive message \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] fifo_number \arg CAN_FIFOx(x=0,1) \param[out] receive_message: struct for CAN receive message @@ -594,25 +595,25 @@ void can_transmission_stop(uint32_t can_periph, uint8_t mailbox_number) \arg rx_fi: 0 - 27 \retval none */ -void can_message_receive(uint32_t can_periph, uint8_t fifo_number, can_receive_message_struct* receive_message) +void can_message_receive(uint32_t can_periph, uint8_t fifo_number, can_receive_message_struct *receive_message) { /* get the frame format */ receive_message->rx_ff = (uint8_t)(CAN_RFIFOMI_FF & CAN_RFIFOMI(can_periph, fifo_number)); - if(CAN_FF_STANDARD == receive_message->rx_ff){ + if(CAN_FF_STANDARD == receive_message->rx_ff) { /* get standard identifier */ receive_message->rx_sfid = (uint32_t)(GET_RFIFOMI_SFID(CAN_RFIFOMI(can_periph, fifo_number))); - }else{ + } else { /* get extended identifier */ receive_message->rx_efid = (uint32_t)(GET_RFIFOMI_EFID(CAN_RFIFOMI(can_periph, fifo_number))); } - + /* get frame type */ - receive_message->rx_ft = (uint8_t)(CAN_RFIFOMI_FT & CAN_RFIFOMI(can_periph, fifo_number)); + receive_message->rx_ft = (uint8_t)(CAN_RFIFOMI_FT & CAN_RFIFOMI(can_periph, fifo_number)); /* filtering index */ receive_message->rx_fi = (uint8_t)(GET_RFIFOMP_FI(CAN_RFIFOMP(can_periph, fifo_number))); - /* get recevie data length */ + /* get receive data length */ receive_message->rx_dlen = (uint8_t)(GET_RFIFOMP_DLENC(CAN_RFIFOMP(can_periph, fifo_number))); - + /* receive data */ receive_message -> rx_data[0] = (uint8_t)(GET_RFIFOMDATA0_DB0(CAN_RFIFOMDATA0(can_periph, fifo_number))); receive_message -> rx_data[1] = (uint8_t)(GET_RFIFOMDATA0_DB1(CAN_RFIFOMDATA0(can_periph, fifo_number))); @@ -622,19 +623,19 @@ void can_message_receive(uint32_t can_periph, uint8_t fifo_number, can_receive_m receive_message -> rx_data[5] = (uint8_t)(GET_RFIFOMDATA1_DB5(CAN_RFIFOMDATA1(can_periph, fifo_number))); receive_message -> rx_data[6] = (uint8_t)(GET_RFIFOMDATA1_DB6(CAN_RFIFOMDATA1(can_periph, fifo_number))); receive_message -> rx_data[7] = (uint8_t)(GET_RFIFOMDATA1_DB7(CAN_RFIFOMDATA1(can_periph, fifo_number))); - + /* release FIFO */ - if(CAN_FIFO0 == fifo_number){ + if(CAN_FIFO0 == fifo_number) { CAN_RFIFO0(can_periph) |= CAN_RFIFO0_RFD0; - }else{ + } else { CAN_RFIFO1(can_periph) |= CAN_RFIFO1_RFD1; } } /*! - \brief release FIFO0 + \brief release FIFO \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] fifo_number only one parameter can be selected which is shown as below: \arg CAN_FIFOx(x=0,1) @@ -643,11 +644,11 @@ void can_message_receive(uint32_t can_periph, uint8_t fifo_number, can_receive_m */ void can_fifo_release(uint32_t can_periph, uint8_t fifo_number) { - if(CAN_FIFO0 == fifo_number){ + if(CAN_FIFO0 == fifo_number) { CAN_RFIFO0(can_periph) |= CAN_RFIFO0_RFD0; - }else if(CAN_FIFO1 == fifo_number){ + } else if(CAN_FIFO1 == fifo_number) { CAN_RFIFO1(can_periph) |= CAN_RFIFO1_RFD1; - }else{ + } else { /* illegal parameters */ CAN_ERROR_HANDLE("CAN FIFO NUM is invalid \r\n"); } @@ -656,24 +657,24 @@ void can_fifo_release(uint32_t can_periph, uint8_t fifo_number) /*! \brief CAN receive message length \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] fifo_number only one parameter can be selected which is shown as below: - \arg CAN_FIFOx(x=0,1) + \arg CAN_FIFOx(x=0,1) \param[out] none \retval message length */ uint8_t can_receive_message_length_get(uint32_t can_periph, uint8_t fifo_number) { uint8_t val = 0U; - - if(CAN_FIFO0 == fifo_number){ + + if(CAN_FIFO0 == fifo_number) { /* FIFO0 */ val = (uint8_t)(CAN_RFIFO0(can_periph) & CAN_RFIF_RFL_MASK); - }else if(CAN_FIFO1 == fifo_number){ + } else if(CAN_FIFO1 == fifo_number) { /* FIFO1 */ val = (uint8_t)(CAN_RFIFO1(can_periph) & CAN_RFIF_RFL_MASK); - }else{ + } else { /* illegal parameters */ } return val; @@ -682,7 +683,7 @@ uint8_t can_receive_message_length_get(uint32_t can_periph, uint8_t fifo_number) /*! \brief set CAN working mode \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] can_working_mode only one parameter can be selected which is shown as below: \arg CAN_MODE_INITIALIZE @@ -695,49 +696,49 @@ ErrStatus can_working_mode_set(uint32_t can_periph, uint8_t working_mode) { ErrStatus flag = ERROR; /* timeout for IWS or also for SLPWS bits */ - uint32_t timeout = CAN_TIMEOUT; - - if(CAN_MODE_INITIALIZE == working_mode){ + uint32_t timeout = CAN_TIMEOUT; + + if(CAN_MODE_INITIALIZE == working_mode) { /* disable sleep mode */ CAN_CTL(can_periph) &= (~(uint32_t)CAN_CTL_SLPWMOD); /* set initialize mode */ CAN_CTL(can_periph) |= (uint8_t)CAN_CTL_IWMOD; /* wait the acknowledge */ - while((CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)) && (0U != timeout)){ + while((CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)) && (0U != timeout)) { timeout--; } - if(CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)){ + if(CAN_STAT_IWS != (CAN_STAT(can_periph) & CAN_STAT_IWS)) { flag = ERROR; - }else{ + } else { flag = SUCCESS; } - }else if(CAN_MODE_NORMAL == working_mode){ + } else if(CAN_MODE_NORMAL == working_mode) { /* enter normal mode */ CAN_CTL(can_periph) &= ~(uint32_t)(CAN_CTL_SLPWMOD | CAN_CTL_IWMOD); /* wait the acknowledge */ - while((0U != (CAN_STAT(can_periph) & (CAN_STAT_IWS | CAN_STAT_SLPWS))) && (0U != timeout)){ + while((0U != (CAN_STAT(can_periph) & (CAN_STAT_IWS | CAN_STAT_SLPWS))) && (0U != timeout)) { timeout--; } - if(0U != (CAN_STAT(can_periph) & (CAN_STAT_IWS | CAN_STAT_SLPWS))){ + if(0U != (CAN_STAT(can_periph) & (CAN_STAT_IWS | CAN_STAT_SLPWS))) { flag = ERROR; - }else{ + } else { flag = SUCCESS; } - }else if(CAN_MODE_SLEEP == working_mode){ + } else if(CAN_MODE_SLEEP == working_mode) { /* disable initialize mode */ CAN_CTL(can_periph) &= (~(uint32_t)CAN_CTL_IWMOD); /* set sleep mode */ CAN_CTL(can_periph) |= (uint8_t)CAN_CTL_SLPWMOD; /* wait the acknowledge */ - while((CAN_STAT_SLPWS != (CAN_STAT(can_periph) & CAN_STAT_SLPWS)) && (0U != timeout)){ + while((CAN_STAT_SLPWS != (CAN_STAT(can_periph) & CAN_STAT_SLPWS)) && (0U != timeout)) { timeout--; } - if(CAN_STAT_SLPWS != (CAN_STAT(can_periph) & CAN_STAT_SLPWS)){ + if(CAN_STAT_SLPWS != (CAN_STAT(can_periph) & CAN_STAT_SLPWS)) { flag = ERROR; - }else{ + } else { flag = SUCCESS; } - }else{ + } else { flag = ERROR; } return flag; @@ -746,7 +747,7 @@ ErrStatus can_working_mode_set(uint32_t can_periph, uint8_t working_mode) /*! \brief wake up CAN \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval ErrStatus: SUCCESS or ERROR */ @@ -754,17 +755,17 @@ ErrStatus can_wakeup(uint32_t can_periph) { ErrStatus flag = ERROR; uint32_t timeout = CAN_TIMEOUT; - + /* wakeup */ CAN_CTL(can_periph) &= ~CAN_CTL_SLPWMOD; - - while((0U != (CAN_STAT(can_periph) & CAN_STAT_SLPWS)) && (0x00U != timeout)){ + + while((0U != (CAN_STAT(can_periph) & CAN_STAT_SLPWS)) && (0x00U != timeout)) { timeout--; } /* check state */ - if(0U != (CAN_STAT(can_periph) & CAN_STAT_SLPWS)){ + if(0U != (CAN_STAT(can_periph) & CAN_STAT_SLPWS)) { flag = ERROR; - }else{ + } else { flag = SUCCESS; } return flag; @@ -773,7 +774,7 @@ ErrStatus can_wakeup(uint32_t can_periph) /*! \brief get CAN error type \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval can_error_enum \arg CAN_ERROR_NONE: no error @@ -789,7 +790,7 @@ can_error_enum can_error_get(uint32_t can_periph) { can_error_enum error; error = CAN_ERROR_NONE; - + /* get error type */ error = (can_error_enum)(GET_ERR_ERRN(CAN_ERR(can_periph))); return error; @@ -798,14 +799,14 @@ can_error_enum can_error_get(uint32_t can_periph) /*! \brief get CAN receive error number \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval error number */ uint8_t can_receive_error_number_get(uint32_t can_periph) { uint8_t val; - + /* get error count */ val = (uint8_t)(GET_ERR_RECNT(CAN_ERR(can_periph))); return val; @@ -814,78 +815,22 @@ uint8_t can_receive_error_number_get(uint32_t can_periph) /*! \brief get CAN transmit error number \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[out] none \retval error number */ uint8_t can_transmit_error_number_get(uint32_t can_periph) { uint8_t val; - + val = (uint8_t)(GET_ERR_TECNT(CAN_ERR(can_periph))); return val; } -/*! - \brief enable CAN interrupt - \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL - \param[in] interrupt - one or more parameters can be selected which are shown as below: - \arg CAN_INT_TME: transmit mailbox empty interrupt enable - \arg CAN_INT_RFNE0: receive FIFO0 not empty interrupt enable - \arg CAN_INT_RFF0: receive FIFO0 full interrupt enable - \arg CAN_INT_RFO0: receive FIFO0 overfull interrupt enable - \arg CAN_INT_RFNE1: receive FIFO1 not empty interrupt enable - \arg CAN_INT_RFF1: receive FIFO1 full interrupt enable - \arg CAN_INT_RFO1: receive FIFO1 overfull interrupt enable - \arg CAN_INT_WERR: warning error interrupt enable - \arg CAN_INT_PERR: passive error interrupt enable - \arg CAN_INT_BO: bus-off interrupt enable - \arg CAN_INT_ERRN: error number interrupt enable - \arg CAN_INT_ERR: error interrupt enable - \arg CAN_INT_WU: wakeup interrupt enable - \arg CAN_INT_SLPW: sleep working interrupt enable - \param[out] none - \retval none -*/ -void can_interrupt_enable(uint32_t can_periph, uint32_t interrupt) -{ - CAN_INTEN(can_periph) |= interrupt; -} - -/*! - \brief disable CAN interrupt - \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL - \param[in] interrupt - one or more parameters can be selected which are shown as below: - \arg CAN_INT_TME: transmit mailbox empty interrupt enable - \arg CAN_INT_RFNE0: receive FIFO0 not empty interrupt enable - \arg CAN_INT_RFF0: receive FIFO0 full interrupt enable - \arg CAN_INT_RFO0: receive FIFO0 overfull interrupt enable - \arg CAN_INT_RFNE1: receive FIFO1 not empty interrupt enable - \arg CAN_INT_RFF1: receive FIFO1 full interrupt enable - \arg CAN_INT_RFO1: receive FIFO1 overfull interrupt enable - \arg CAN_INT_WERR: warning error interrupt enable - \arg CAN_INT_PERR: passive error interrupt enable - \arg CAN_INT_BO: bus-off interrupt enable - \arg CAN_INT_ERRN: error number interrupt enable - \arg CAN_INT_ERR: error interrupt enable - \arg CAN_INT_WU: wakeup interrupt enable - \arg CAN_INT_SLPW: sleep working interrupt enable - \param[out] none - \retval none -*/ -void can_interrupt_disable(uint32_t can_periph, uint32_t interrupt) -{ - CAN_INTEN(can_periph) &= ~interrupt; -} - /*! \brief get CAN flag state \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] flag: CAN flags, refer to can_flag_enum only one parameter can be selected which is shown as below: \arg CAN_FLAG_RXL: RX level @@ -897,9 +842,9 @@ void can_interrupt_disable(uint32_t can_periph, uint32_t interrupt) \arg CAN_FLAG_ERRIF: error flag \arg CAN_FLAG_SLPWS: sleep working state \arg CAN_FLAG_IWS: initial working state - \arg CAN_FLAG_TMLS2: transmit mailbox 2 last sending in Tx FIFO - \arg CAN_FLAG_TMLS1: transmit mailbox 1 last sending in Tx FIFO - \arg CAN_FLAG_TMLS0: transmit mailbox 0 last sending in Tx FIFO + \arg CAN_FLAG_TMLS2: transmit mailbox 2 last sending in TX FIFO + \arg CAN_FLAG_TMLS1: transmit mailbox 1 last sending in TX FIFO + \arg CAN_FLAG_TMLS0: transmit mailbox 0 last sending in TX FIFO \arg CAN_FLAG_TME2: transmit mailbox 2 empty \arg CAN_FLAG_TME1: transmit mailbox 1 empty \arg CAN_FLAG_TME0: transmit mailbox 0 empty @@ -926,11 +871,11 @@ void can_interrupt_disable(uint32_t can_periph, uint32_t interrupt) \retval FlagStatus: SET or RESET */ FlagStatus can_flag_get(uint32_t can_periph, can_flag_enum flag) -{ +{ /* get flag and interrupt enable state */ - if(RESET != (CAN_REG_VAL(can_periph, flag) & BIT(CAN_BIT_POS(flag)))){ + if(RESET != (CAN_REG_VAL(can_periph, flag) & BIT(CAN_BIT_POS(flag)))) { return SET; - }else{ + } else { return RESET; } } @@ -938,7 +883,7 @@ FlagStatus can_flag_get(uint32_t can_periph, can_flag_enum flag) /*! \brief clear CAN flag state \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] flag: CAN flags, refer to can_flag_enum only one parameter can be selected which is shown as below: \arg CAN_FLAG_SLPIF: status change flag of entering sleep working mode @@ -968,10 +913,66 @@ void can_flag_clear(uint32_t can_periph, can_flag_enum flag) CAN_REG_VAL(can_periph, flag) = BIT(CAN_BIT_POS(flag)); } +/*! + \brief enable CAN interrupt + \param[in] can_periph + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \param[in] interrupt + one or more parameters can be selected which are shown as below: + \arg CAN_INT_TME: transmit mailbox empty interrupt enable + \arg CAN_INT_RFNE0: receive FIFO0 not empty interrupt enable + \arg CAN_INT_RFF0: receive FIFO0 full interrupt enable + \arg CAN_INT_RFO0: receive FIFO0 overfull interrupt enable + \arg CAN_INT_RFNE1: receive FIFO1 not empty interrupt enable + \arg CAN_INT_RFF1: receive FIFO1 full interrupt enable + \arg CAN_INT_RFO1: receive FIFO1 overfull interrupt enable + \arg CAN_INT_WERR: warning error interrupt enable + \arg CAN_INT_PERR: passive error interrupt enable + \arg CAN_INT_BO: bus-off interrupt enable + \arg CAN_INT_ERRN: error number interrupt enable + \arg CAN_INT_ERR: error interrupt enable + \arg CAN_INT_WAKEUP: wakeup interrupt enable + \arg CAN_INT_SLPW: sleep working interrupt enable + \param[out] none + \retval none +*/ +void can_interrupt_enable(uint32_t can_periph, uint32_t interrupt) +{ + CAN_INTEN(can_periph) |= interrupt; +} + +/*! + \brief disable CAN interrupt + \param[in] can_periph + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \param[in] interrupt + one or more parameters can be selected which are shown as below: + \arg CAN_INT_TME: transmit mailbox empty interrupt enable + \arg CAN_INT_RFNE0: receive FIFO0 not empty interrupt enable + \arg CAN_INT_RFF0: receive FIFO0 full interrupt enable + \arg CAN_INT_RFO0: receive FIFO0 overfull interrupt enable + \arg CAN_INT_RFNE1: receive FIFO1 not empty interrupt enable + \arg CAN_INT_RFF1: receive FIFO1 full interrupt enable + \arg CAN_INT_RFO1: receive FIFO1 overfull interrupt enable + \arg CAN_INT_WERR: warning error interrupt enable + \arg CAN_INT_PERR: passive error interrupt enable + \arg CAN_INT_BO: bus-off interrupt enable + \arg CAN_INT_ERRN: error number interrupt enable + \arg CAN_INT_ERR: error interrupt enable + \arg CAN_INT_WAKEUP: wakeup interrupt enable + \arg CAN_INT_SLPW: sleep working interrupt enable + \param[out] none + \retval none +*/ +void can_interrupt_disable(uint32_t can_periph, uint32_t interrupt) +{ + CAN_INTEN(can_periph) &= ~interrupt; +} + /*! \brief get CAN interrupt flag state \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] flag: CAN interrupt flags, refer to can_interrupt_flag_enum only one parameter can be selected which is shown as below: \arg CAN_INT_FLAG_SLPIF: status change interrupt flag of sleep working mode entering @@ -997,22 +998,22 @@ FlagStatus can_interrupt_flag_get(uint32_t can_periph, can_interrupt_flag_enum f { uint32_t ret1 = RESET; uint32_t ret2 = RESET; - - /* get the staus of interrupt flag */ - if (flag == CAN_INT_FLAG_RFL0) { + + /* get the status of interrupt flag */ + if(flag == CAN_INT_FLAG_RFL0) { ret1 = can_receive_message_length_get(can_periph, CAN_FIFO0); - } else if (flag == CAN_INT_FLAG_RFL1) { + } else if(flag == CAN_INT_FLAG_RFL1) { ret1 = can_receive_message_length_get(can_periph, CAN_FIFO1); - } else if (flag == CAN_INT_FLAG_ERRN) { + } else if(flag == CAN_INT_FLAG_ERRN) { ret1 = can_error_get(can_periph); } else { ret1 = CAN_REG_VALS(can_periph, flag) & BIT(CAN_BIT_POS0(flag)); } - /* get the staus of interrupt enale bit */ + /* get the status of interrupt enable bit */ ret2 = CAN_INTEN(can_periph) & BIT(CAN_BIT_POS1(flag)); - if(ret1 && ret2){ + if(ret1 && ret2) { return SET; - }else{ + } else { return RESET; } } @@ -1020,7 +1021,7 @@ FlagStatus can_interrupt_flag_get(uint32_t can_periph, can_interrupt_flag_enum f /*! \brief clear CAN interrupt flag state \param[in] can_periph - \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL + \arg CANx(x=0,1),the CAN1 only for GD32F30X_CL \param[in] flag: CAN interrupt flags, refer to can_interrupt_flag_enum only one parameter can be selected which is shown as below: \arg CAN_INT_FLAG_SLPIF: status change interrupt flag of sleep working mode entering diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_ctc.c b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_ctc.c index 164f906a..b39261a4 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_ctc.c +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_ctc.c @@ -58,8 +58,6 @@ void ctc_deinit(void) rcu_periph_reset_disable(RCU_CTCRST); } - - /*! \brief enable CTC trim counter \param[in] none @@ -84,7 +82,7 @@ void ctc_counter_disable(void) /*! \brief configure the IRC48M trim value - \param[in] ctc_trim_value: 8-bit IRC48M trim value + \param[in] trim_value: 6-bit IRC48M trim value \arg 0x00 - 0x3F \param[out] none \retval none @@ -246,7 +244,7 @@ uint16_t ctc_counter_reload_value_read(void) \brief read the IRC48M trim value \param[in] none \param[out] none - \retval the 8-bit IRC48M trim value + \retval the 6-bit IRC48M trim value */ uint8_t ctc_irc48m_trim_value_read(void) { @@ -255,6 +253,52 @@ uint8_t ctc_irc48m_trim_value_read(void) return (trim_value); } +/*! + \brief get CTC flag + \param[in] flag: the CTC flag + only one parameter can be selected which is shown as below: + \arg CTC_FLAG_CKOK: clock trim OK flag + \arg CTC_FLAG_CKWARN: clock trim warning flag + \arg CTC_FLAG_ERR: error flag + \arg CTC_FLAG_EREF: expect reference flag + \arg CTC_FLAG_CKERR: clock trim error bit + \arg CTC_FLAG_REFMISS: reference sync pulse miss + \arg CTC_FLAG_TRIMERR: trim value error bit + \param[out] none + \retval FlagStatus: SET or RESET +*/ +FlagStatus ctc_flag_get(uint32_t flag) +{ + if(RESET != (CTC_STAT & flag)){ + return SET; + }else{ + return RESET; + } +} + +/*! + \brief clear CTC flag + \param[in] flag: the CTC flag + only one parameter can be selected which is shown as below: + \arg CTC_FLAG_CKOK: clock trim OK flag + \arg CTC_FLAG_CKWARN: clock trim warning flag + \arg CTC_FLAG_ERR: error flag + \arg CTC_FLAG_EREF: expect reference flag + \arg CTC_FLAG_CKERR: clock trim error bit + \arg CTC_FLAG_REFMISS: reference sync pulse miss + \arg CTC_FLAG_TRIMERR: trim value error bit + \param[out] none + \retval none +*/ +void ctc_flag_clear(uint32_t flag) +{ + if(RESET != (flag & CTC_FLAG_MASK)){ + CTC_INTC |= CTC_INTC_ERRIC; + }else{ + CTC_INTC |= flag; + } +} + /*! \brief enable the CTC interrupt \param[in] interrupt: CTC interrupt enable @@ -345,48 +389,3 @@ void ctc_interrupt_flag_clear(uint32_t int_flag) } } -/*! - \brief get CTC flag - \param[in] flag: the CTC flag - only one parameter can be selected which is shown as below: - \arg CTC_FLAG_CKOK: clock trim OK flag - \arg CTC_FLAG_CKWARN: clock trim warning flag - \arg CTC_FLAG_ERR: error flag - \arg CTC_FLAG_EREF: expect reference flag - \arg CTC_FLAG_CKERR: clock trim error bit - \arg CTC_FLAG_REFMISS: reference sync pulse miss - \arg CTC_FLAG_TRIMERR: trim value error bit - \param[out] none - \retval FlagStatus: SET or RESET -*/ -FlagStatus ctc_flag_get(uint32_t flag) -{ - if(RESET != (CTC_STAT & flag)){ - return SET; - }else{ - return RESET; - } -} - -/*! - \brief clear CTC flag - \param[in] flag: the CTC flag - only one parameter can be selected which is shown as below: - \arg CTC_FLAG_CKOK: clock trim OK flag - \arg CTC_FLAG_CKWARN: clock trim warning flag - \arg CTC_FLAG_ERR: error flag - \arg CTC_FLAG_EREF: expect reference flag - \arg CTC_FLAG_CKERR: clock trim error bit - \arg CTC_FLAG_REFMISS: reference sync pulse miss - \arg CTC_FLAG_TRIMERR: trim value error bit - \param[out] none - \retval none -*/ -void ctc_flag_clear(uint32_t flag) -{ - if(RESET != (flag & CTC_FLAG_MASK)){ - CTC_INTC |= CTC_INTC_ERRIC; - }else{ - CTC_INTC |= flag; - } -} diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_exti.c b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_exti.c index 4581b2b6..7f728e9f 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_exti.c +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_exti.c @@ -37,6 +37,8 @@ OF SUCH DAMAGE. #include "gd32f30x_exti.h" +#define EXTI_REG_RESET_VALUE ((uint32_t)0x00000000U) + /*! \brief deinitialize the EXTI \param[in] none @@ -46,15 +48,15 @@ OF SUCH DAMAGE. void exti_deinit(void) { /* reset the value of all the EXTI registers */ - EXTI_INTEN = (uint32_t)0x00000000U; - EXTI_EVEN = (uint32_t)0x00000000U; - EXTI_RTEN = (uint32_t)0x00000000U; - EXTI_FTEN = (uint32_t)0x00000000U; - EXTI_SWIEV = (uint32_t)0x00000000U; + EXTI_INTEN = EXTI_REG_RESET_VALUE; + EXTI_EVEN = EXTI_REG_RESET_VALUE; + EXTI_RTEN = EXTI_REG_RESET_VALUE; + EXTI_FTEN = EXTI_REG_RESET_VALUE; + EXTI_SWIEV = EXTI_REG_RESET_VALUE; } /*! - \brief initialize the EXTI + \brief initialize the EXTI line x \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x @@ -67,6 +69,7 @@ void exti_deinit(void) \arg EXTI_TRIG_RISING: rising edge trigger \arg EXTI_TRIG_FALLING: falling trigger \arg EXTI_TRIG_BOTH: rising and falling trigger + \arg EXTI_TRIG_NONE: without rising edge or falling edge trigger \param[out] none \retval none */ @@ -104,6 +107,7 @@ void exti_init(exti_line_enum linex, exti_mode_enum mode, exti_trig_type_enum tr EXTI_RTEN |= (uint32_t)linex; EXTI_FTEN |= (uint32_t)linex; break; + case EXTI_TRIG_NONE: default: break; } @@ -123,29 +127,29 @@ void exti_interrupt_enable(exti_line_enum linex) } /*! - \brief enable the events from EXTI line x + \brief disable the interrupt from EXTI line x \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x \param[out] none \retval none */ -void exti_event_enable(exti_line_enum linex) +void exti_interrupt_disable(exti_line_enum linex) { - EXTI_EVEN |= (uint32_t)linex; + EXTI_INTEN &= ~(uint32_t)linex; } /*! - \brief disable the interrupt from EXTI line x + \brief enable the events from EXTI line x \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x \param[out] none \retval none */ -void exti_interrupt_disable(exti_line_enum linex) +void exti_event_enable(exti_line_enum linex) { - EXTI_INTEN &= ~(uint32_t)linex; + EXTI_EVEN |= (uint32_t)linex; } /*! @@ -162,92 +166,87 @@ void exti_event_disable(exti_line_enum linex) } /*! - \brief get EXTI lines flag + \brief enable the software interrupt event from EXTI line x \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x \param[out] none - \retval FlagStatus: status of flag (RESET or SET) + \retval none */ -FlagStatus exti_flag_get(exti_line_enum linex) +void exti_software_interrupt_enable(exti_line_enum linex) { - if(RESET != (EXTI_PD & (uint32_t)linex)){ - return SET; - }else{ - return RESET; - } + EXTI_SWIEV |= (uint32_t)linex; } /*! - \brief clear EXTI lines pending flag + \brief disable the software interrupt event from EXTI line x \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x \param[out] none \retval none */ -void exti_flag_clear(exti_line_enum linex) +void exti_software_interrupt_disable(exti_line_enum linex) { - EXTI_PD = (uint32_t)linex; + EXTI_SWIEV &= ~(uint32_t)linex; } /*! - \brief get EXTI lines flag when the interrupt flag is set + \brief get EXTI line x interrupt pending flag \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x \param[out] none \retval FlagStatus: status of flag (RESET or SET) */ -FlagStatus exti_interrupt_flag_get(exti_line_enum linex) +FlagStatus exti_flag_get(exti_line_enum linex) { - uint32_t flag_left, flag_right; - - flag_left = EXTI_PD & (uint32_t)linex; - flag_right = EXTI_INTEN & (uint32_t)linex; - - if((RESET != flag_left) && (RESET != flag_right)){ + if(RESET != (EXTI_PD & (uint32_t)linex)){ return SET; }else{ return RESET; - } + } } /*! - \brief clear EXTI lines pending flag + \brief clear EXTI line x interrupt pending flag \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x \param[out] none \retval none */ -void exti_interrupt_flag_clear(exti_line_enum linex) +void exti_flag_clear(exti_line_enum linex) { EXTI_PD = (uint32_t)linex; } /*! - \brief enable EXTI software interrupt event + \brief get EXTI line x interrupt pending flag \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x \param[out] none - \retval none + \retval FlagStatus: status of flag (RESET or SET) */ -void exti_software_interrupt_enable(exti_line_enum linex) +FlagStatus exti_interrupt_flag_get(exti_line_enum linex) { - EXTI_SWIEV |= (uint32_t)linex; + if(RESET != (EXTI_PD & (uint32_t)linex)) { + return SET; + } else { + return RESET; + } } /*! - \brief disable EXTI software interrupt event + \brief clear EXTI line x interrupt pending flag \param[in] linex: EXTI line number, refer to exti_line_enum only one parameter can be selected which is shown as below: \arg EXTI_x (x=0..19): EXTI line x \param[out] none \retval none */ -void exti_software_interrupt_disable(exti_line_enum linex) +void exti_interrupt_flag_clear(exti_line_enum linex) { - EXTI_SWIEV &= ~(uint32_t)linex; + EXTI_PD = (uint32_t)linex; } diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_i2c.c b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_i2c.c index 15b8896f..c6d3bc67 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_i2c.c +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_i2c.c @@ -733,6 +733,6 @@ void i2c_interrupt_flag_clear(uint32_t i2c_periph, i2c_interrupt_flag_enum int_f I2C_STAT0(i2c_periph); I2C_STAT1(i2c_periph); }else{ - I2C_REG_VAL2(i2c_periph, int_flag) &= ~BIT(I2C_BIT_POS2(int_flag)); + I2C_REG_VAL2(i2c_periph, int_flag) = ~BIT(I2C_BIT_POS2(int_flag)); } } diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_spi.c b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_spi.c index f0a7abae..4df21d04 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_spi.c +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_spi.c @@ -499,6 +499,20 @@ void spi_bidirectional_transfer_config(uint32_t spi_periph, uint32_t transfer_di } } +/*! + \brief clear SPI/I2S format error flag status + \param[in] spi_periph: SPIx(x=0,1,2) + \param[in] flag: SPI/I2S frame format error flag + \arg SPI_FLAG_FERR: only for SPI work in TI mode + \arg I2S_FLAG_FERR: for I2S + \param[out] none + \retval none +*/ +void spi_i2s_format_error_clear(uint32_t spi_periph, uint32_t flag) +{ + SPI_STAT(spi_periph) = (uint32_t)(~flag); +} + /*! \brief set SPI CRC polynomial \param[in] spi_periph: SPIx(x=0,1,2) @@ -575,6 +589,17 @@ uint16_t spi_crc_get(uint32_t spi_periph,uint8_t crc) } } +/*! + \brief clear SPI CRC error flag status + \param[in] spi_periph: SPIx(x=0,1,2) + \param[out] none + \retval none +*/ +void spi_crc_error_clear(uint32_t spi_periph) +{ + SPI_STAT(spi_periph) = (uint32_t)(~SPI_FLAG_CRCERR); +} + /*! \brief enable SPI TI mode \param[in] spi_periph: SPIx(x=0,1,2) @@ -846,14 +871,3 @@ FlagStatus spi_i2s_flag_get(uint32_t spi_periph, uint32_t flag) return RESET; } } - -/*! - \brief clear SPI CRC error flag status - \param[in] spi_periph: SPIx(x=0,1,2) - \param[out] none - \retval none -*/ -void spi_crc_error_clear(uint32_t spi_periph) -{ - SPI_STAT(spi_periph) &= (uint32_t)(~SPI_FLAG_CRCERR); -} diff --git a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_usart.c b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_usart.c index 50387d47..b218900a 100644 --- a/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_usart.c +++ b/system/GD32F30x_firmware/GD32F30x_standard_peripheral/Source/gd32f30x_usart.c @@ -112,25 +112,25 @@ void usart_baudrate_set(uint32_t usart_periph, uint32_t baudval) case UART4: /* get UART4 clock */ uclk = rcu_clock_freq_get(CK_APB1); - break; + break; default: break; } /* oversampling by 16, configure the value of USART_BAUD */ - udiv = (uclk+baudval/2U)/baudval; + udiv = (uclk + baudval / 2U) / baudval; intdiv = udiv & 0xfff0U; fradiv = udiv & 0xfU; USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv)); } /*! - \brief configure USART parity - \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4) - \param[in] paritycfg: configure USART parity - only one parameter can be selected which is shown as below: - \arg USART_PM_NONE: no parity - \arg USART_PM_ODD: odd parity - \arg USART_PM_EVEN: even parity + \brief configure USART parity + \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4) + \param[in] paritycfg: configure USART parity + only one parameter can be selected which is shown as below: + \arg USART_PM_NONE: no parity + \arg USART_PM_ODD: odd parity + \arg USART_PM_EVEN: even parity \param[out] none \retval none */ @@ -143,12 +143,12 @@ void usart_parity_config(uint32_t usart_periph, uint32_t paritycfg) } /*! - \brief configure USART word length - \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4) - \param[in] wlen: USART word length configure - only one parameter can be selected which is shown as below: - \arg USART_WL_8BIT: 8 bits - \arg USART_WL_9BIT: 9 bits + \brief configure USART word length + \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4) + \param[in] wlen: USART word length configure + only one parameter can be selected which is shown as below: + \arg USART_WL_8BIT: 8 bits + \arg USART_WL_9BIT: 9 bits \param[out] none \retval none */ @@ -161,14 +161,14 @@ void usart_word_length_set(uint32_t usart_periph, uint32_t wlen) } /*! - \brief configure USART stop bit length - \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4) - \param[in] stblen: USART stop bit configure - only one parameter can be selected which is shown as below: - \arg USART_STB_1BIT: 1 bit - \arg USART_STB_0_5BIT: 0.5 bit, not available for UARTx(x=3,4) - \arg USART_STB_2BIT: 2 bits - \arg USART_STB_1_5BIT: 1.5 bits, not available for UARTx(x=3,4) + \brief configure USART stop bit length + \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4) + \param[in] stblen: USART stop bit configure + only one parameter can be selected which is shown as below: + \arg USART_STB_1BIT: 1 bit + \arg USART_STB_0_5BIT: 0.5 bit, not available for UARTx(x=3,4) + \arg USART_STB_2BIT: 2 bits + \arg USART_STB_1_5BIT: 1.5 bits, not available for UARTx(x=3,4) \param[out] none \retval none */ @@ -192,8 +192,8 @@ void usart_enable(uint32_t usart_periph) } /*! - \brief disable USART - \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4) + \brief disable USART + \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4) \param[out] none \retval none */ @@ -214,13 +214,8 @@ void usart_disable(uint32_t usart_periph) */ void usart_transmit_config(uint32_t usart_periph, uint32_t txconfig) { - uint32_t ctl = 0U; - - ctl = USART_CTL0(usart_periph); - ctl &= ~USART_CTL0_TEN; - ctl |= txconfig; - /* configure transfer mode */ - USART_CTL0(usart_periph) = ctl; + USART_CTL0(usart_periph) &= ~(USART_CTL0_TEN); + USART_CTL0(usart_periph) |= (USART_CTL0_TEN & txconfig); } /*! @@ -235,13 +230,8 @@ void usart_transmit_config(uint32_t usart_periph, uint32_t txconfig) */ void usart_receive_config(uint32_t usart_periph, uint32_t rxconfig) { - uint32_t ctl = 0U; - - ctl = USART_CTL0(usart_periph); - ctl &= ~USART_CTL0_REN; - ctl |= rxconfig; - /* configure transfer mode */ - USART_CTL0(usart_periph) = ctl; + USART_CTL0(usart_periph) &= ~(USART_CTL0_REN); + USART_CTL0(usart_periph) |= (USART_CTL0_REN & rxconfig); } /*! @@ -349,9 +339,9 @@ void usart_receiver_timeout_threshold_config(uint32_t usart_periph, uint32_t rti \param[out] none \retval none */ -void usart_data_transmit(uint32_t usart_periph, uint32_t data) +void usart_data_transmit(uint32_t usart_periph, uint16_t data) { - USART_DATA(usart_periph) = ((uint16_t)USART_DATA_DATA & data); + USART_DATA(usart_periph) = USART_DATA_DATA & (uint32_t)data; } /*! @@ -375,7 +365,7 @@ uint16_t usart_data_receive(uint32_t usart_periph) void usart_address_config(uint32_t usart_periph, uint8_t addr) { USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDR); - USART_CTL1(usart_periph) |= (USART_CTL1_ADDR & addr); + USART_CTL1(usart_periph) |= (USART_CTL1_ADDR & (uint32_t)addr); } /*! @@ -529,15 +519,8 @@ void usart_synchronous_clock_disable(uint32_t usart_periph) */ void usart_synchronous_clock_config(uint32_t usart_periph, uint32_t clen, uint32_t cph, uint32_t cpl) { - uint32_t ctl = 0U; - - /* read USART_CTL1 register */ - ctl = USART_CTL1(usart_periph); - ctl &= ~(USART_CTL1_CLEN | USART_CTL1_CPH | USART_CTL1_CPL); - /* set CK length, CK phase, CK polarity */ - ctl |= (USART_CTL1_CLEN & clen) | (USART_CTL1_CPH & cph) | (USART_CTL1_CPL & cpl); - - USART_CTL1(usart_periph) = ctl; + USART_CTL1(usart_periph) &= ~(USART_CTL1_CLEN | USART_CTL1_CPH | USART_CTL1_CPL); + USART_CTL1(usart_periph) |= (USART_CTL1_CLEN & clen) | (USART_CTL1_CPH & cph) | (USART_CTL1_CPL & cpl); } /*! @@ -547,10 +530,10 @@ void usart_synchronous_clock_config(uint32_t usart_periph, uint32_t clen, uint32 \param[out] none \retval none */ -void usart_guard_time_config(uint32_t usart_periph,uint32_t guat) +void usart_guard_time_config(uint32_t usart_periph, uint8_t guat) { USART_GP(usart_periph) &= ~(USART_GP_GUAT); - USART_GP(usart_periph) |= (USART_GP_GUAT & ((guat)<> 8);(uint8_t)((x) >> 16) -/* audio_freq * data_size (2 bytes) * num_channels (stereo: 2) */ -#define DEFAULT_OUT_BIT_RESOLUTION 16U -#define DEFAULT_OUT_CHANNEL_NBR 2U /* mono = 1, stereo = 2 */ -#define AUDIO_OUT_PACKET (uint32_t)(((USBD_AUDIO_FREQ_16K * \ - (DEFAULT_OUT_BIT_RESOLUTION / 8U) *\ - DEFAULT_OUT_CHANNEL_NBR) / 1000U)) - -/* number of sub-packets in the audio transfer buffer. you can modify this value but always make sure +/* number of sub-packets in the audio transfer buffer. user can modify this value but always make sure that it is an even number and higher than 3 */ -#define OUT_PACKET_NUM 4U +#define OUT_PACKET_NUM 120U /* total size of the audio transfer buffer */ -#define OUT_BUF_MARGIN 4U -#define TOTAL_OUT_BUF_SIZE ((uint32_t)((AUDIO_OUT_PACKET + OUT_BUF_MARGIN) * OUT_PACKET_NUM)) +#define OUT_BUF_MARGIN 0U +#define TOTAL_OUT_BUF_SIZE ((uint32_t)((SPEAKER_OUT_PACKET + OUT_BUF_MARGIN) * OUT_PACKET_NUM)) -#define AUDIO_CONFIG_DESC_SET_LEN 109U -#define AUDIO_INTERFACE_DESC_SIZE 9U +#define AD_CONFIG_DESC_SET_LEN (sizeof(usb_desc_config_set)) +#define AD_INTERFACE_DESC_SIZE 9U -#define USB_AUDIO_DESC_SIZ 0x09U -#define AUDIO_STANDARD_EP_DESC_SIZE 0x09U -#define AUDIO_STREAMING_EP_DESC_SIZE 0x07U +#define USB_AD_DESC_SIZ 0x09U +#define AD_STANDARD_EP_DESC_SIZE 0x09U +#define AD_STREAMING_EP_DESC_SIZE 0x07U /* audio interface class code */ -#define USB_CLASS_AUDIO 0x01U +#define USB_CLASS_AUDIO 0x01U /* audio interface subclass codes */ -#define AUDIO_SUBCLASS_CONTROL 0x01U -#define AUDIO_SUBCLASS_AUDIOSTREAMING 0x02U -#define AUDIO_SUBCLASS_MIDISTREAMING 0x03U +#define AD_SUBCLASS_CONTROL 0x01U +#define AD_SUBCLASS_AUDIOSTREAMING 0x02U +#define AD_SUBCLASS_MIDISTREAMING 0x03U /* audio interface protocol codes */ -#define AUDIO_PROTOCOL_UNDEFINED 0x00U -#define AUDIO_STREAMING_GENERAL 0x01U -#define AUDIO_STREAMING_FORMAT_TYPE 0x02U +#define AD_PROTOCOL_UNDEFINED 0x00U +#define AD_STREAMING_GENERAL 0x01U +#define AD_STREAMING_FORMAT_TYPE 0x02U /* audio class-specific descriptor types */ -#define AUDIO_DESCTYPE_UNDEFINED 0x20U -#define AUDIO_DESCTYPE_DEVICE 0x21U -#define AUDIO_DESCTYPE_CONFIGURATION 0x22U -#define AUDIO_DESCTYPE_STRING 0x23U -#define AUDIO_DESCTYPE_INTERFACE 0x24U -#define AUDIO_DESCTYPE_ENDPOINT 0x25U +#define AD_DESCTYPE_UNDEFINED 0x20U +#define AD_DESCTYPE_DEVICE 0x21U +#define AD_DESCTYPE_CONFIGURATION 0x22U +#define AD_DESCTYPE_STRING 0x23U +#define AD_DESCTYPE_INTERFACE 0x24U +#define AD_DESCTYPE_ENDPOINT 0x25U /* audio control interface descriptor subtypes */ -#define AUDIO_CONTROL_HEADER 0x01U -#define AUDIO_CONTROL_INPUT_TERMINAL 0x02U -#define AUDIO_CONTROL_OUTPUT_TERMINAL 0x03U -#define AUDIO_CONTROL_MIXER_UNIT 0x04U -#define AUDIO_CONTROL_SELECTOR_UNIT 0x05U -#define AUDIO_CONTROL_FEATURE_UNIT 0x06U -#define AUDIO_CONTROL_PROCESSING_UNIT 0x07U -#define AUDIO_CONTROL_EXTENSION_UNIT 0x08U - -#define AUDIO_INPUT_TERMINAL_DESC_SIZE 0x0CU -#define AUDIO_OUTPUT_TERMINAL_DESC_SIZE 0x09U -#define AUDIO_STREAMING_INTERFACE_DESC_SIZE 0x07U - -#define AUDIO_CONTROL_MUTE 0x0001U - -#define AUDIO_FORMAT_TYPE_I 0x01U -#define AUDIO_FORMAT_TYPE_III 0x03U - -#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01U -#define AUDIO_ENDPOINT_GENERAL 0x01U - -#define AUDIO_REQ_GET_CUR 0x81U -#define AUDIO_REQ_SET_CUR 0x01U - -#define AUDIO_OUT_STREAMING_CTRL 0x02U - -#define PACKET_SIZE(freq) (((freq) * 2U) * 2U / 1000U) - -#define AUDIO_PACKET_SIZE(frq) (uint8_t)(PACKET_SIZE(frq) & 0xFFU), \ - (uint8_t)((PACKET_SIZE(frq) >> 8U) & 0xFFU) - -#define SAMPLE_FREQ(frq) (uint8_t)(frq), (uint8_t)((frq) >> 8U), \ - (uint8_t)((frq) >> 16U) +#define AD_CONTROL_HEADER 0x01U +#define AD_CONTROL_INPUT_TERMINAL 0x02U +#define AD_CONTROL_OUTPUT_TERMINAL 0x03U +#define AD_CONTROL_MIXER_UNIT 0x04U +#define AD_CONTROL_SELECTOR_UNIT 0x05U +#define AD_CONTROL_FEATURE_UNIT 0x06U +#define AD_CONTROL_PROCESSING_UNIT 0x07U +#define AD_CONTROL_EXTENSION_UNIT 0x08U + +#define AD_INPUT_TERMINAL_DESC_SIZE 0x0CU +#define AD_OUTPUT_TERMINAL_DESC_SIZE 0x09U +#define AD_STREAMING_INTERFACE_DESC_SIZE 0x07U + +#define AD_CONTROL_MUTE 0x01U +#define AD_CONTROL_VOLUME 0x02U + +#define AD_FORMAT_TYPE_I 0x01U +#define AD_FORMAT_TYPE_III 0x03U + +#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01U +#define AD_ENDPOINT_GENERAL 0x01U + +#define AD_REQ_UNDEFINED 0x00U +#define AD_REQ_SET_CUR 0x01U +#define AD_REQ_GET_CUR 0x81U +#define AD_REQ_SET_MIN 0x02U +#define AD_REQ_GET_MIN 0x82U +#define AD_REQ_SET_MAX 0x03U +#define AD_REQ_GET_MAX 0x83U +#define AD_REQ_SET_RES 0x04U +#define AD_REQ_GET_RES 0x84U +#define AD_REQ_SET_MEM 0x05U +#define AD_REQ_GET_MEM 0x85U +#define AD_REQ_GET_STAT 0xFFU + +#define AD_OUT_STREAMING_CTRL 0x02U +#define AD_IN_STREAMING_CTRL 0x05U + +/* audio stream interface number */ +enum +{ + SPEAK_INTERFACE_COUNT, + CONFIG_DESC_AS_ITF_COUNT, +}; +#define AC_ITF_TOTAL_LEN (sizeof(usb_desc_AC_itf) + CONFIG_DESC_AS_ITF_COUNT*(sizeof(usb_desc_input_terminal) + \ + sizeof(usb_desc_mono_feature_unit) + sizeof(usb_desc_output_terminal))) #pragma pack(1) @@ -246,6 +253,12 @@ typedef struct uint8_t* isoc_out_wrptr; uint8_t* isoc_out_rdptr; + uint16_t buf_free_size; + uint16_t dam_tx_len; + + /* usb receive buffer */ + uint8_t usb_rx_buffer[SPEAKER_OUT_MAX_PACKET]; + /* main buffer for audio control requests transfers and its relative variables */ uint8_t audioctl[64]; uint8_t audioctl_unit; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Include/audio_out_itf.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Include/audio_out_itf.h index 74835503..d325093a 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Include/audio_out_itf.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Include/audio_out_itf.h @@ -3,10 +3,11 @@ \brief audio OUT (playback) interface header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -37,38 +38,10 @@ OF SUCH DAMAGE. #include "usbd_conf.h" -/* audio commands enumeration */ -typedef enum -{ - AUDIO_CMD_PLAY = 1U, - AUDIO_CMD_PAUSE, - AUDIO_CMD_STOP, -}audio_cmd_enum; - -/* mute commands */ -#define AUDIO_MUTE 0x01U -#define AUDIO_UNMUTE 0x00U - -/* functions return value */ -#define AUDIO_OK 0x00U -#define AUDIO_FAIL 0xFFU - -/* audio machine states */ -#define AUDIO_STATE_INACTIVE 0x00U -#define AUDIO_STATE_ACTIVE 0x01U -#define AUDIO_STATE_PLAYING 0x02U -#define AUDIO_STATE_PAUSED 0x03U -#define AUDIO_STATE_STOPPED 0x04U -#define AUDIO_STATE_ERROR 0x05U - typedef struct { - uint8_t (*audio_init) (uint32_t audio_freq, uint32_t volume, uint32_t options); + uint8_t (*audio_init) (uint32_t audio_freq, uint32_t volume); uint8_t (*audio_deinit) (uint32_t options); uint8_t (*audio_cmd) (uint8_t* pbuf, uint32_t size, uint8_t cmd); - uint8_t (*audio_volume_ctl) (uint8_t vol); - uint8_t (*audio_mute_ctl) (uint8_t cmd); - uint8_t (*audio_periodic_tc) (uint8_t cmd); - uint8_t (*audio_state_get) (void); } audio_fops_struct; extern audio_fops_struct audio_out_fops; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Source/audio_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Source/audio_core.c index e491ec27..40248076 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Source/audio_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Source/audio_core.c @@ -3,10 +3,11 @@ \brief USB audio device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -35,20 +36,29 @@ OF SUCH DAMAGE. #include "usbd_transc.h" #include "audio_out_itf.h" #include "audio_core.h" + #include #define USBD_VID 0x28E9U #define USBD_PID 0x9574U +#define VOL_MIN 0U /* volume minimum value */ +#define VOL_MAX 100U /* volume maximum value */ +#define VOL_RES 1U /* volume resolution */ +#define VOL_0dB 70U /* 0dB is in the middle of VOL_MIN and VOL_MAX */ + /* local function prototypes ('static') */ -static uint8_t usbd_audio_sof (usb_dev *udev); +static uint8_t audio_sof (usb_dev *udev); static uint8_t audio_init (usb_dev *udev, uint8_t config_index); static uint8_t audio_deinit (usb_dev *udev, uint8_t config_index); static uint8_t audio_req_handler (usb_dev *udev, usb_req *req); static uint8_t audio_ctlx_out (usb_dev *udev); static void audio_data_out (usb_dev *udev, uint8_t ep_num); -usb_class audio_class = { +static void audio_set_itf (usb_dev *udev, usb_req *req); + +usb_class audio_class = +{ .init = audio_init, .deinit = audio_deinit, .req_process = audio_req_handler, @@ -58,7 +68,7 @@ usb_class audio_class = { usbd_int_cb_struct usb_inthandler = { - usbd_audio_sof, + audio_sof, }; /* note:it should use the c99 standard when compiling the below codes */ @@ -94,8 +104,8 @@ usb_desc_config_set audio_config_set = .bLength = sizeof(usb_desc_config), .bDescriptorType = USB_DESCTYPE_CONFIG }, - .wTotalLength = AUDIO_CONFIG_DESC_SET_LEN, - .bNumInterfaces = 0x02U, + .wTotalLength = AD_CONFIG_DESC_SET_LEN, + .bNumInterfaces = 0x01U + CONFIG_DESC_AS_ITF_COUNT, .bConfigurationValue = 0x01U, .iConfiguration = 0x00U, .bmAttributes = 0xC0U, @@ -113,8 +123,8 @@ usb_desc_config_set audio_config_set = .bAlternateSetting = 0x00U, .bNumEndpoints = 0x00U, .bInterfaceClass = USB_CLASS_AUDIO, - .bInterfaceSubClass = AUDIO_SUBCLASS_CONTROL, - .bInterfaceProtocol = AUDIO_PROTOCOL_UNDEFINED, + .bInterfaceSubClass = AD_SUBCLASS_CONTROL, + .bInterfaceProtocol = AD_PROTOCOL_UNDEFINED, .iInterface = 0x00U }, @@ -123,12 +133,12 @@ usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_AC_itf), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, .bDescriptorSubtype = 0x01U, .bcdADC = 0x0100U, - .wTotalLength = 0x0027U, - .bInCollection = 0x01U, + .wTotalLength = AC_ITF_TOTAL_LEN, + .bInCollection = CONFIG_DESC_AS_ITF_COUNT, .baInterfaceNr = 0x01U }, @@ -137,13 +147,13 @@ usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_input_terminal), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = 0x02U, + .bDescriptorSubtype = AD_CONTROL_INPUT_TERMINAL, .bTerminalID = 0x01U, .wTerminalType = 0x0101U, .bAssocTerminal = 0x00U, - .bNrChannels = 0x01U, + .bNrChannels = 0x02U, .wChannelConfig = 0x0000U, .iChannelNames = 0x00U, .iTerminal = 0x00U @@ -154,13 +164,13 @@ usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_mono_feature_unit), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_CONTROL_FEATURE_UNIT, - .bUnitID = AUDIO_OUT_STREAMING_CTRL, + .bDescriptorSubtype = AD_CONTROL_FEATURE_UNIT, + .bUnitID = AD_OUT_STREAMING_CTRL, .bSourceID = 0x01U, .bControlSize = 0x01U, - .bmaControls0 = AUDIO_CONTROL_MUTE, + .bmaControls0 = AD_CONTROL_MUTE | AD_CONTROL_VOLUME, .bmaControls1 = 0x00U, .iFeature = 0x00U }, @@ -170,9 +180,9 @@ usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_output_terminal), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_CONTROL_OUTPUT_TERMINAL, + .bDescriptorSubtype = AD_CONTROL_OUTPUT_TERMINAL, .bTerminalID = 0x03U, .wTerminalType = 0x0301U, .bAssocTerminal = 0x00U, @@ -191,8 +201,8 @@ usb_desc_config_set audio_config_set = .bAlternateSetting = 0x00U, .bNumEndpoints = 0x00U, .bInterfaceClass = USB_CLASS_AUDIO, - .bInterfaceSubClass = AUDIO_SUBCLASS_AUDIOSTREAMING, - .bInterfaceProtocol = AUDIO_PROTOCOL_UNDEFINED, + .bInterfaceSubClass = AD_SUBCLASS_AUDIOSTREAMING, + .bInterfaceProtocol = AD_PROTOCOL_UNDEFINED, .iInterface = 0x00U }, @@ -207,8 +217,8 @@ usb_desc_config_set audio_config_set = .bAlternateSetting = 0x01U, .bNumEndpoints = 0x01U, .bInterfaceClass = USB_CLASS_AUDIO, - .bInterfaceSubClass = AUDIO_SUBCLASS_AUDIOSTREAMING, - .bInterfaceProtocol = AUDIO_PROTOCOL_UNDEFINED, + .bInterfaceSubClass = AD_SUBCLASS_AUDIOSTREAMING, + .bInterfaceProtocol = AD_PROTOCOL_UNDEFINED, .iInterface = 0x00U }, @@ -217,9 +227,9 @@ usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_AS_itf), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_STREAMING_GENERAL, + .bDescriptorSubtype = AD_STREAMING_GENERAL, .bTerminalLink = 0x01U, .bDelay = 0x01U, .wFormatTag = 0x0001U, @@ -230,17 +240,17 @@ usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_format_type), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_STREAMING_FORMAT_TYPE, - .bFormatType = AUDIO_FORMAT_TYPE_III, - .bNrChannels = 0x02U, + .bDescriptorSubtype = AD_STREAMING_FORMAT_TYPE, + .bFormatType = AD_FORMAT_TYPE_III, + .bNrChannels = SPEAKER_OUT_CHANNEL_NBR, .bSubFrameSize = 0x02U, - .bBitResolution = 0x10U, + .bBitResolution = SPEAKER_OUT_BIT_RESOLUTION, .bSamFreqType = 0x01U, - .bSamFreq[0] = (uint8_t)USBD_AUDIO_FREQ_16K, - .bSamFreq[1] = USBD_AUDIO_FREQ_16K >> 8, - .bSamFreq[2] = USBD_AUDIO_FREQ_16K >> 16 + .bSamFreq[0] = (uint8_t)USBD_SPEAKER_FREQ, + .bSamFreq[1] = USBD_SPEAKER_FREQ >> 8, + .bSamFreq[2] = USBD_SPEAKER_FREQ >> 16 }, .std_endpoint = @@ -250,9 +260,9 @@ usb_desc_config_set audio_config_set = .bLength = sizeof(usb_desc_std_ep), .bDescriptorType = USB_DESCTYPE_EP }, - .bEndpointAddress = AUDIO_OUT_EP, + .bEndpointAddress = AD_OUT_EP, .bmAttributes = USB_ENDPOINT_TYPE_ISOCHRONOUS, - .wMaxPacketSize = PACKET_SIZE(USBD_AUDIO_FREQ_16K), + .wMaxPacketSize = SPEAKER_OUT_PACKET, .bInterval = 0x01U, .bRefresh = 0x00U, .bSynchAddress = 0x00U @@ -263,9 +273,9 @@ usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_AS_ep), - .bDescriptorType = AUDIO_DESCTYPE_ENDPOINT + .bDescriptorType = AD_DESCTYPE_ENDPOINT }, - .bDescriptorSubtype = AUDIO_ENDPOINT_GENERAL, + .bDescriptorSubtype = AD_ENDPOINT_GENERAL, .bmAttributes = 0x00U, .bLockDelayUnits = 0x00U, .wLockDelay = 0x0000U, @@ -331,7 +341,6 @@ usb_desc audio_desc = { .strings = usbd_audio_strings }; - /*! \brief initialize the audio device \param[in] udev: pointer to USB device instance @@ -356,7 +365,7 @@ static uint8_t audio_init (usb_dev *udev, uint8_t config_index) }; /* initialize RX endpoint */ - usbd_ep_init(udev, EP_BUF_DBL, AUDIO_BUF_ADDR, &ep); + usbd_ep_init(udev, EP_BUF_DBL, AD_BUF_ADDR, &ep); usbd_int_fops = &usb_inthandler; @@ -364,16 +373,16 @@ static uint8_t audio_init (usb_dev *udev, uint8_t config_index) audio_handler.isoc_out_wrptr = audio_handler.isoc_out_buff; /* initialize the audio output hardware layer */ - if (USBD_OK != audio_out_fops.audio_init(USBD_AUDIO_FREQ_16K, DEFAULT_VOLUME, 0U)) { + if (USBD_OK != audio_out_fops.audio_init(USBD_SPEAKER_FREQ, DEFAULT_VOLUME)) { return USBD_FAIL; } - udev->ep_transc[AUDIO_OUT_EP][TRANSC_OUT] = audio_class.data_out; + udev->ep_transc[AD_OUT_EP][TRANSC_OUT] = audio_class.data_out; /* prepare out endpoint to receive audio data */ - usbd_ep_recev (udev, AUDIO_OUT_EP, (uint8_t*)audio_handler.isoc_out_buff, (uint16_t)AUDIO_OUT_PACKET); + usbd_ep_recev (udev, AD_OUT_EP, (uint8_t*)audio_handler.usb_rx_buffer, SPEAKER_OUT_MAX_PACKET); - udev->class_data[USBD_AUDIO_INTERFACE] = (void *)&audio_handler; + udev->class_data[USBD_AD_INTERFACE] = (void *)&audio_handler; return USBD_OK; } @@ -388,7 +397,7 @@ static uint8_t audio_init (usb_dev *udev, uint8_t config_index) static uint8_t audio_deinit (usb_dev *udev, uint8_t config_index) { /* deinitialize audio endpoints */ - usbd_ep_deinit(udev, AUDIO_OUT_EP); + usbd_ep_deinit(udev, AD_OUT_EP); /* deinitialize the audio output hardware layer */ if (USBD_OK != audio_out_fops.audio_deinit(0U)) { @@ -409,20 +418,24 @@ static uint8_t audio_req_handler (usb_dev *udev, usb_req *req) { uint8_t status = REQ_NOTSUPP; - usbd_audio_handler *audio = (usbd_audio_handler *)udev->class_data[USBD_AUDIO_INTERFACE]; + usbd_audio_handler *audio = (usbd_audio_handler *)udev->class_data[USBD_AD_INTERFACE]; switch (req->bRequest) { - case AUDIO_REQ_GET_CUR: + case USB_SET_INTERFACE: + audio_set_itf(udev, req); + break; + + case AD_REQ_GET_CUR: usb_transc_config(&udev->transc_in[0], audio->audioctl, req->wLength, 0U); status = REQ_SUPP; break; - case AUDIO_REQ_SET_CUR: + case AD_REQ_SET_CUR: if (req->wLength) { usb_transc_config(&udev->transc_out[0], audio->audioctl, req->wLength, 0U); - udev->class_core->req_cmd = AUDIO_REQ_SET_CUR; + udev->class_core->req_cmd = AD_REQ_SET_CUR; audio->audioctl_len = req->wLength; audio->audioctl_unit = BYTE_HIGH(req->wIndex); @@ -431,6 +444,27 @@ static uint8_t audio_req_handler (usb_dev *udev, usb_req *req) } break; + case AD_REQ_GET_MIN: + audio->audioctl[0] = VOL_MIN; + usb_transc_config(&udev->transc_in[0], audio->audioctl, req->wLength, 0U); + + status = REQ_SUPP; + break; + + case AD_REQ_GET_MAX: + audio->audioctl[0] = VOL_MAX; + usb_transc_config(&udev->transc_in[0], audio->audioctl, req->wLength, 0U); + + status = REQ_SUPP; + break; + + case AD_REQ_GET_RES: + audio->audioctl[0] = VOL_RES; + usb_transc_config(&udev->transc_in[0], audio->audioctl, req->wLength, 0U); + + status = REQ_SUPP; + break; + default: break; } @@ -438,6 +472,36 @@ static uint8_t audio_req_handler (usb_dev *udev, usb_req *req) return status; } +/*! + \brief handle the audio set interface requests + \param[in] udev: pointer to USB device instance + \param[in] req: device class-specific request + \param[out] none + \retval USB device operation status +*/ +static void audio_set_itf(usb_dev *udev, usb_req *req) +{ + usbd_audio_handler *audio = (usbd_audio_handler *)udev->class_data[USBD_AD_INTERFACE]; + + if (0xFF != req->wValue){ + if (0 != req->wValue){ + /* deinit audio handler */ + memset((void *)audio, 0, sizeof(usbd_audio_handler)); + + audio->play_flag = 0; + audio->isoc_out_rdptr = audio->isoc_out_buff; + audio->isoc_out_wrptr = audio->isoc_out_buff; + } else { + /* stop audio output */ + audio_out_fops.audio_cmd(audio->isoc_out_rdptr, SPEAKER_OUT_PACKET / 2, AD_CMD_STOP); + + audio->play_flag = 0; + audio->isoc_out_rdptr = audio->isoc_out_buff; + audio->isoc_out_wrptr = audio->isoc_out_buff; + } + } +} + /*! \brief handles the audio out data stage \param[in] udev: pointer to USB device instance @@ -447,25 +511,74 @@ static uint8_t audio_req_handler (usb_dev *udev, usb_req *req) */ static void audio_data_out (usb_dev *udev, uint8_t ep_num) { - usbd_audio_handler *audio = (usbd_audio_handler *)udev->class_data[USBD_AUDIO_INTERFACE]; + usbd_audio_handler *audio = (usbd_audio_handler *)udev->class_data[USBD_AD_INTERFACE]; - if (AUDIO_OUT_EP == ep_num) { - /* increment the Buffer pointer or roll it back when all buffers are full */ - if (audio->isoc_out_wrptr >= (audio->isoc_out_buff + (AUDIO_OUT_PACKET * OUT_PACKET_NUM))) { - /* all buffers are full: roll back */ - audio->isoc_out_wrptr = audio->isoc_out_buff; + if (AD_OUT_EP == ep_num) { + uint16_t usb_rx_length, tail_len; + + /* get receive length */ + usb_rx_length = udev->transc_out[ep_num].xfer_count; + + if (audio->isoc_out_wrptr >= audio->isoc_out_rdptr) { + audio->buf_free_size = TOTAL_OUT_BUF_SIZE + audio->isoc_out_rdptr - audio->isoc_out_wrptr; } else { - /* increment the buffer pointer */ - audio->isoc_out_wrptr += AUDIO_OUT_PACKET; + audio->buf_free_size = audio->isoc_out_rdptr - audio->isoc_out_wrptr; + } + + /* free buffer enough to save rx data */ + if (audio->buf_free_size > usb_rx_length) { + if (audio->isoc_out_wrptr >= audio->isoc_out_rdptr) { + tail_len = audio->isoc_out_buff + TOTAL_OUT_BUF_SIZE - audio->isoc_out_wrptr; + + if(tail_len >= usb_rx_length){ + memcpy(audio->isoc_out_wrptr, audio->usb_rx_buffer, usb_rx_length); + + /* increment the buffer pointer */ + audio->isoc_out_wrptr += usb_rx_length; + + /* increment the Buffer pointer or roll it back when all buffers are full */ + if (audio->isoc_out_wrptr >= (audio->isoc_out_buff + TOTAL_OUT_BUF_SIZE)) { + /* all buffers are full: roll back */ + audio->isoc_out_wrptr = audio->isoc_out_buff; + } + } else { + memcpy(audio->isoc_out_wrptr, audio->usb_rx_buffer, tail_len); + + /* adjust write pointer */ + audio->isoc_out_wrptr = audio->isoc_out_buff; + + memcpy(audio->isoc_out_wrptr, &audio->usb_rx_buffer[tail_len], usb_rx_length - tail_len); + + /* adjust write pointer */ + audio->isoc_out_wrptr += usb_rx_length - tail_len; + } + } else { + memcpy(audio->isoc_out_wrptr, audio->usb_rx_buffer, usb_rx_length); + + /* increment the buffer pointer */ + audio->isoc_out_wrptr += usb_rx_length; + } } /* prepare out endpoint to receive next audio packet */ - usbd_ep_recev (udev, AUDIO_OUT_EP, (uint8_t*)(audio->isoc_out_wrptr), (uint16_t)AUDIO_OUT_PACKET); + usbd_ep_recev (udev, AD_OUT_EP, audio->usb_rx_buffer, SPEAKER_OUT_MAX_PACKET); - /* trigger the start of streaming only when half buffer is full */ - if ((0U == audio->play_flag) && (audio->isoc_out_wrptr >= (audio->isoc_out_buff + ((AUDIO_OUT_PACKET * OUT_PACKET_NUM) / 2U)))) { + if (audio->isoc_out_wrptr >= audio->isoc_out_rdptr) { + audio->buf_free_size = TOTAL_OUT_BUF_SIZE + audio->isoc_out_rdptr - audio->isoc_out_wrptr; + } else { + audio->buf_free_size = audio->isoc_out_rdptr - audio->isoc_out_wrptr; + } + + if ((0U == audio->play_flag) && (audio->buf_free_size < TOTAL_OUT_BUF_SIZE / 2)) { /* enable start of streaming */ audio->play_flag = 1U; + + /* initialize the audio output hardware layer */ + if (USBD_OK != audio_out_fops.audio_cmd(audio->isoc_out_rdptr, SPEAKER_OUT_MAX_PACKET / 2, AD_CMD_PLAY)) { + return; + } + + audio->dam_tx_len = SPEAKER_OUT_MAX_PACKET; } } } @@ -478,19 +591,16 @@ static void audio_data_out (usb_dev *udev, uint8_t ep_num) */ static uint8_t audio_ctlx_out (usb_dev *udev) { - usbd_audio_handler *audio = (usbd_audio_handler *)udev->class_data[USBD_AUDIO_INTERFACE]; + usbd_audio_handler *audio = (usbd_audio_handler *)udev->class_data[USBD_AD_INTERFACE]; /* check if an audio_control request has been issued */ - if (AUDIO_REQ_SET_CUR == udev->class_core->req_cmd) { + if (AD_REQ_SET_CUR == udev->class_core->req_cmd) { /* in this driver, to simplify code, only SET_CUR request is managed */ /* check for which addressed unit the audio_control request has been issued */ - if (AUDIO_OUT_STREAMING_CTRL == audio->audioctl_unit) { + if (AD_OUT_STREAMING_CTRL == audio->audioctl_unit) { /* in this driver, to simplify code, only one unit is manage */ - /* call the audio interface mute function */ - audio_out_fops.audio_mute_ctl(audio->audioctl[0]); - /* reset the audioctl_cmd variable to prevent re-entering this function */ udev->class_core->req_cmd = 0U; @@ -507,43 +617,7 @@ static uint8_t audio_ctlx_out (usb_dev *udev) \param[out] none \retval USB device operation status */ -static uint8_t usbd_audio_sof (usb_dev *udev) +static uint8_t audio_sof (usb_dev *udev) { - usbd_audio_handler *audio = (usbd_audio_handler *)udev->class_data[USBD_AUDIO_INTERFACE]; - - /* check if there are available data in stream buffer. - in this function, a single variable (play_flag) is used to avoid software delays. - the play operation must be executed as soon as possible after the SOF detection. */ - if (audio->play_flag) { - /* start playing received packet */ - audio_out_fops.audio_cmd((uint8_t*)(audio->isoc_out_rdptr), /* samples buffer pointer */ - AUDIO_OUT_PACKET, /* number of samples in Bytes */ - AUDIO_CMD_PLAY); /* command to be processed */ - - /* increment the Buffer pointer or roll it back when all buffers all full */ - if (audio->isoc_out_rdptr >= (audio->isoc_out_buff + (AUDIO_OUT_PACKET * OUT_PACKET_NUM))) { - /* roll back to the start of buffer */ - audio->isoc_out_rdptr = audio->isoc_out_buff; - } else { - /* increment to the next sub-buffer */ - audio->isoc_out_rdptr += AUDIO_OUT_PACKET; - } - - /* if all available buffers have been consumed, stop playing */ - if (audio->isoc_out_rdptr == audio->isoc_out_wrptr) { - /* pause the audio stream */ - audio_out_fops.audio_cmd((uint8_t*)(audio->isoc_out_buff), /* samples buffer pointer */ - AUDIO_OUT_PACKET, /* number of samples in Bytes */ - AUDIO_CMD_PAUSE); /* command to be processed */ - - /* stop entering play loop */ - audio->play_flag = 0U; - - /* reset buffer pointers */ - audio->isoc_out_rdptr = audio->isoc_out_buff; - audio->isoc_out_wrptr = audio->isoc_out_buff; - } - } - return USBD_OK; } diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Source/audio_out_itf.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Source/audio_out_itf.c index 1bb07e82..4604a675 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Source/audio_out_itf.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/audio/Source/audio_out_itf.c @@ -3,10 +3,11 @@ \brief audio OUT (playback) interface functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -36,70 +37,63 @@ OF SUCH DAMAGE. #include "audio_out_itf.h" /* local function prototypes ('static') */ -static uint8_t init (uint32_t audio_freq, uint32_t volume, uint32_t options); +static uint8_t init (uint32_t audio_freq, uint32_t volume); static uint8_t deinit (uint32_t options); static uint8_t audio_cmd (uint8_t* pbuf, uint32_t size, uint8_t cmd); -static uint8_t volume_ctl (uint8_t vol); -static uint8_t mute_ctl (uint8_t cmd); -static uint8_t periodic_tc (uint8_t cmd); -static uint8_t get_state (void); audio_fops_struct audio_out_fops = { - init, - deinit, - audio_cmd, - volume_ctl, - mute_ctl, - periodic_tc, - get_state + .audio_init = init, + .audio_deinit = deinit, + .audio_cmd = audio_cmd, }; -static uint8_t audio_state = AUDIO_STATE_INACTIVE; +static uint8_t audio_state = AD_STATE_INACTIVE; /*! \brief initialize and configures all required resources for audio play function \param[in] audio_freq: statrt_up audio frequency \param[in] volume: start_up volume to be set - \param[in] options: specific options passed to low layer function \param[out] none - \retval AUDIO_OK if all operations succeed, otherwise, AUDIO_FAIL. + \retval AD_OK if all operations succeed, otherwise, AD_FAIL. */ -static uint8_t init (uint32_t audio_freq, uint32_t volume, uint32_t options) +static uint8_t init (uint32_t audio_freq, uint32_t volume) { static uint32_t initialized = 0U; /* check if the low layer has already been initialized */ if (0U == initialized) { - /* call low layer function */ - if (0U != eval_audio_init(OUTPUT_DEVICE_AUTO, volume, audio_freq)) { - audio_state = AUDIO_STATE_ERROR; + /* initialize GPIO */ + codec_gpio_init(); - return AUDIO_FAIL; - } + /* initialize i2s */ + codec_audio_interface_init(audio_freq); + + /* initialize DMA */ + codec_i2s_dma_init(); /* set the initialization flag to prevent reinitializing the interface again */ initialized = 1U; } /* update the audio state machine */ - audio_state = AUDIO_STATE_ACTIVE; + audio_state = AD_STATE_ACTIVE; - return AUDIO_OK; + return AD_OK; } /*! \brief free all resources used by low layer and stops audio-play function \param[in] options: specific options passed to low layer function \param[out] none - \retval AUDIO_OK if all operations succeed, otherwise, AUDIO_FAIL. + \retval AD_OK if all operations succeed, otherwise, AD_FAIL. */ static uint8_t deinit (uint32_t options) { /* update the audio state machine */ - audio_state = AUDIO_STATE_INACTIVE; + audio_state = AD_STATE_INACTIVE; - return AUDIO_OK; + return AD_OK; } /*! @@ -107,136 +101,70 @@ static uint8_t deinit (uint32_t options) \param[in] pbuf: address from which file should be played \param[in] size: size of the current buffer/file \param[in] cmd: command to be executed, can be: - \arg AUDIO_CMD_PLAY - \arg AUDIO_CMD_PAUSE - \arg AUDIO_CMD_RESUME - \arg AUDIO_CMD_STOP + \arg AD_CMD_PLAY + \arg AD_CMD_PAUSE + \arg AD_CMD_RESUME + \arg AD_CMD_STOP \param[out] none - \retval AUDIO_OK if all operations succeed, otherwise, AUDIO_FAIL. + \retval AD_OK if all operations succeed, otherwise, AD_FAIL. */ static uint8_t audio_cmd (uint8_t* pbuf, uint32_t size, uint8_t cmd) { - uint8_t status = AUDIO_OK; - /* check the current state */ - if ((AUDIO_STATE_INACTIVE == audio_state) || (AUDIO_STATE_ERROR == audio_state)) { - audio_state = AUDIO_STATE_ERROR; + if ((AD_STATE_INACTIVE == audio_state) || (AD_STATE_ERROR == audio_state)) { + audio_state = AD_STATE_ERROR; - return AUDIO_FAIL; + return AD_FAIL; } switch (cmd) { - /* process the play command */ - case AUDIO_CMD_PLAY: - /* if current state is active or stopped */ - if ((AUDIO_STATE_ACTIVE == audio_state) || \ - (AUDIO_STATE_STOPPED == audio_state) || \ - (AUDIO_STATE_PLAYING == audio_state)) { - audio_mal_play((uint32_t)pbuf, (size / 2U)); - audio_state = AUDIO_STATE_PLAYING; - } else if (AUDIO_STATE_PAUSED == audio_state) { - if (eval_audio_pause_resume(AUDIO_RESUME, (uint32_t)pbuf, (size / 2U))) { - audio_state = AUDIO_STATE_ERROR; - - status = AUDIO_FAIL; - } else { - audio_state = AUDIO_STATE_PLAYING; - } - } else { - status = AUDIO_FAIL; - } - break; - - /* process the stop command */ - case AUDIO_CMD_STOP: - if (AUDIO_STATE_PLAYING != audio_state) { - /* unsupported command */ - status = AUDIO_FAIL; - } else if (eval_audio_stop(CODEC_PDWN_SW)) { - audio_state = AUDIO_STATE_ERROR; - - status = AUDIO_FAIL; - } else { - audio_state = AUDIO_STATE_STOPPED; - } - break; - - /* process the pause command */ - case AUDIO_CMD_PAUSE: - if (AUDIO_STATE_PLAYING != audio_state) { - /* unsupported command */ - status = AUDIO_FAIL; - } else if (eval_audio_pause_resume(AUDIO_PAUSE, (uint32_t)pbuf, (size / 2U))) { - audio_state = AUDIO_STATE_ERROR; - - status = AUDIO_FAIL; - } else { - audio_state = AUDIO_STATE_PAUSED; - } - break; - - /* unsupported command */ - default: - break; - } - - return status; -} + /* process the play command */ + case AD_CMD_PLAY: + /* if current state is active or stopped */ + if ((AD_STATE_ACTIVE == audio_state) || \ + (AD_STATE_STOPPED == audio_state) || \ + (AD_STATE_PLAYING == audio_state)) { + audio_play((uint32_t)pbuf, size); + audio_state = AD_STATE_PLAYING; + + return AD_OK; + } else if (AD_STATE_PAUSED == audio_state) { + audio_pause_resume(AD_RESUME, (uint32_t)pbuf, (size/2)); + audio_state = AD_STATE_PLAYING; + + return AD_OK; + } else { + return AD_FAIL; + } -/*! - \brief set the volume level - \param[in] vol: volume level to be set in % (from 0% to 100%) - \param[out] none - \retval AUDIO_OK if all operations succeed, otherwise, AUDIO_FAIL. -*/ -static uint8_t volume_ctl (uint8_t vol) -{ - /* call low layer volume setting function */ - if (eval_audio_volume_ctl(vol)) { - audio_state = AUDIO_STATE_ERROR; + /* process the stop command */ + case AD_CMD_STOP: + if (AD_STATE_PLAYING != audio_state) { + /* unsupported command */ + return AD_FAIL; + } else { + audio_stop(); + audio_state = AD_STATE_STOPPED; - return AUDIO_FAIL; - } + return AD_OK; + } - return AUDIO_OK; -} + /* process the pause command */ + case AD_CMD_PAUSE: + if (AD_STATE_PLAYING != audio_state) { + /* unsupported command */ + return AD_FAIL; + } else { + audio_pause_resume(AD_PAUSE, (uint32_t)pbuf, (size/2)); + audio_state = AD_STATE_PAUSED; -/*! - \brief mute or unmute the audio current output - \param[in] cmd: can be 0 to unmute, or 1 to mute - \param[out] none - \retval AUDIO_OK if all operations succeed, otherwise, AUDIO_FAIL. -*/ -static uint8_t mute_ctl (uint8_t cmd) -{ - /* call low layer mute setting function */ - if (eval_audio_mute((uint32_t)cmd)) { - audio_state = AUDIO_STATE_ERROR; + return AD_OK; + } - return AUDIO_FAIL; + /* unsupported command */ + default: + break; } - return AUDIO_OK; -} - -/*! - \brief periodic transfer control - \param[in] cmd: command - \param[out] none - \retval AUDIO_OK if all operations succeed, otherwise, AUDIO_FAIL. -*/ -static uint8_t periodic_tc (uint8_t cmd) -{ - return AUDIO_OK; -} - -/*! - \brief return the current state of the audio machine - \param[in] none - \param[out] none - \retval AUDIO_OK if all operations succeed, otherwise, AUDIO_FAIL. -*/ -static uint8_t get_state (void) -{ - return audio_state; + return AD_FAIL; } diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/cdc/Include/cdc_acm_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/cdc/Include/cdc_acm_core.h index d5576d2b..2ac1e6fb 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/cdc/Include/cdc_acm_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/cdc/Include/cdc_acm_core.h @@ -3,10 +3,11 @@ \brief the header file of cdc acm driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/cdc/Source/cdc_acm_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/cdc/Source/cdc_acm_core.c index 9d3fb187..bed08823 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/cdc/Source/cdc_acm_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/cdc/Source/cdc_acm_core.c @@ -3,10 +3,11 @@ \brief CDC ACM driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -278,7 +279,7 @@ usb_class cdc_class = { \brief receive CDC ACM data \param[in] udev: pointer to USB device instance \param[out] none - \retval USB device operation status + \retval none */ void cdc_acm_data_receive(usb_dev *udev) { @@ -294,7 +295,7 @@ void cdc_acm_data_receive(usb_dev *udev) \brief send CDC ACM data \param[in] udev: pointer to USB device instance \param[out] none - \retval USB device operation status + \retval none */ void cdc_acm_data_send (usb_dev *udev) { @@ -367,7 +368,7 @@ static uint8_t cdc_acm_init (usb_dev *udev, uint8_t config_index) } /*! - \brief de-initialize the CDC ACM device + \brief deinitialize the CDC ACM device \param[in] udev: pointer to USB device instance \param[in] config_index: configuration index \param[out] none @@ -405,13 +406,12 @@ static uint8_t cdc_acm_ctlx_out (usb_dev *udev) return USBD_OK; } - /*! \brief handle CDC ACM data in transaction \param[in] udev: pointer to USB device instance \param[in] ep_num: endpoint number \param[out] none - \retval USB device operation status + \retval none */ static void cdc_acm_data_in (usb_dev *udev, uint8_t ep_num) { @@ -431,7 +431,7 @@ static void cdc_acm_data_in (usb_dev *udev, uint8_t ep_num) \param[in] udev: pointer to USB device instance \param[in] ep_num: endpoint number \param[out] none - \retval USB device operation status + \retval none */ static void cdc_acm_data_out (usb_dev *udev, uint8_t ep_num) { diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Include/dfu_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Include/dfu_core.h index 113259cd..b157043b 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Include/dfu_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Include/dfu_core.h @@ -3,10 +3,11 @@ \brief the header file of USB DFU device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -85,7 +86,8 @@ OF SUCH DAMAGE. #define DFU_DESC_TYPE 0x21U /* DFU device state enumeration */ -typedef enum { +typedef enum +{ STATE_APP_IDLE = 0x00U, STATE_APP_DETACH, STATE_DFU_IDLE, @@ -100,7 +102,8 @@ typedef enum { } dfu_state; /* DFU device status enumeration */ -typedef enum { +typedef enum +{ STATUS_OK = 0x00U, STATUS_ERR_TARGET, STATUS_ERR_FILE, @@ -120,7 +123,8 @@ typedef enum { } dfu_status; /* DFU class-specific requests enumeration */ -typedef enum { +typedef enum +{ DFU_DETACH = 0U, DFU_DNLOAD, DFU_UPLOAD, @@ -149,7 +153,9 @@ typedef struct typedef struct { usb_desc_config config; - usb_desc_itf dfu_itf; + usb_desc_itf dfu_itf0; + usb_desc_itf dfu_itf1; + usb_desc_itf dfu_itf2; usb_desc_dfu_func dfu_func; } usb_dfu_desc_config_set; @@ -164,7 +170,7 @@ typedef struct uint8_t iString; uint8_t manifest_state; - uint16_t data_len; + uint32_t data_len; uint16_t block_num; uint32_t base_addr; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_mal.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Include/dfu_mem.h similarity index 62% rename from system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_mal.h rename to system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Include/dfu_mem.h index def89e05..41403852 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_mal.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Include/dfu_mem.h @@ -1,12 +1,13 @@ /*! - \file dfu_mal.h + \file dfu_mem.h \brief USB DFU device media access layer header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -32,53 +33,52 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI OF SUCH DAMAGE. */ -#ifndef __DFU_MAL_H -#define __DFU_MAL_H +#ifndef __DFU_MEM_H +#define __DFU_MEM_H #include "usbd_conf.h" -typedef struct _dfu_mal_prop +typedef struct _dfu_mem_prop { const uint8_t* pstr_desc; - uint8_t (*mal_init) (void); - uint8_t (*mal_deinit) (void); - uint8_t (*mal_erase) (uint32_t addr); - uint8_t (*mal_write) (uint8_t *buf, uint32_t addr, uint32_t len); - uint8_t* (*mal_read) (uint8_t *buf, uint32_t addr, uint32_t len); - uint8_t (*mal_checkaddr) (uint32_t addr); + uint8_t (*mem_init) (void); + uint8_t (*mem_deinit) (void); + uint8_t (*mem_erase) (uint32_t addr); + uint8_t (*mem_write) (uint8_t *buf, uint32_t addr, uint32_t len); + uint8_t* (*mem_read) (uint8_t *buf, uint32_t addr, uint32_t len); + uint8_t (*mem_checkaddr) (uint32_t addr); const uint32_t erase_timeout; const uint32_t write_timeout; -} dfu_mal_prop; +} dfu_mem_prop; typedef enum { - MAL_OK = 0, - MAL_FAIL -} MAL_Status; + MEM_OK = 0, + MEM_FAIL +} mem_status; -#define _1st_BYTE(x) (uint8_t)((x) & 0xFF) /*!< addressing cycle 1st byte */ -#define _2nd_BYTE(x) (uint8_t)(((x) & 0xFF00) >> 8) /*!< addressing cycle 2nd byte */ -#define _3rd_BYTE(x) (uint8_t)(((x) & 0xFF0000) >> 16) /*!< addressing cycle 3rd byte */ +#define _1ST_BYTE(x) (uint8_t)((x) & 0xFF) /*!< addressing cycle 1st byte */ +#define _2ND_BYTE(x) (uint8_t)(((x) & 0xFF00) >> 8) /*!< addressing cycle 2nd byte */ +#define _3RD_BYTE(x) (uint8_t)(((x) & 0xFF0000) >> 16) /*!< addressing cycle 3rd byte */ -#define SET_POLLING_TIMEOUT(x) buffer[0] = _1st_BYTE(x);\ - buffer[1] = _2nd_BYTE(x);\ - buffer[2] = _3rd_BYTE(x); +#define POLLING_TIMEOUT_SET(x) buffer[0] = _1ST_BYTE(x);\ + buffer[1] = _2ND_BYTE(x);\ + buffer[2] = _3RD_BYTE(x); /* function declarations */ /* initialize the memory media on the GD32 */ -uint8_t dfu_mal_init(void); +uint8_t dfu_mem_init(void); /* deinitialize the memory media on the GD32 */ -uint8_t dfu_mal_deinit(void); +uint8_t dfu_mem_deinit(void); /* erase a memory sector */ -uint8_t dfu_mal_erase(uint32_t addr); +uint8_t dfu_mem_erase(uint32_t addr); /* write data to sectors of memory */ -uint8_t dfu_mal_write(uint8_t *buf, uint32_t addr, uint32_t len); +uint8_t dfu_mem_write(uint8_t *buf, uint32_t addr, uint32_t len); /* read data from sectors of memory */ -uint8_t* dfu_mal_read(uint8_t *buf, uint32_t addr, uint32_t len); +uint8_t* dfu_mem_read(uint8_t *buf, uint32_t addr, uint32_t len); /* get the status of a given memory and store in buffer */ -uint8_t dfu_mal_getstatus(uint32_t addr, uint8_t cmd, uint8_t *buffer); - -#endif /* __DFU_MAL_H */ +uint8_t dfu_mem_getstatus(uint32_t addr, uint8_t cmd, uint8_t *buffer); +#endif /* __DFU_MEM_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Source/dfu_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Source/dfu_core.c index 21f95762..69afa5e2 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Source/dfu_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Source/dfu_core.c @@ -3,10 +3,11 @@ \brief USB DFU device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -34,7 +35,7 @@ OF SUCH DAMAGE. #include "dfu_core.h" #include "systick.h" - +#include "dfu_mem.h" #include #define USBD_VID 0x28E9U @@ -54,9 +55,15 @@ static void dfu_getstatus (usb_dev *udev, usb_req *req); static void dfu_clrstatus (usb_dev *udev, usb_req *req); static void dfu_getstate (usb_dev *udev, usb_req *req); static void dfu_abort (usb_dev *udev, usb_req *req); +static void string_to_unicode (uint8_t *str, uint16_t *pbuf); + static void dfu_mode_leave (usb_dev *udev); static uint8_t dfu_getstatus_complete (usb_dev *udev); +extern dfu_mem_prop dfu_inter_flash_cb; +extern dfu_mem_prop dfu_nor_flash_cb; +extern dfu_mem_prop dfu_nand_flash_cb; + static void (*dfu_request_process[])(usb_dev *udev, usb_req *req) = { [DFU_DETACH] = dfu_detach, @@ -101,7 +108,7 @@ usb_dfu_desc_config_set dfu_config_desc = .bLength = sizeof(usb_desc_config), .bDescriptorType = USB_DESCTYPE_CONFIG }, - .wTotalLength = USB_DFU_CONFIG_DESC_SIZE, + .wTotalLength = sizeof(usb_dfu_desc_config_set), .bNumInterfaces = 0x01U, .bConfigurationValue = 0x01U, .iConfiguration = 0x00U, @@ -109,7 +116,7 @@ usb_dfu_desc_config_set dfu_config_desc = .bMaxPower = 0x32U }, - .dfu_itf = + .dfu_itf0 = { .header = { @@ -122,7 +129,39 @@ usb_dfu_desc_config_set dfu_config_desc = .bInterfaceClass = USB_DFU_CLASS, .bInterfaceSubClass = USB_DFU_SUBCLASS_UPGRADE, .bInterfaceProtocol = USB_DFU_PROTOCL_DFU, - .iInterface = 0x00U + .iInterface = STR_IDX_ALT_ITF0 + }, + + .dfu_itf1 = + { + .header = + { + .bLength = sizeof(usb_desc_itf), + .bDescriptorType = USB_DESCTYPE_ITF + }, + .bInterfaceNumber = 0x00U, + .bAlternateSetting = 0x01U, + .bNumEndpoints = 0x00U, + .bInterfaceClass = USB_DFU_CLASS, + .bInterfaceSubClass = USB_DFU_SUBCLASS_UPGRADE, + .bInterfaceProtocol = USB_DFU_PROTOCL_DFU, + .iInterface = STR_IDX_ALT_ITF1 + }, + + .dfu_itf2 = + { + .header = + { + .bLength = sizeof(usb_desc_itf), + .bDescriptorType = USB_DESCTYPE_ITF + }, + .bInterfaceNumber = 0x00U, + .bAlternateSetting = 0x02U, + .bNumEndpoints = 0x00U, + .bInterfaceClass = USB_DFU_CLASS, + .bInterfaceSubClass = USB_DFU_SUBCLASS_UPGRADE, + .bInterfaceProtocol = USB_DFU_PROTOCL_DFU, + .iInterface = STR_IDX_ALT_ITF2 }, .dfu_func = @@ -135,14 +174,15 @@ usb_dfu_desc_config_set dfu_config_desc = .bmAttributes = USB_DFU_CAN_DOWNLOAD | USB_DFU_CAN_UPLOAD | USB_DFU_WILL_DETACH, .wDetachTimeOut = 0x00FFU, .wTransferSize = TRANSFER_SIZE, - .bcdDFUVersion = 0x011AU, + .bcdDFUVersion = 0x0110U, }, }; /* USB language ID descriptor */ static usb_desc_LANGID usbd_language_id_desc = { - .header = { + .header = + { .bLength = sizeof(usb_desc_LANGID), .bDescriptorType = USB_DESCTYPE_STR }, @@ -192,15 +232,33 @@ static usb_desc_str config_string = .unicode_string = {'G', 'D', '3', '2', ' ', 'U', 'S', 'B', ' ', 'C', 'O', 'N', 'F', 'I', 'G'} }; -static usb_desc_str interface_string = +/* alternate interface 0 string */ +static usb_desc_str interface_string0 = { .header = { - .bLength = USB_STRING_LEN(15U), + .bLength = USB_STRING_LEN(2U), .bDescriptorType = USB_DESCTYPE_STR, }, - .unicode_string = {'@', 'I', 'n', 't', 'e', 'r', 'n', 'a', 'l', 'F', 'l', 'a', 's', 'h', ' ', '/', '0', 'x', '0', '8', '0', '0', - '0', '0', '0', '0', '/', '1', '6', '*', '0', '0', '1', 'K', 'a', ',', '4', '8', '*', '0', '0', '1', 'K', 'g'} +}; +/* alternate interface 1 string */ +static usb_desc_str interface_string1 = +{ + .header = + { + .bLength = USB_STRING_LEN(2U), + .bDescriptorType = USB_DESCTYPE_STR, + }, +}; + +/* alternate interface 2 string */ +static usb_desc_str interface_string2 = +{ + .header = + { + .bLength = USB_STRING_LEN(2U), + .bDescriptorType = USB_DESCTYPE_STR, + }, }; uint8_t* usbd_dfu_strings[] = @@ -210,7 +268,9 @@ uint8_t* usbd_dfu_strings[] = [STR_IDX_PRODUCT] = (uint8_t *)&product_string, [STR_IDX_SERIAL] = (uint8_t *)&serial_string, [STR_IDX_CONFIG] = (uint8_t *)&config_string, - [STR_IDX_ITF] = (uint8_t *)&interface_string + [STR_IDX_ALT_ITF0] = (uint8_t *)&interface_string0, + [STR_IDX_ALT_ITF1] = (uint8_t *)&interface_string1, + [STR_IDX_ALT_ITF2] = (uint8_t *)&interface_string2 }; usb_desc dfu_desc = { @@ -238,7 +298,7 @@ static uint8_t dfu_init (usb_dev *udev, uint8_t config_index) static usbd_dfu_handler dfu_handler; /* unlock the internal flash */ - fmc_unlock(); + dfu_mem_init(); systick_config(); @@ -251,6 +311,10 @@ static uint8_t dfu_init (usb_dev *udev, uint8_t config_index) udev->class_data[USBD_DFU_INTERFACE] = (void *)&dfu_handler; + /* create interface string */ + string_to_unicode((uint8_t *)dfu_inter_flash_cb.pstr_desc, (uint16_t *)udev->desc->strings[STR_IDX_ALT_ITF0]); + string_to_unicode((uint8_t *)dfu_nor_flash_cb.pstr_desc, (uint16_t *)udev->desc->strings[STR_IDX_ALT_ITF1]); + string_to_unicode((uint8_t *)dfu_nand_flash_cb.pstr_desc, (uint16_t *)udev->desc->strings[STR_IDX_ALT_ITF2]); return USBD_OK; } @@ -272,7 +336,7 @@ static uint8_t dfu_deinit (usb_dev *udev, uint8_t config_index) dfu->bStatus = STATUS_OK; /* lock the internal flash */ - fmc_lock(); + dfu_mem_deinit(); return USBD_OK; } @@ -334,7 +398,7 @@ static uint8_t dfu_getstatus_complete (usb_dev *udev) } else if (ERASE == dfu->buf[0]) { dfu->base_addr = *(uint32_t *)(dfu->buf + 1U); - fmc_page_erase(dfu->base_addr); + dfu_mem_erase(dfu->base_addr); } else { /* no operation */ } @@ -342,24 +406,10 @@ static uint8_t dfu_getstatus_complete (usb_dev *udev) /* no operation */ } } else if (dfu->block_num > 1U) { /* regular download command */ - /* preform the write operation */ - uint32_t idx = 0U; - /* decode the required address */ addr = (dfu->block_num - 2U) * TRANSFER_SIZE + dfu->base_addr; - if (dfu->data_len & 0x03U) { /* not an aligned data */ - for (idx = dfu->data_len; idx < ((dfu->data_len & 0xFFFCU) + 4U); idx++) { - dfu->buf[idx] = 0xFFU; - } - } - - /* data received are word multiple */ - for (idx = 0U; idx < dfu->data_len; idx += 4U) { - fmc_word_program(addr, *(uint32_t *)(dfu->buf + idx)); - - addr += 4U; - } + dfu_mem_write (dfu->buf, addr, dfu->data_len); dfu->block_num = 0U; } else { @@ -508,7 +558,10 @@ static void dfu_upload (usb_dev *udev, usb_req *req) addr = (dfu->block_num - 2U) * TRANSFER_SIZE + dfu->base_addr; /* return the physical address where data are stored */ - phy_addr = (uint8_t *)(addr); + // phy_addr = (uint8_t *)(addr); + + /* return the physical address where data are stored */ + phy_addr = dfu_mem_read (dfu->buf, addr, dfu->data_len); /* send the status data over EP0 */ transc->xfer_buf = phy_addr; @@ -648,6 +701,26 @@ static void dfu_abort (usb_dev *udev, usb_req *req) } } +/*! + \brief convert string value into unicode char + \param[in] str: pointer to plain string + \param[in] pbuf: buffer pointer to store unicode char + \param[out] none + \retval none +*/ +static void string_to_unicode (uint8_t *str, uint16_t *pbuf) +{ + uint8_t index = 0; + + if (str != NULL) { + pbuf[index++] = ((strlen((const char *)str) * 2U + 2U) & 0x00FFU) | ((USB_DESCTYPE_STR << 8U) & 0xFF00); + + while (*str != '\0') { + pbuf[index++] = *str++; + } + } +} + /*! \brief leave DFU mode and reset device to jump to user loaded code \param[in] udev: pointer to USB device instance @@ -666,7 +739,7 @@ static void dfu_mode_leave (usb_dev *udev) dfu->bState = STATE_DFU_MANIFEST_WAIT_RESET; /* lock the internal flash */ - fmc_lock(); + dfu_mem_deinit(); /* generate system reset to allow jumping to the user code */ NVIC_SystemReset(); diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Source/dfu_mem.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Source/dfu_mem.c new file mode 100644 index 00000000..62753be3 --- /dev/null +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/dfu/Source/dfu_mem.c @@ -0,0 +1,252 @@ +/*! + \file dfu_mem.c + \brief USB DFU device media access layer functions + + \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x +*/ + +/* + Copyright (c) 2022, GigaDevice Semiconductor Inc. + + Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY +OF SUCH DAMAGE. +*/ + +#include "dfu_mem.h" +#include "usbd_enum.h" +#include "usbd_transc.h" +#include "nor_flash_if.h" +#include "nand_flash_if.h" +#include "inter_flash_if.h" + +extern usb_dev usb_dfu; +extern dfu_mem_prop dfu_inter_flash_cb; +extern dfu_mem_prop dfu_nor_flash_cb; +extern dfu_mem_prop dfu_nand_flash_cb; + +extern struct { + uint8_t buf[TRANSFER_SIZE]; + uint16_t data_len; + uint16_t block_num; + uint32_t base_addr; +} prog; + +dfu_mem_prop* mem_tab[MAX_USED_MEMORY_MEDIA] = +{ + &dfu_inter_flash_cb, + &dfu_nor_flash_cb, + &dfu_nand_flash_cb, +}; + +/* The list of memory interface string descriptor pointers. This list + can be updated whenever a memory has to be added or removed */ +const uint8_t* USBD_DFU_StringDesc[MAX_USED_MEMORY_MEDIA] = +{ + (const uint8_t *)INTER_FLASH_IF_STR, + (const uint8_t *)NOR_FLASH_IF_STR, + (const uint8_t *)NAND_FLASH_IF_STR +}; + +static uint8_t dfu_mem_checkaddr (uint32_t addr); + +/*! + \brief initialize the memory media on the GD32 + \param[in] none + \param[out] none + \retval MEM_OK +*/ +uint8_t dfu_mem_init (void) +{ + uint32_t mem_index = 0U; + + /* initialize all supported memory medias */ + for (mem_index = 0U; mem_index < MAX_USED_MEMORY_MEDIA; mem_index++) { + /* check if the memory media exists */ + if (NULL != mem_tab[mem_index]->mem_init) { + mem_tab[mem_index]->mem_init(); + } + } + + return MEM_OK; +} + +/*! + \brief deinitialize the memory media on the GD32 + \param[in] none + \param[out] none + \retval MEM_OK +*/ +uint8_t dfu_mem_deinit (void) +{ + uint32_t mem_index = 0U; + + /* deinitialize all supported memory medias */ + for (mem_index = 0U; mem_index < MAX_USED_MEMORY_MEDIA; mem_index++) { + /* check if the memory media exists */ + if (NULL != mem_tab[mem_index]->mem_deinit) { + mem_tab[mem_index]->mem_deinit(); + } + } + + return MEM_OK; +} + +/*! + \brief erase a memory sector + \param[in] addr: memory sector address/code + \param[out] none + \retval MEM_OK +*/ +uint8_t dfu_mem_erase (uint32_t addr) +{ + uint32_t mem_index = dfu_mem_checkaddr(addr); + + /* check if the address is in protected area */ + if (IS_PROTECTED_AREA(addr)) { + return MEM_FAIL; + } + + if (mem_index < MAX_USED_MEMORY_MEDIA) { + /* check if the operation is supported */ + if (NULL != mem_tab[mem_index]->mem_erase) { + return mem_tab[mem_index]->mem_erase(addr); + } else { + return MEM_FAIL; + } + } else { + return MEM_FAIL; + } +} + +/*! + \brief write data to sectors of memory + \param[in] buf: the data buffer to be write + \param[in] addr: memory sector address/code + \param[in] len: data length + \param[out] none + \retval MEM_OK +*/ +uint8_t dfu_mem_write (uint8_t *buf, uint32_t addr, uint32_t len) +{ + uint32_t mem_index = dfu_mem_checkaddr(addr); + + /* check if the address is in protected area */ + if (IS_PROTECTED_AREA(addr)) { + return MEM_FAIL; + } + + if (OB_RDPT == (addr & MAL_MASK_OB)) { + option_byte_write(addr, buf); + + NVIC_SystemReset(); + + return MEM_OK; + } + + if (mem_index < MAX_USED_MEMORY_MEDIA) { + /* check if the operation is supported */ + if (NULL != mem_tab[mem_index]->mem_write) { + return mem_tab[mem_index]->mem_write(buf, addr, len); + } else { + return MEM_FAIL; + } + } else { + return MEM_FAIL; + } +} + +/*! + \brief read data from sectors of memory + \param[in] buf: the data buffer to be write + \param[in] addr: memory sector address/code + \param[in] len: data length + \param[out] none + \retval pointer to buffer +*/ +uint8_t* dfu_mem_read (uint8_t *buf, uint32_t addr, uint32_t len) +{ + uint32_t mem_index = 0U; + + if (OB_RDPT != addr) { + mem_index = dfu_mem_checkaddr(addr); + } + + if (mem_index < MAX_USED_MEMORY_MEDIA) { + /* check if the operation is supported */ + if (NULL != mem_tab[mem_index]->mem_read) { + return mem_tab[mem_index]->mem_read(buf, addr, len); + } else { + return buf; + } + } else { + return buf; + } +} + +/*! + \brief get the status of a given memory and store in buffer + \param[in] addr: memory sector address/code + \param[in] cmd: 0 for erase and 1 for write + \param[in] buffer: pointer to the buffer where the status data will be stored + \param[out] none + \retval MEM_OK if all operations are OK, MEM_FAIL else +*/ +uint8_t dfu_mem_getstatus (uint32_t addr, uint8_t cmd, uint8_t *buffer) +{ + uint32_t mem_index = dfu_mem_checkaddr(addr); + + if (mem_index < MAX_USED_MEMORY_MEDIA) { + if (cmd & 0x01U) { + POLLING_TIMEOUT_SET(mem_tab[mem_index]->write_timeout); + } else { + POLLING_TIMEOUT_SET(mem_tab[mem_index]->erase_timeout); + } + + return MEM_OK; + } else { + return MEM_FAIL; + } +} + +/*! + \brief check the address is supported + \param[in] addr: memory sector address/code + \param[out] none + \retval index of the addressed memory +*/ +static uint8_t dfu_mem_checkaddr (uint32_t addr) +{ + uint8_t mem_index = 0U; + + /* check with all supported memories */ + for (mem_index = 0U; mem_index < MAX_USED_MEMORY_MEDIA; mem_index++) { + /* if the check address is supported, return the memory index */ + if (MEM_OK == mem_tab[mem_index]->mem_checkaddr(addr)) { + return mem_index; + } + } + + /* if there is no memory found, return MAX_USED_MEMORY_MEDIA */ + return (MAX_USED_MEMORY_MEDIA); +} diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/custom_hid_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/custom_hid_core.h index 7f647c89..ab885174 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/custom_hid_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/custom_hid_core.h @@ -3,10 +3,11 @@ \brief definitions for HID core \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -43,7 +44,8 @@ OF SUCH DAMAGE. #define MAX_PERIPH_NUM 4U -typedef struct { +typedef struct +{ uint8_t data[2]; uint8_t reportID; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/standard_hid_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/standard_hid_core.h index c3adcd4c..3c4377b1 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/standard_hid_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/standard_hid_core.h @@ -3,10 +3,11 @@ \brief definitions for HID core \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -41,7 +42,8 @@ OF SUCH DAMAGE. #define USB_HID_CONFIG_DESC_LEN 0x22U #define USB_HID_REPORT_DESC_LEN 0x2EU -typedef struct { +typedef struct +{ uint32_t protocol; uint32_t idle_state; @@ -49,7 +51,8 @@ typedef struct { __IO uint8_t prev_transfer_complete; } standard_hid_handler; -typedef struct { +typedef struct +{ void (*hid_itf_config) (void); void (*hid_itf_data_process) (usb_dev *udev); } hid_fop_handler; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/std_hid_mouse_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/std_hid_mouse_core.h index 9eb2c939..676b2044 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/std_hid_mouse_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/std_hid_mouse_core.h @@ -3,10 +3,11 @@ \brief definitions for HID mouse core \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -44,7 +45,8 @@ OF SUCH DAMAGE. #define MOUSE_LEFT_BUTTON 0x01U #define MOUSE_RIGHT_BUTTON 0x02U -typedef struct { +typedef struct +{ uint32_t protocol; uint32_t idle_state; @@ -52,7 +54,8 @@ typedef struct { __IO uint8_t prev_transfer_complete; } standard_mice_handler; -typedef struct { +typedef struct +{ void (*mice_itf_config) (void); void (*mice_itf_data_process) (usb_dev *udev); } mice_fop_handler; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/usb_hid.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/usb_hid.h index d82cf254..2b152853 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/usb_hid.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Include/usb_hid.h @@ -3,10 +3,11 @@ \brief definitions for the USB HID class \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/custom_hid_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/custom_hid_core.c index 6a20870e..9000644e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/custom_hid_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/custom_hid_core.c @@ -3,10 +3,13 @@ \brief custom HID class driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2021-06-22, V3.0.1, firmware for GD32F30x + \version 2021-11-09, V3.0.2, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -62,6 +65,7 @@ usb_desc_dev custom_hid_dev_desc = .bNumberConfigurations = USBD_CFG_MAX_NUM, }; +/* USB device configure descriptor */ usb_hid_desc_config_set custom_hid_config_desc = { .config = @@ -169,7 +173,7 @@ static usb_desc_str product_string = .unicode_string = {'G', 'D', '3', '2', '-', 'C', 'u', 's', 't', 'o', 'm', 'H', 'I', 'D'} }; -/* USBD serial string */ +/* USB serial string */ static usb_desc_str serial_string = { .header = @@ -188,7 +192,8 @@ uint8_t* usbd_hid_strings[] = [STR_IDX_SERIAL] = (uint8_t *)&serial_string }; -usb_desc custom_hid_desc = { +usb_desc custom_hid_desc = +{ .dev_desc = (uint8_t *)&custom_hid_dev_desc, .config_desc = (uint8_t *)&custom_hid_config_desc, .strings = usbd_hid_strings @@ -313,7 +318,7 @@ uint8_t custom_hid_report_send (usb_dev *udev, uint8_t *report, uint16_t len) /*! \brief initialize the HID device - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] config_index: configuration index \param[out] none \retval USB device operation status @@ -384,6 +389,11 @@ static uint8_t custom_hid_req_handler (usb_dev *udev, usb_req *req) 0U); status = REQ_SUPP; + } else if (USB_DESCTYPE_HID == (req->wValue >> 8U)) { + usb_transc_config(&udev->transc_in[0U], + (uint8_t *)(&(custom_hid_config_desc.hid_vendor)), + USB_MIN(9U, req->wLength), + 0U); } break; @@ -458,11 +468,10 @@ static void custom_hid_data_out (usb_dev *udev, uint8_t ep_num) custom_hid_handler *hid = (custom_hid_handler *)udev->class_data[CUSTOM_HID_INTERFACE]; if (CUSTOMHID_OUT_EP == ep_num){ - switch (hid->data[0]){ case 0x11: if (RESET != hid->data[1]) { - /* turn on led1 */ + /* turn on led5 */ gd_eval_led_on(LED5); } else { gd_eval_led_off(LED5); @@ -491,13 +500,13 @@ static void custom_hid_data_out (usb_dev *udev, uint8_t ep_num) break; default: /* turn off all leds */ - gd_eval_led_off(LED5); gd_eval_led_off(LED2); gd_eval_led_off(LED3); gd_eval_led_off(LED4); + gd_eval_led_off(LED5); break; } - usbd_ep_recev(udev, CUSTOMHID_IN_EP, hid->data, 2U); + usbd_ep_recev(udev, CUSTOMHID_OUT_EP, hid->data, 2U); } } diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/standard_hid_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/standard_hid_core.c index d268e1ef..280fceb0 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/standard_hid_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/standard_hid_core.c @@ -3,10 +3,11 @@ \brief HID class driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -34,7 +35,6 @@ OF SUCH DAMAGE. #include "usbd_transc.h" #include "standard_hid_core.h" - #include #define USBD_VID 0x28E9U @@ -194,6 +194,7 @@ static usb_desc_str serial_string = } }; +/* USB string descriptor set */ uint8_t* usbd_hid_strings[] = { [STR_IDX_LANGID] = (uint8_t *)&usbd_language_id_desc, @@ -202,7 +203,8 @@ uint8_t* usbd_hid_strings[] = [STR_IDX_SERIAL] = (uint8_t *)&serial_string }; -usb_desc hid_desc = { +usb_desc hid_desc = +{ #ifdef LPM_ENABLED .bos_desc = (uint8_t *)&USBD_BOSDesc, #endif /* LPM_ENABLED */ @@ -217,7 +219,8 @@ static uint8_t hid_deinit (usb_dev *udev, uint8_t config_index); static uint8_t hid_req_handler (usb_dev *udev, usb_req *req); static void hid_data_in_handler (usb_dev *udev, uint8_t ep_num); -usb_class hid_class = { +usb_class hid_class = +{ .init = hid_init, .deinit = hid_deinit, .req_process = hid_req_handler, diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/std_hid_mouse_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/std_hid_mouse_core.c index a6766ed1..9d63582d 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/std_hid_mouse_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/hid/Source/std_hid_mouse_core.c @@ -3,10 +3,11 @@ \brief HID class driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/iap/Include/usb_iap_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/iap/Include/usb_iap_core.h index b4c27239..1c6c7fc6 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/iap/Include/usb_iap_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/iap/Include/usb_iap_core.h @@ -3,10 +3,11 @@ \brief the header file of IAP driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/iap/Source/usb_iap_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/iap/Source/usb_iap_core.c index fca6804f..2772c98e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/iap/Source/usb_iap_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/iap/Source/usb_iap_core.c @@ -3,10 +3,11 @@ \brief IAP driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -62,6 +63,7 @@ usb_desc_dev iap_dev_desc = .bNumberConfigurations = USBD_CFG_MAX_NUM }; +/* USB device configure descriptor */ usb_hid_desc_config_set iap_config_desc = { .config = @@ -169,7 +171,7 @@ static usb_desc_str product_string = .unicode_string = {'G', 'D', '3', '2', '-', 'U', 'S', 'B', '_', 'I', 'A', 'P'} }; -/* USBD serial string */ +/* USB serial string */ static usb_desc_str serial_string = { .header = @@ -179,6 +181,7 @@ static usb_desc_str serial_string = } }; +/* USB string descriptor set */ uint8_t* usbd_iap_strings[] = { [STR_IDX_LANGID] = (uint8_t *)&usbd_language_id_desc, @@ -240,7 +243,7 @@ static void iap_req_dnload (usb_dev *udev); static void iap_req_optionbyte(usb_dev *udev); static void iap_req_leave (usb_dev *udev); static void iap_address_send (usb_dev *udev); -static void iap_data_write (uint8_t *data, uint32_t addr, uint32_t len); +static void iap_data_write (uint8_t *data, uint32_t addr, uint32_t len); /*! \brief initialize the HID device @@ -480,9 +483,9 @@ static void iap_req_erase (usb_dev *udev) /* compute last packet size and transfer times */ iap->lps = iap->file_length % TRANSFER_SIZE; if (0U == iap->lps) { - iap->transfer_times = (uint16_t)iap->file_length / TRANSFER_SIZE; + iap->transfer_times = (uint16_t)(iap->file_length / TRANSFER_SIZE); } else { - iap->transfer_times = (uint16_t)iap->file_length / TRANSFER_SIZE + 1U; + iap->transfer_times = (uint16_t)(iap->file_length / TRANSFER_SIZE + 1U); } /* check if the address is in protected area */ @@ -569,7 +572,7 @@ static void iap_address_send(usb_dev *udev) \param[in] addr: sector address/code \param[in] len: length of data to be written (in bytes) \param[out] none - \retval MAL_OK if all operations are OK, MAL_FAIL else + \retval none */ static void iap_data_write (uint8_t *data, uint32_t addr, uint32_t len) { diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_bbb.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_bbb.h index 639fd8a1..4cd05622 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_bbb.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_bbb.h @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2021-02-20, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -45,7 +46,8 @@ OF SUCH DAMAGE. #define BBB_CBW_LENGTH 31U #define BBB_CSW_LENGTH 13U -typedef struct { +typedef struct +{ uint32_t dCBWSignature; uint32_t dCBWTag; uint32_t dCBWDataTransferLength; @@ -55,7 +57,8 @@ typedef struct { uint8_t CBWCB[16]; }msc_bbb_cbw; -typedef struct { +typedef struct +{ uint32_t dCSWSignature; uint32_t dCSWTag; uint32_t dCSWDataResidue; @@ -63,7 +66,8 @@ typedef struct { }msc_bbb_csw; /* CSW command status */ -enum msc_csw_status { +enum msc_csw_status +{ CSW_CMD_PASSED = 0, CSW_CMD_FAILED, CSW_PHASE_ERROR @@ -106,7 +110,6 @@ typedef struct uint32_t scsi_blk_addr; uint32_t scsi_blk_len; -// uint32_t scsi_disk_pop; msc_scsi_sense scsi_sense[SENSE_LIST_DEEPTH]; } usbd_msc_handler; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_core.h index 0eacbb8c..bd4028e2 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_core.h @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2021-02-20, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_data.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_data.h deleted file mode 100644 index 3d6ab7a7..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_data.h +++ /dev/null @@ -1,50 +0,0 @@ -/*! - \file usbd_msc_data.h - \brief the header file of the usbd_msc_data.c file - - \version 2020-08-01, V3.0.0, firmware for GD32F30x - \version 2021-02-20, V3.0.1, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#ifndef __USBD_MSC_DATA_H -#define __USBD_MSC_DATA_H - -#include "usbd_conf.h" - -#define MODE_SENSE6_LENGTH 8U -#define MODE_SENSE10_LENGTH 8U -#define INQUIRY_PAGE00_LENGTH 96U -#define FORMAT_CAPACITIES_LENGTH 20U - -extern const uint8_t msc_page00_inquiry_data[]; -extern const uint8_t msc_mode_sense6_data[]; -extern const uint8_t msc_mode_sense10_data[]; - -#endif /* __USBD_MSC_DATA_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_mem.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_mem.h index e6ddf9d7..bc8490d0 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_mem.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_mem.h @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2021-02-20, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_scsi.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_scsi.h index 22c16381..d0b57b3f 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_scsi.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Include/usbd_msc_scsi.h @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2021-02-20, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -36,7 +37,6 @@ OF SUCH DAMAGE. #ifndef __USBD_MSC_SCSI_H #define __USBD_MSC_SCSI_H -#include "usbd_msc_data.h" #include "usbd_msc_bbb.h" #define SENSE_LIST_DEEPTH 4U @@ -93,7 +93,13 @@ OF SUCH DAMAGE. #define STANDARD_INQUIRY_DATA_LEN 0x24U #define BLKVFY 0x04U -enum sense_state { +#define MODE_SENSE6_LENGTH 8U +#define MODE_SENSE10_LENGTH 8U +#define INQUIRY_PAGE00_LENGTH 96U +#define FORMAT_CAPACITIES_LENGTH 20U + +enum sense_state +{ NO_SENSE = 0U, RECOVERED_ERROR, NOT_READY, @@ -118,6 +124,10 @@ typedef struct { uint8_t ASCQ; } msc_scsi_sense; +extern const uint8_t msc_page00_inquiry_data[]; +extern const uint8_t msc_mode_sense6_data[]; +extern const uint8_t msc_mode_sense10_data[]; + /* function declarations */ /* process SCSI commands */ int8_t scsi_process_cmd (usb_dev *udev, uint8_t lun, uint8_t *cmd); diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_bbb.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_bbb.c index 361f54f4..6f8a4d7f 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_bbb.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_bbb.c @@ -5,10 +5,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2021-02-20, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -182,8 +183,9 @@ void msc_bbb_csw_send (usb_dev *udev, uint8_t csw_status) void msc_bbb_clrfeature (usb_dev *udev, uint8_t ep_num) { usbd_msc_handler *msc = (usbd_msc_handler *)udev->class_data[USBD_MSC_INTERFACE]; - - if (msc->bbb_status == BBB_STATUS_ERROR)/* bad CBW signature */ { + + /* bad CBW signature */ + if (msc->bbb_status == BBB_STATUS_ERROR) { usbd_ep_stall(udev, MSC_IN_EP); msc->bbb_status = BBB_STATUS_NORMAL; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_core.c index 00884ac5..a5ac5de1 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_core.c @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2021-02-20, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -191,7 +192,8 @@ uint8_t* usbd_msc_strings[] = [STR_IDX_SERIAL] = (uint8_t *)&serial_string }; -usb_desc msc_desc = { +usb_desc msc_desc = +{ .dev_desc = (uint8_t *)&msc_dev_desc, .config_desc = (uint8_t *)&msc_config_desc, .strings = usbd_msc_strings diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_data.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_data.c deleted file mode 100644 index e1078c7b..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_data.c +++ /dev/null @@ -1,74 +0,0 @@ -/*! - \file msc_bbb_scsi.h - \brief the header file of the msc_bbb_scsi.c - - \version 2020-08-01, V3.0.0, firmware for GD32F30x - \version 2021-02-20, V3.0.1, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#include "usbd_msc_data.h" - -/* USB mass storage page 0 inquiry data */ -const uint8_t msc_page00_inquiry_data[] = -{ - 0x00U, - 0x00U, - 0x00U, - 0x00U, - (INQUIRY_PAGE00_LENGTH - 4U), - 0x80U, - 0x83U, -}; - -/* USB mass storage sense 6 data */ -const uint8_t msc_mode_sense6_data[] = -{ - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U -}; - -/* USB mass storage sense 10 data */ -const uint8_t msc_mode_sense10_data[] = -{ - 0x00U, - 0x06U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U -}; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_scsi.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_scsi.c index 30ebe3b9..0ceccc93 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_scsi.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/msc/Source/usbd_msc_scsi.c @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2021-02-20, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -36,7 +37,44 @@ OF SUCH DAMAGE. #include "usbd_enum.h" #include "usbd_msc_bbb.h" #include "usbd_msc_scsi.h" -#include "usbd_msc_data.h" + +/* USB mass storage page 0 inquiry data */ +const uint8_t msc_page00_inquiry_data[] = +{ + 0x00U, + 0x00U, + 0x00U, + 0x00U, + (INQUIRY_PAGE00_LENGTH - 4U), + 0x80U, + 0x83U, +}; + +/* USB mass storage sense 6 data */ +const uint8_t msc_mode_sense6_data[] = +{ + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U +}; + +/* USB mass storage sense 10 data */ +const uint8_t msc_mode_sense10_data[] = +{ + 0x00U, + 0x06U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U +}; /* local function prototypes ('static') */ static int8_t scsi_test_unit_ready (usb_dev *udev, uint8_t lun, uint8_t *params); @@ -173,17 +211,13 @@ static int8_t scsi_test_unit_ready (usb_dev *udev, uint8_t lun, uint8_t *params) return -1; } -// if (1U == msc->scsi_disk_pop) { -// usbd_disconnect (udev); -// } - msc->bbb_datalen = 0U; return 0; } /*! - \brief process Inquiry command + \brief process mode select 6 command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -200,7 +234,7 @@ static int8_t scsi_mode_select6 (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Inquiry command + \brief process mode select 10 command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -217,7 +251,7 @@ static int8_t scsi_mode_select10 (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Inquiry command + \brief process inquiry command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -256,7 +290,7 @@ static int8_t scsi_inquiry (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Read Capacity 10 command + \brief process read capacity 10 command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -287,7 +321,7 @@ static int8_t scsi_read_capacity10 (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Read Format Capacity command + \brief process read format capacity command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -324,7 +358,7 @@ static int8_t scsi_read_format_capacity (usb_dev *udev, uint8_t lun, uint8_t *pa } /*! - \brief process Mode Sense6 command + \brief process mode sense 6 command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -347,7 +381,7 @@ static int8_t scsi_mode_sense6 (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Mode Sense10 command + \brief process mode sense 10 command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -370,7 +404,7 @@ static int8_t scsi_mode_sense10 (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Request Sense command + \brief process request sense command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -406,7 +440,7 @@ static int8_t scsi_request_sense (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Start Stop Unit command + \brief process start stop unit command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -418,13 +452,12 @@ static inline int8_t scsi_start_stop_unit (usb_dev *udev, uint8_t lun, uint8_t * usbd_msc_handler *msc = (usbd_msc_handler *)udev->class_data[USBD_MSC_INTERFACE]; msc->bbb_datalen = 0U; -// msc->scsi_disk_pop = 1U; return 0; } /*! - \brief process Allow Medium Removal command + \brief process allow medium removal command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -441,7 +474,7 @@ static inline int8_t scsi_allow_medium_removal (usb_dev *udev, uint8_t lun, uint } /*! - \brief process Read10 command + \brief process read 10 command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -494,7 +527,7 @@ static int8_t scsi_read10 (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Write10 command + \brief process write 10 command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -562,7 +595,7 @@ static int8_t scsi_write10 (usb_dev *udev, uint8_t lun, uint8_t *params) } /*! - \brief process Verify10 command + \brief process verify 10 command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters @@ -689,7 +722,7 @@ static int8_t scsi_process_write (usb_dev *udev, uint8_t lun) } /*! - \brief process Format Unit command + \brief process format unit command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[out] none @@ -701,7 +734,7 @@ static inline int8_t scsi_format_cmd (usb_dev *udev, uint8_t lun) } /*! - \brief process Read_Toc command + \brief process read TOC command \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/printer/Include/printer_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/printer/Include/printer_core.h index f4c09951..4799b414 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/printer/Include/printer_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/printer/Include/printer_core.h @@ -3,10 +3,11 @@ \brief the header file of USB printer device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -37,13 +38,13 @@ OF SUCH DAMAGE. #include "usbd_enum.h" -/* USB printing device class code */ +/* USB printer device class code */ #define USB_CLASS_PRINTER 0x07U -/* printing device subclass code */ +/* printer device subclass code */ #define USB_SUBCLASS_PRINTER 0x01U -/* printing device protocol code */ +/* printer device protocol code */ #define PROTOCOL_UNIDIRECTIONAL_ITF 0x01U #define PROTOCOL_BI_DIRECTIONAL_ITF 0x02U #define PROTOCOL_1284_4_ITF 0x03U @@ -53,7 +54,7 @@ OF SUCH DAMAGE. #define USB_PRINTER_CONFIG_DESC_LEN 32U -/* printing device specific-class request */ +/* printer device specific-class request */ #define GET_DEVICE_ID 0x00U #define GET_PORT_STATUS 0x01U #define SOFT_RESET 0x02U diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/printer/Source/printer_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/printer/Source/printer_core.c index f41b2cf6..f9266c7e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/printer/Source/printer_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/class/device/printer/Source/printer_core.c @@ -3,10 +3,11 @@ \brief USB printer device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -205,7 +206,8 @@ static uint8_t printer_req_handler (usb_dev *udev, usb_req *req); static void printer_data_in (usb_dev *udev, uint8_t ep_num); static void printer_data_out (usb_dev *udev, uint8_t ep_num); -usb_class printer_class = { +usb_class printer_class = +{ .init = printer_init, .deinit = printer_deinit, .req_process = printer_req_handler, @@ -235,7 +237,7 @@ static uint8_t printer_init (usb_dev *udev, uint8_t config_index) } /*! - \brief de-initialize the printer device + \brief deinitialize the printer device \param[in] udev: pointer to USB device instance \param[in] config_index: configuration index \param[out] none diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usb_ch9_std.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usb_ch9_std.h index b3694834..bd3ff3a3 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usb_ch9_std.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usb_ch9_std.h @@ -3,10 +3,11 @@ \brief USB 2.0 standard defines \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -47,7 +48,6 @@ OF SUCH DAMAGE. #define USB_SETUP_PACKET_LEN 0x08U /*!< USB SETUP packet length */ #define USB_DEVICE_CAPABITY 0x10U /*!< USB device capabity */ - /* bit 7 of bmRequestType: data phase transfer direction */ #define USB_TRX_MASK 0x80U /*!< USB transfer direction mask */ #define USB_TRX_OUT 0x00U /*!< USB transfer OUT direction */ @@ -66,7 +66,8 @@ OF SUCH DAMAGE. #define USB_STATUS_SELF_POWERED 1U /*!< USB is in self powered status */ /* bit 4..0 of bmRequestType: recipient type */ -enum _usb_recp_type { +enum _usb_recp_type +{ USB_RECPTYPE_DEV = 0x0U, /*!< USB device request type */ USB_RECPTYPE_ITF = 0x1U, /*!< USB interface request type */ USB_RECPTYPE_EP = 0x2U, /*!< USB endpoint request type */ @@ -74,7 +75,8 @@ enum _usb_recp_type { }; /* bRequest value */ -enum _usb_request { +enum _usb_request +{ USB_GET_STATUS = 0x0U, /*!< USB get status request */ USB_CLEAR_FEATURE = 0x1U, /*!< USB clear feature request */ USB_RESERVED2 = 0x2U, /*!< USB reserved2 */ @@ -91,7 +93,8 @@ enum _usb_request { }; /* descriptor types of USB specifications */ -enum _usb_desctype { +enum _usb_desctype +{ USB_DESCTYPE_DEV = 0x1U, /*!< USB device descriptor type */ USB_DESCTYPE_CONFIG = 0x2U, /*!< USB configuration descriptor type */ USB_DESCTYPE_STR = 0x3U, /*!< USB string descriptor type */ @@ -105,11 +108,12 @@ enum _usb_desctype { /* USB endpoint descriptor bmAttributes bit definitions */ /* bits 1..0 : transfer type */ -enum _usbx_type { - USB_EP_ATTR_CTL = 0x0U, /*!< USB endpoint control attributes*/ - USB_EP_ATTR_ISO = 0x1U, /*!< USB endpoint isochronous attributes*/ - USB_EP_ATTR_BULK = 0x2U, /*!< USB endpoint bulk attributes*/ - USB_EP_ATTR_INT = 0x3U /*!< USB endpoint interrupt attributes*/ +enum _usbx_type +{ + USB_EP_ATTR_CTL = 0x0U, /*!< USB endpoint control attributes */ + USB_EP_ATTR_ISO = 0x1U, /*!< USB endpoint isochronous attributes */ + USB_EP_ATTR_BULK = 0x2U, /*!< USB endpoint bulk attributes */ + USB_EP_ATTR_INT = 0x3U /*!< USB endpoint interrupt attributes */ }; /* bits 3..2 : Sync type (only if ISOCHRONOUS) */ @@ -128,7 +132,8 @@ enum _usbx_type { #pragma pack(1) /* USB standard device request structure */ -typedef struct _usb_req { +typedef struct _usb_req +{ uint8_t bmRequestType; /*!< type of request */ uint8_t bRequest; /*!< request of setup packet */ uint16_t wValue; /*!< value of setup packet */ @@ -137,19 +142,22 @@ typedef struct _usb_req { } usb_req; /* USB setup packet definition */ -typedef union _usb_setup { +typedef union _usb_setup +{ uint8_t data[8]; /*!< USB setup data */ usb_req req; /*!< USB setup request */ } usb_setup; /* USB descriptor definition */ -typedef struct _usb_desc_header { +typedef struct _usb_desc_header +{ uint8_t bLength; /*!< size of the descriptor */ uint8_t bDescriptorType; /*!< type of the descriptor */ } usb_desc_header; -typedef struct _usb_desc_dev { +typedef struct _usb_desc_dev +{ usb_desc_header header; /*!< descriptor header, including type and size */ uint16_t bcdUSB; /*!< BCD of the supported USB specification */ uint8_t bDeviceClass; /*!< USB device class */ @@ -165,7 +173,8 @@ typedef struct _usb_desc_dev { uint8_t bNumberConfigurations; /*!< total number of configurations supported by the device */ } usb_desc_dev; -typedef struct _usb_desc_config { +typedef struct _usb_desc_config +{ usb_desc_header header; /*!< descriptor header, including type and size */ uint16_t wTotalLength; /*!< size of the configuration descriptor header, and all sub descriptors inside the configuration */ uint8_t bNumInterfaces; /*!< total number of interfaces in the configuration */ @@ -175,7 +184,8 @@ typedef struct _usb_desc_config { uint8_t bMaxPower; /*!< maximum power consumption of the device while in the current configuration */ } usb_desc_config; -typedef struct _usb_desc_itf { +typedef struct _usb_desc_itf +{ usb_desc_header header; /*!< descriptor header, including type and size */ uint8_t bInterfaceNumber; /*!< index of the interface in the current configuration */ uint8_t bAlternateSetting; /*!< alternate setting for the interface number */ @@ -186,7 +196,8 @@ typedef struct _usb_desc_itf { uint8_t iInterface; /*!< index of the string descriptor describing the interface */ } usb_desc_itf; -typedef struct _usb_desc_ep { +typedef struct _usb_desc_ep +{ usb_desc_header header; /*!< descriptor header, including type and size */ uint8_t bEndpointAddress; /*!< logical address of the endpoint */ uint8_t bmAttributes; /*!< endpoint attribute */ @@ -194,13 +205,15 @@ typedef struct _usb_desc_ep { uint8_t bInterval; /*!< polling interval in milliseconds for the endpoint if it is an INTERRUPT or ISOCHRONOUS type */ } usb_desc_ep; -typedef struct _usb_desc_LANGID { - usb_desc_header header; /*!< descriptor header, including type and size. */ +typedef struct _usb_desc_LANGID +{ + usb_desc_header header; /*!< descriptor header, including type and size */ uint16_t wLANGID; /*!< LANGID code */ } usb_desc_LANGID; -typedef struct _usb_desc_str { - usb_desc_header header; /*!< descriptor header, including type and size. */ +typedef struct _usb_desc_str +{ + usb_desc_header header; /*!< descriptor header, including type and size */ uint16_t unicode_string[64]; /*!< unicode string data */ } usb_desc_str; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_core.h index e7abd44a..9106af0c 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_core.h @@ -3,10 +3,12 @@ \brief USB device driver core \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2021-08-10, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -50,7 +52,8 @@ OF SUCH DAMAGE. #define USBD_TRANSC_COUNT 3U /* USB device operation status */ -enum usbd_status { +enum usbd_status +{ USBD_UNCONNECTED = 0U, /*!< USB device unconnected status */ USBD_DEFAULT, /*!< USB device default status */ USBD_ADDRESSED, /*!< USB device addressed status */ @@ -60,12 +63,23 @@ enum usbd_status { }; /* USB device operation state */ -enum usbd_state { +enum usbd_state +{ USBD_OK = 0U, /*!< USB device OK state */ USBD_BUSY, /*!< USB device busy state */ USBD_FAIL /*!< USB device fail state */ }; +/* USB device type */ +enum usbd_ctl_state +{ + USBD_CTL_IDLE = 0U, + USBD_CTL_DATA_IN, + USBD_CTL_DATA_OUT, + USBD_CTL_STATUS_IN, + USBD_CTL_STATUS_OUT +}; + /* USB device transaction type */ enum usbd_transc { TRANSC_SETUP = 0U, /*!< SETUP transaction */ @@ -81,8 +95,9 @@ enum usbd_ep_kind { }; /* USB device transaction struct */ -typedef struct { - uint8_t max_len; /*!< packet max length */ +typedef struct +{ + uint16_t max_len; /*!< packet max length */ uint8_t ep_stall; /*!< endpoint STALL */ uint8_t *xfer_buf; /*!< transfer buffer */ @@ -91,14 +106,16 @@ typedef struct { } usb_transc; /* USB device basic struct */ -typedef struct { +typedef struct +{ uint8_t max_ep_count; /*!< endpoint max count */ uint8_t twin_buf; /*!< double buffer */ uint16_t ram_size; /*!< ram size */ } usb_basic; /* USB descriptor */ -typedef struct { +typedef struct +{ uint8_t *dev_desc; /*!< device descriptor */ uint8_t *config_desc; /*!< configure descriptor */ uint8_t *bos_desc; /*!< bos descriptor */ @@ -106,7 +123,8 @@ typedef struct { } usb_desc; /* USB power management */ -typedef struct { +typedef struct +{ uint8_t power_mode; /*!< power mode */ uint8_t power_low; /*!< power low */ uint8_t esof_count; /*!< ESOF count */ @@ -117,16 +135,19 @@ typedef struct { } usb_pm; /* USB LPM management */ -typedef struct { - uint32_t besl; /*!< besl */ +typedef struct +{ + uint32_t besl; /*!< BESL */ uint32_t L1_resume; /*!< L1 resume */ uint32_t L1_remote_wakeup; /*!< L1 remote wakeup */ } usb_lpm; /* USB control information */ -typedef struct { +typedef struct +{ usb_req req; /*!< USB request */ uint8_t ctl_zlp; /*!< control zero length packet */ + uint8_t ctl_state; /*!< control state */ } usb_control; typedef struct _usb_dev usb_dev; @@ -134,7 +155,8 @@ typedef struct _usb_handler usb_handler; typedef void (*usb_ep_transc) (usb_dev *usbd_dev, uint8_t ep_num); /* USB class struct */ -typedef struct { +typedef struct +{ uint8_t req_cmd; uint8_t req_altset; @@ -151,7 +173,8 @@ typedef struct { } usb_class; /* USB core driver struct */ -struct _usb_dev { +struct _usb_dev +{ /* basic parameters */ uint8_t config; uint8_t dev_addr; @@ -186,7 +209,8 @@ typedef struct } usbd_int_cb_struct; /* USB handler struct */ -struct _usb_handler { +struct _usb_handler +{ void (*init) (void); void (*deinit) (void); @@ -204,7 +228,7 @@ struct _usb_handler { uint16_t (*ep_read) (uint8_t *fifo, uint8_t ep_num, uint8_t buf_kind); void (*ep_stall_set) (usb_dev *udev, uint8_t ep_addr); void (*ep_stall_clear) (usb_dev *udev, uint8_t ep_addr); - uint8_t (*ep_status_get) (usb_dev *udev, uint8_t ep_addr); + uint16_t (*ep_status_get) (usb_dev *udev, uint8_t ep_addr); }; extern usbd_int_cb_struct *usbd_int_fops; @@ -316,7 +340,7 @@ __STATIC_INLINE void usbd_ep_clear_stall (usb_dev *udev, uint8_t ep_addr) \param[out] none \retval none */ -__STATIC_INLINE uint8_t usbd_ep_status_get (usb_dev *udev, uint8_t ep_addr) +__STATIC_INLINE uint16_t usbd_ep_status_get (usb_dev *udev, uint8_t ep_addr) { return udev->drv_handler->ep_status_get(udev, ep_addr); } diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_enum.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_enum.h index 119ec971..54a1b8dc 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_enum.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_enum.h @@ -3,10 +3,11 @@ \brief USB enumeration definitions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -36,7 +37,6 @@ OF SUCH DAMAGE. #define __USBD_ENUM_H #include "usbd_core.h" -#include "usb_ch9_std.h" #ifndef NULL #define NULL 0U @@ -58,7 +58,7 @@ enum _str_index STR_IDX_SERIAL = 0x3U, /* serial string index */ STR_IDX_CONFIG = 0x4U, /* configuration string index */ STR_IDX_ITF = 0x5U, /* interface string index */ - STR_IDX_MAX = 0x6U /* string index max value */ + STR_IDX_MAX = 0xEFU /* string index max value */ }; /* PWR status enumeration */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_pwr.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_pwr.h index bcb158fa..10ac35ae 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_pwr.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_pwr.h @@ -3,10 +3,11 @@ \brief USB device power management functions prototype \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_transc.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_transc.h index 5499afad..b0f4c01b 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_transc.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Include/usbd_transc.h @@ -3,10 +3,11 @@ \brief USBD transaction \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -39,9 +40,10 @@ OF SUCH DAMAGE. /*! \brief USB transaction configure - \param[in] udev: pointer to USB device instance + \param[in] transc: pointer to USB device transaction instance \param[in] buf: transfer data buffer \param[in] len: transfer data length + \param[in] count: transfer data counter \param[out] none \retval none */ @@ -52,6 +54,80 @@ __STATIC_INLINE void usb_transc_config (usb_transc *transc, uint8_t *buf, uint16 transc->xfer_count = count; } +/*! + \brief USB stalled transaction + \param[in] udev: pointer to USB device instance + \param[out] none + \retval none +*/ +__STATIC_INLINE void usb_stall_transc (usb_dev *udev) +{ + usbd_ep_stall(udev, 0x0U); +} + +/*! + \brief USB control transaction status in stage + \param[in] udev: pointer to USB device instance + \param[out] none + \retval none +*/ +__STATIC_INLINE void usb_ctl_status_in (usb_dev *udev) +{ + udev->control.ctl_state = USBD_CTL_STATUS_IN; + + udev->drv_handler->ep_write(udev->transc_in[0].xfer_buf, 0U, 0U); +} + +/*! + \brief USB control transaction data in stage + \param[in] udev: pointer to USB device instance + \param[out] none + \retval none +*/ +__STATIC_INLINE void usb_ctl_data_in (usb_dev *udev) +{ + udev->control.ctl_state = USBD_CTL_DATA_IN; + + usbd_ep_send(udev, 0U, udev->transc_in[0].xfer_buf, udev->transc_in[0].xfer_len); +} + +/*! + \brief USB control transaction data out & status out stage + \param[in] udev: pointer to USB device instance + \param[out] none + \retval none +*/ +__STATIC_INLINE void usb_ctl_data_out (usb_dev *udev) +{ + udev->control.ctl_state = USBD_CTL_DATA_OUT; + + udev->drv_handler->ep_rx_enable(udev, 0U); +} + +/*! + \brief USB control transaction status OUT stage + \param[in] udev: pointer to USB device instance + \param[out] none + \retval none +*/ +static inline void usb_ctl_status_out (usb_dev *udev) +{ + udev->control.ctl_state = USBD_CTL_STATUS_OUT; + + udev->drv_handler->ep_rx_enable(udev, 0U); +} + +/*! + \brief USB send 0 length data packet + \param[in] udev: pointer to USB device instance + \param[out] none + \retval none +*/ +__STATIC_INLINE void usb_0len_packet_send (usb_dev *udev) +{ + udev->drv_handler->ep_write(udev->transc_in[0].xfer_buf, 0U, 0U); +} + /* function declarations */ /* process USB SETUP transaction */ void _usb_setup_transc (usb_dev *udev, uint8_t ep_num); diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_core.c index 9fef40ec..31c12ee3 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_core.c @@ -3,10 +3,11 @@ \brief USB device driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -42,9 +43,8 @@ usbd_int_cb_struct *usbd_int_fops = NULL; /*! \brief configure USB device initialization \param[in] udev: pointer to USB core instance - \param[in] core: endpoint address + \param[in] desc: pointer to USB descriptor \param[in] usbc: USB class - \param[in] usbha: USB handler \param[out] none \retval none */ @@ -61,6 +61,8 @@ void usbd_init (usb_dev *udev, usb_desc *desc, usb_class *usbc) udev->class_core = usbc; udev->drv_handler = &usbd_drv_handler; + udev->control.ctl_state = USBD_CTL_IDLE; + udev->ep_transc[0][TRANSC_SETUP] = _usb_setup_transc; udev->ep_transc[0][TRANSC_OUT] = _usb_out0_transc; udev->ep_transc[0][TRANSC_IN] = _usb_in0_transc; diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_enum.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_enum.c index 52bf2921..7c704ad8 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_enum.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_enum.c @@ -3,10 +3,12 @@ \brief USB enumeration function \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2021-09-27, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -48,11 +50,13 @@ static usb_reqsta _usb_std_reserved (usb_dev *udev, usb_req *req); static usb_reqsta _usb_std_getinterface (usb_dev *udev, usb_req *req); static usb_reqsta _usb_std_setinterface (usb_dev *udev, usb_req *req); static usb_reqsta _usb_std_synchframe (usb_dev *udev, usb_req *req); -static uint8_t* _usb_dev_desc_get (usb_dev *udev, uint8_t index, uint16_t *len); -static uint8_t* _usb_config_desc_get (usb_dev *udev, uint8_t index, uint16_t *len); -static uint8_t* _usb_str_desc_get (usb_dev *udev, uint8_t index, uint16_t *len); -static uint8_t* _usb_bos_desc_get (usb_dev *udev, uint8_t index, uint16_t *len); -static void int_to_unicode (uint32_t value, uint8_t *pbuf, uint8_t len); + +static uint8_t* _usb_dev_desc_get (usb_dev *udev, uint8_t index, uint16_t *len); +static uint8_t* _usb_config_desc_get (usb_dev *udev, uint8_t index, uint16_t *len); +static uint8_t* _usb_str_desc_get (usb_dev *udev, uint8_t index, uint16_t *len); +static uint8_t* _usb_bos_desc_get (usb_dev *udev, uint8_t index, uint16_t *len); + +static void int_to_unicode (uint32_t value, uint8_t *pbuf, uint8_t len); /* standard device request handler */ static usb_reqsta (*_std_dev_req[]) (usb_dev *udev, usb_req *req) = { @@ -170,7 +174,7 @@ static uint8_t* _usb_config_desc_get (usb_dev *udev, uint8_t index, uint16_t *le { (void)index; - *len = udev->desc->config_desc[2]; + *len = udev->desc->config_desc[2] | (udev->desc->config_desc[3]<< 8); return udev->desc->config_desc; } @@ -253,12 +257,14 @@ static usb_reqsta _usb_std_getstatus (usb_dev *udev, usb_req *req) break; } break; + /* handle interface get status request */ case USB_RECPTYPE_ITF: if (((uint8_t)USBD_CONFIGURED == udev->cur_status) && (recp < USBD_ITF_MAX_NUM)) { req_status = REQ_SUPP; } break; + /* handle endpoint get status request */ case USB_RECPTYPE_EP: if ((uint8_t)USBD_CONFIGURED == udev->cur_status) { @@ -315,14 +321,16 @@ static usb_reqsta _usb_std_clearfeature (usb_dev *udev, usb_req *req) /* get endpoint address */ ep = BYTE_LOW(req->wIndex); - if ((uint8_t)USBD_CONFIGURED == udev->cur_status) { + if (((uint8_t)USBD_CONFIGURED == udev->cur_status) && (EP_ID(ep) < EP_COUNT)) { /* clear endpoint halt feature */ if (((uint16_t)USB_FEATURE_EP_HALT == req->wValue) && (!CTL_EP(ep))) { - usbd_ep_clear_stall(udev, ep); - - udev->class_core->req_process(udev, req); + /* check whether the endpoint status is disabled */ + if(0U != usbd_ep_status_get(udev, ep)){ + usbd_ep_clear_stall(udev, ep); + udev->class_core->req_process(udev, req); - return REQ_SUPP; + return REQ_SUPP; + } } } break; @@ -370,12 +378,16 @@ static usb_reqsta _usb_std_setfeature (usb_dev *udev, usb_req *req) /* get endpoint address */ ep = BYTE_LOW(req->wIndex); - if ((uint8_t)USBD_CONFIGURED == udev->cur_status) { + if (((uint8_t)USBD_CONFIGURED == udev->cur_status) && (EP_ID(ep) < EP_COUNT)) { /* set endpoint halt feature */ - if (((uint8_t)USB_FEATURE_EP_HALT == req->wValue) && (!CTL_EP(ep))) { - usbd_ep_stall(udev, ep); + if (((uint16_t)USB_FEATURE_EP_HALT == req->wValue) && (!CTL_EP(ep))) { + /* check whether the endpoint status is disabled */ + if(0U != usbd_ep_status_get(udev, ep)){ + usbd_ep_stall(udev, ep); + udev->class_core->req_process(udev, req); - return REQ_SUPP; + return REQ_SUPP; + } } } break; @@ -658,6 +670,8 @@ static usb_reqsta _usb_std_setinterface (usb_dev *udev, usb_req *req) if (BYTE_LOW(req->wIndex) < USBD_ITF_MAX_NUM) { udev->class_core->req_altset = (uint8_t)req->wValue; + udev->class_core->req_process(udev, req); + return REQ_SUPP; } break; @@ -712,7 +726,7 @@ static void int_to_unicode (uint32_t value, uint8_t *pbuf, uint8_t len) /*! \brief convert hex 32bits value into unicode char - \param[in] none + \param[in] unicode_str: pointer to unicode string \param[out] none \retval none */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_pwr.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_pwr.c index 4ca50fd4..0bd96eb6 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_pwr.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_pwr.c @@ -3,10 +3,11 @@ \brief USB device power management driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_transc.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_transc.c index 4bd3c897..5059f54c 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_transc.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/device/Source/usbd_transc.c @@ -3,10 +3,11 @@ \brief USBD transaction function \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -37,9 +38,10 @@ OF SUCH DAMAGE. /* local function prototypes ('static') */ static inline void usb_stall_transc (usb_dev *udev); +static inline void usb_ctl_data_in(usb_dev *udev); static inline void usb_ctl_status_in (usb_dev *udev); -static inline void usb_ctl_data_in (usb_dev *udev); -static inline void usb_ctl_out (usb_dev *udev); +static inline void usb_ctl_data_out (usb_dev *udev); +static inline void usb_ctl_status_out (usb_dev *udev); static inline void usb_0len_packet_send (usb_dev *udev); /*! @@ -91,7 +93,7 @@ void _usb_setup_transc (usb_dev *udev, uint8_t ep_num) usb_ctl_data_in(udev); } else { /* USB control transfer data out stage */ - usb_ctl_out(udev); + usb_ctl_data_out(udev); } } } else { @@ -113,10 +115,16 @@ void _usb_out0_transc (usb_dev *udev, uint8_t ep_num) (void)udev->class_core->ctlx_out(udev); } - usb_transc_config(&udev->transc_out[ep_num], NULL, 0U, 0U); + if (USBD_CTL_DATA_OUT == udev->control.ctl_state) { + /* enter the control transaction status IN stage */ + usb_ctl_status_in(udev); + } else if (USBD_CTL_STATUS_OUT == udev->control.ctl_state) { + usb_transc_config(&udev->transc_out[ep_num], NULL, 0U, 0U); - /* enter the control transaction status in stage */ - usb_ctl_status_in(udev); + udev->control.ctl_state = USBD_CTL_IDLE; + } else { + /* no operation */ + } } /*! @@ -141,8 +149,12 @@ void _usb_in0_transc (usb_dev *udev, uint8_t ep_num) (void)udev->class_core->ctlx_in(udev); } - /* USB control transfer status out stage */ - usb_ctl_out(udev); + if (USBD_CTL_DATA_IN == udev->control.ctl_state) { + /* USB control transfer status OUT stage */ + usb_ctl_status_out(udev); + } else if (USBD_CTL_STATUS_IN == udev->control.ctl_state) { + udev->control.ctl_state = USBD_CTL_IDLE; + } if (0U != udev->dev_addr) { udev->drv_handler->set_addr(udev); @@ -150,58 +162,3 @@ void _usb_in0_transc (usb_dev *udev, uint8_t ep_num) udev->dev_addr = 0U; } } - -/*! - \brief USB stalled transaction - \param[in] udev: pointer to USB device instance - \param[out] none - \retval none -*/ -static inline void usb_stall_transc (usb_dev *udev) -{ - usbd_ep_stall(udev, 0x0U); -} - -/*! - \brief USB control transaction status in stage - \param[in] udev: pointer to USB device instance - \param[out] none - \retval none -*/ -static inline void usb_ctl_status_in (usb_dev *udev) -{ - udev->drv_handler->ep_write(udev->transc_in[0].xfer_buf, 0U, 0U); -} - -/*! - \brief USB control transaction data in stage - \param[in] udev: pointer to USB device instance - \param[out] none - \retval none -*/ -static inline void usb_ctl_data_in (usb_dev *udev) -{ - usbd_ep_send(udev, 0U, udev->transc_in[0].xfer_buf, udev->transc_in[0].xfer_len); -} - -/*! - \brief USB control transaction data out & status out stage - \param[in] udev: pointer to USB device instance - \param[out] none - \retval none -*/ -static inline void usb_ctl_out (usb_dev *udev) -{ - udev->drv_handler->ep_rx_enable(udev, 0U); -} - -/*! - \brief USB send 0 length data packet - \param[in] udev: pointer to USB device instance - \param[out] none - \retval none -*/ -static inline void usb_0len_packet_send (usb_dev *udev) -{ - udev->drv_handler->ep_write(udev->transc_in[0].xfer_buf, 0U, 0U); -} diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_core.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_core.h index b14a9130..bfd47933 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_core.h @@ -3,10 +3,11 @@ \brief USB device low level driver core \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_int.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_int.h index 7565660b..71e353e5 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_int.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_int.h @@ -3,10 +3,11 @@ \brief USB device low level interrupt handler \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_regs.h b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_regs.h index 6d357cfc..ca04d56c 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_regs.h +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Include/usbd_lld_regs.h @@ -3,10 +3,11 @@ \brief USB device low level registers \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -211,13 +212,13 @@ OF SUCH DAMAGE. /* clear EPxCS_RX_DTG or EPxCS_TX_DTG bit in the endpoint control and status register */ #define USBD_TX_DTG_CLEAR(ep) do {\ - if ((USBD_EPxCS(ep_num) & EPxCS_TX_DTG) != 0U) {\ + if ((USBD_EPxCS(ep) & EPxCS_TX_DTG) != 0U) {\ USBD_TX_DTG_TOGGLE(ep);\ } \ } while(0) #define USBD_RX_DTG_CLEAR(ep) do {\ - if ((USBD_EPxCS(ep_num) & EPxCS_RX_DTG) != 0U) {\ + if ((USBD_EPxCS(ep) & EPxCS_RX_DTG) != 0U) {\ USBD_RX_DTG_TOGGLE(ep);\ } \ } while(0) diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Source/usbd_lld_core.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Source/usbd_lld_core.c index 77e0c3ba..08d8c831 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Source/usbd_lld_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Source/usbd_lld_core.c @@ -3,10 +3,12 @@ \brief USB device low level driver core \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2021-08-10, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -47,7 +49,8 @@ static usbd_ep_ram btable_ep[EP_COUNT]__attribute__((at(USBD_RAM + 2 * (BTABLE_O usb_core_drv usbd_core; -static const uint32_t ep_type[] = { +static const uint32_t ep_type[] = +{ [USB_EP_ATTR_CTL] = EP_CONTROL, [USB_EP_ATTR_BULK] = EP_BULK, [USB_EP_ATTR_INT] = EP_INTERRUPT, @@ -70,9 +73,10 @@ static uint16_t usbd_ep_data_read (uint8_t *user_fifo, uint8_t ep_num, uint8_t b static void usbd_resume (usb_dev *udev); static void usbd_suspend (void); static void usbd_leave_suspend (void); -static uint8_t usbd_ep_status (usb_dev *udev, uint8_t ep_addr); +static uint16_t usbd_ep_status (usb_dev *udev, uint8_t ep_addr); -struct _usb_handler usbd_drv_handler = { +struct _usb_handler usbd_drv_handler = +{ .dp_pullup = usbd_dp_pullup, .init = usbd_core_reset, .deinit = usbd_core_stop, @@ -217,7 +221,7 @@ static void usbd_ep_reset (usb_dev *udev) /* reset non-control endpoints */ for (i = 1U; i < EP_COUNT; i++) { - USBD_EPxCS(i) = (USBD_EPxCS(i) & EPCS_MASK) | i; + USBD_EPxCS(i) = (USBD_EPxCS(i) & (~EPCS_MASK)) | i; } /* clear endpoint 0 register */ @@ -254,7 +258,7 @@ static void usbd_ep_setup (usb_dev *udev, uint8_t buf_kind, uint32_t buf_addr, c if (EP_DIR(ep_addr)) { transc = &udev->transc_in[ep_num]; - transc->max_len = (uint8_t)max_len; + transc->max_len = max_len; if ((uint8_t)EP_BUF_SNG == buf_kind) { btable_ep[ep_num].tx_addr = buf_addr; @@ -275,7 +279,7 @@ static void usbd_ep_setup (usb_dev *udev, uint8_t buf_kind, uint32_t buf_addr, c } else { transc = &udev->transc_out[ep_num]; - transc->max_len = (uint8_t)max_len; + transc->max_len = max_len; if ((uint8_t)EP_BUF_SNG == buf_kind) { btable_ep[ep_num].rx_addr = buf_addr; @@ -406,21 +410,25 @@ static void usbd_ep_stall_clear (usb_dev *udev, uint8_t ep_addr) uint8_t ep_num = EP_ID(ep_addr); if (EP_DIR(ep_addr)) { - /* clear endpoint data toggle bit */ - USBD_TX_DTG_CLEAR(ep_num); + if(EPTX_STALL == usbd_ep_status_get(udev, ep_addr)){ + /* clear endpoint data toggle bit */ + USBD_TX_DTG_CLEAR(ep_num); - udev->transc_in[ep_num].ep_stall = 0U; + udev->transc_in[ep_num].ep_stall = 0U; - /* clear endpoint stall status */ - USBD_EP_TX_STAT_SET(ep_num, EPTX_VALID); + /* clear endpoint stall status */ + USBD_EP_TX_STAT_SET(ep_num, EPTX_VALID); + } } else { - /* clear endpoint data toggle bit */ - USBD_RX_DTG_CLEAR(ep_num); + if(EPRX_STALL == usbd_ep_status_get(udev, ep_addr)){ + /* clear endpoint data toggle bit */ + USBD_RX_DTG_CLEAR(ep_num); - udev->transc_out[ep_num].ep_stall = 0U; + udev->transc_out[ep_num].ep_stall = 0U; - /* clear endpoint stall status */ - USBD_EP_RX_STAT_SET(ep_num, EPRX_VALID); + /* clear endpoint stall status */ + USBD_EP_RX_STAT_SET(ep_num, EPRX_VALID); + } } } @@ -434,16 +442,16 @@ static void usbd_ep_stall_clear (usb_dev *udev, uint8_t ep_addr) \param[out] none \retval endpoint status */ -static uint8_t usbd_ep_status (usb_dev *udev, uint8_t ep_addr) +static uint16_t usbd_ep_status (usb_dev *udev, uint8_t ep_addr) { (void)udev; uint32_t epcs = USBD_EPxCS(EP_ID(ep_addr)); if (EP_DIR(ep_addr)) { - return (uint8_t)(epcs & EPxCS_TX_STA); + return (uint16_t)(epcs & EPxCS_TX_STA); } else { - return (uint8_t)(epcs & EPxCS_RX_STA); + return (uint16_t)(epcs & EPxCS_RX_STA); } } @@ -521,6 +529,8 @@ static uint16_t usbd_ep_data_read (uint8_t *user_fifo, uint8_t ep_num, uint8_t b */ static void lowpower_mode_exit (void) { + uint32_t system_clock = 0; + /* restore system clock */ #ifdef LPM_ENABLED @@ -530,6 +540,20 @@ static void lowpower_mode_exit (void) /* wait till IRC8M is ready */ while (RESET == rcu_flag_get(RCU_FLAG_IRC8MSTB)) { } + + rcu_pll_config(RCU_PLLSRC_IRC8M_DIV2,RCU_PLL_MUL2); + + /* IRC8M is stable */ + /* AHB = SYSCLK */ + RCU_CFG0 |= RCU_AHB_CKSYS_DIV1; + /* APB2 = AHB/1 */ + RCU_CFG0 |= RCU_APB2_CKAHB_DIV1; + /* APB1 = AHB/2 */ + RCU_CFG0 |= RCU_APB1_CKAHB_DIV2; + + /* CK_PLL = (CK_IRC8M/2) * 30 = 120 MHz */ + RCU_CFG0 &= ~(RCU_CFG0_PLLMF | RCU_CFG0_PLLMF_4 | RCU_CFG0_PLLMF_5); + RCU_CFG0 |= RCU_PLL_MUL30; #else /* enable HXTAL */ rcu_osci_on(RCU_HXTAL); @@ -555,17 +579,25 @@ static void lowpower_mode_exit (void) /* low power sleep on exit disabled */ system_lowpower_reset(SCB_LPM_DEEPSLEEP); - -#ifdef USE_IRC48M - /* enable IRC48M clock */ - rcu_osci_on(RCU_IRC48M); - - /* wait till IRC48M is ready */ - while (SUCCESS != rcu_osci_stab_wait(RCU_IRC48M)) { + + rcu_periph_clock_disable(RCU_USBD); + + system_clock = rcu_clock_freq_get(CK_SYS); + + if (48000000U == system_clock) { + rcu_usb_clock_config(RCU_CKUSB_CKPLL_DIV1); + } else if (72000000U == system_clock) { + rcu_usb_clock_config(RCU_CKUSB_CKPLL_DIV1_5); + } else if (96000000U == system_clock) { + rcu_usb_clock_config(RCU_CKUSB_CKPLL_DIV2); + } else if (120000000U == system_clock) { + rcu_usb_clock_config(RCU_CKUSB_CKPLL_DIV2_5); + } else { + /* reserved */ } - - rcu_ck48m_clock_config(RCU_CK48MSRC_IRC48M); -#endif + + /* enable USB APB1 clock */ + rcu_periph_clock_enable(RCU_USBD); } #endif /* USBD_LOWPWR_MODE_ENABLE */ @@ -628,7 +660,7 @@ static void usbd_suspend (void) /* check wakeup flag is set */ if (0U == (USBD_INTF & INTF_WKUPIF)) { /* enter DEEP_SLEEP mode with LDO in low power mode */ - pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, WFI_CMD); + pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, PMU_LOWDRIVER_DISABLE, WFI_CMD); } else { /* clear wakeup interrupt flag */ CLR(WKUPIF); diff --git a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Source/usbd_lld_int.c b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Source/usbd_lld_int.c index d81333dd..ac5f7b50 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Source/usbd_lld_int.c +++ b/system/GD32F30x_firmware/GD32F30x_usbd_library/usbd/Source/usbd_lld_int.c @@ -3,10 +3,11 @@ \brief USB device low level interrupt routines \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -103,7 +104,10 @@ void usbd_int_hpst (usb_dev *udev) void usbd_isr (void) { __IO uint16_t int_status = (uint16_t)USBD_INTF; - __IO uint16_t int_flag = (uint16_t)(USBD_INTF & (USBD_CTL & USBD_INTEN)); + __IO uint16_t int_flag = (uint16_t)(USBD_INTF & USBD_INTEN); + uint16_t ctl_reg = (uint16_t)(USBD_CTL); + + int_flag &= ctl_reg; usb_dev *udev = usbd_core.dev; @@ -121,7 +125,7 @@ void usbd_isr (void) if (USBD_EPxCS(ep_num) & EPxCS_SETUP) { - if (ep_num == 0U) { + if (0U == ep_num) { udev->ep_transc[ep_num][TRANSC_SETUP](udev, ep_num); } else { return; @@ -151,7 +155,7 @@ void usbd_isr (void) usb_transc *transc = &udev->transc_in[ep_num]; - if (transc->xfer_len == 0U) { + if (0U == transc->xfer_len) { if (udev->ep_transc[ep_num][TRANSC_IN]) { udev->ep_transc[ep_num][TRANSC_IN](udev, ep_num); } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Include/audio_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Include/audio_core.h index 69496893..a9e1a5ff 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Include/audio_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Include/audio_core.h @@ -3,10 +3,11 @@ \brief the header file of USB audio device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -37,92 +38,90 @@ OF SUCH DAMAGE. #include "usbd_enum.h" -#define FORMAT_24BIT(x) (uint8_t)(x);(uint8_t)(x >> 8U);(uint8_t)(x >> 16U) +#define FORMAT_24BIT(x) (uint8_t)(x);(uint8_t)((x) >> 8U);(uint8_t)((x) >> 16U) /* number of sub-packets in the audio transfer buffer. you can modify this value but always make sure that it is an even number and higher than 3 */ -#define OUT_PACKET_NUM 4U +#define OUT_PACKET_NUM 120U /* total size of the audio transfer buffer */ -#define OUT_BUF_MARGIN 4U -#define TOTAL_OUT_BUF_SIZE ((uint32_t)((SPEAKER_OUT_PACKET + OUT_BUF_MARGIN) * OUT_PACKET_NUM)) +#define OUT_BUF_MARGIN 0U +#define TOTAL_OUT_BUF_SIZE ((uint32_t)((SPEAKER_OUT_PACKET + OUT_BUF_MARGIN) * OUT_PACKET_NUM)) -#define AUDIO_CONFIG_DESC_SET_LEN (sizeof(usb_desc_config_set)) -#define AUDIO_INTERFACE_DESC_SIZE 9U +#define AD_CONFIG_DESC_SET_LEN (sizeof(usb_desc_config_set)) +#define AD_INTERFACE_DESC_SIZE 9U -#define USB_AUDIO_DESC_SIZ 0x09U -#define AUDIO_STANDARD_EP_DESC_SIZE 0x09U -#define AUDIO_STREAMING_EP_DESC_SIZE 0x07U +#define USB_AD_DESC_SIZ 0x09U +#define AD_STANDARD_EP_DESC_SIZE 0x09U +#define AD_STREAMING_EP_DESC_SIZE 0x07U /* audio interface class code */ -#define USB_CLASS_AUDIO 0x01U +#define USB_CLASS_AUDIO 0x01U /* audio interface subclass codes */ -#define AUDIO_SUBCLASS_CONTROL 0x01U -#define AUDIO_SUBCLASS_AUDIOSTREAMING 0x02U -#define AUDIO_SUBCLASS_MIDISTREAMING 0x03U +#define AD_SUBCLASS_CONTROL 0x01U +#define AD_SUBCLASS_AUDIOSTREAMING 0x02U +#define AD_SUBCLASS_MIDISTREAMING 0x03U /* audio interface protocol codes */ -#define AUDIO_PROTOCOL_UNDEFINED 0x00U -#define AUDIO_STREAMING_GENERAL 0x01U -#define AUDIO_STREAMING_FORMAT_TYPE 0x02U +#define AD_PROTOCOL_UNDEFINED 0x00U +#define AD_STREAMING_GENERAL 0x01U +#define AD_STREAMING_FORMAT_TYPE 0x02U /* audio class-specific descriptor types */ -#define AUDIO_DESCTYPE_UNDEFINED 0x20U -#define AUDIO_DESCTYPE_DEVICE 0x21U -#define AUDIO_DESCTYPE_CONFIGURATION 0x22U -#define AUDIO_DESCTYPE_STRING 0x23U -#define AUDIO_DESCTYPE_INTERFACE 0x24U -#define AUDIO_DESCTYPE_ENDPOINT 0x25U +#define AD_DESCTYPE_UNDEFINED 0x20U +#define AD_DESCTYPE_DEVICE 0x21U +#define AD_DESCTYPE_CONFIGURATION 0x22U +#define AD_DESCTYPE_STRING 0x23U +#define AD_DESCTYPE_INTERFACE 0x24U +#define AD_DESCTYPE_ENDPOINT 0x25U /* audio control interface descriptor subtypes */ -#define AUDIO_CONTROL_HEADER 0x01U -#define AUDIO_CONTROL_INPUT_TERMINAL 0x02U -#define AUDIO_CONTROL_OUTPUT_TERMINAL 0x03U -#define AUDIO_CONTROL_MIXER_UNIT 0x04U -#define AUDIO_CONTROL_SELECTOR_UNIT 0x05U -#define AUDIO_CONTROL_FEATURE_UNIT 0x06U -#define AUDIO_CONTROL_PROCESSING_UNIT 0x07U -#define AUDIO_CONTROL_EXTENSION_UNIT 0x08U - -#define AUDIO_INPUT_TERMINAL_DESC_SIZE 0x0CU -#define AUDIO_OUTPUT_TERMINAL_DESC_SIZE 0x09U -#define AUDIO_STREAMING_INTERFACE_DESC_SIZE 0x07U - -#define AUDIO_CONTROL_MUTE 0x01U -#define AUDIO_CONTROL_VOLUME 0x02U - -#define AUDIO_FORMAT_TYPE_I 0x01U -#define AUDIO_FORMAT_TYPE_III 0x03U - -#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01U -#define AUDIO_ENDPOINT_GENERAL 0x01U - -#define AUDIO_REQ_UNDEFINED 0x00U -#define AUDIO_REQ_SET_CUR 0x01U -#define AUDIO_REQ_GET_CUR 0x81U -#define AUDIO_REQ_SET_MIN 0x02U -#define AUDIO_REQ_GET_MIN 0x82U -#define AUDIO_REQ_SET_MAX 0x03U -#define AUDIO_REQ_GET_MAX 0x83U -#define AUDIO_REQ_SET_RES 0x04U -#define AUDIO_REQ_GET_RES 0x84U -#define AUDIO_REQ_SET_MEM 0x05U -#define AUDIO_REQ_GET_MEM 0x85U -#define AUDIO_REQ_GET_STAT 0xFFU - -#define AUDIO_OUT_STREAMING_CTRL 0x05U -#define AUDIO_IN_STREAMING_CTRL 0x02U +#define AD_CONTROL_HEADER 0x01U +#define AD_CONTROL_INPUT_TERMINAL 0x02U +#define AD_CONTROL_OUTPUT_TERMINAL 0x03U +#define AD_CONTROL_MIXER_UNIT 0x04U +#define AD_CONTROL_SELECTOR_UNIT 0x05U +#define AD_CONTROL_FEATURE_UNIT 0x06U +#define AD_CONTROL_PROCESSING_UNIT 0x07U +#define AD_CONTROL_EXTENSION_UNIT 0x08U + +#define AD_INPUT_TERMINAL_DESC_SIZE 0x0CU +#define AD_OUTPUT_TERMINAL_DESC_SIZE 0x09U +#define AD_STREAMING_INTERFACE_DESC_SIZE 0x07U + +#define AD_CONTROL_MUTE 0x01U +#define AD_CONTROL_VOLUME 0x02U + +#define AD_FORMAT_TYPE_I 0x01U +#define AD_FORMAT_TYPE_III 0x03U + +#define USB_ENDPOINT_TYPE_ISOCHRONOUS 0x01U +#define AD_ENDPOINT_GENERAL 0x01U + +#define AD_REQ_UNDEFINED 0x00U +#define AD_REQ_SET_CUR 0x01U +#define AD_REQ_GET_CUR 0x81U +#define AD_REQ_SET_MIN 0x02U +#define AD_REQ_GET_MIN 0x82U +#define AD_REQ_SET_MAX 0x03U +#define AD_REQ_GET_MAX 0x83U +#define AD_REQ_SET_RES 0x04U +#define AD_REQ_GET_RES 0x84U +#define AD_REQ_SET_MEM 0x05U +#define AD_REQ_GET_MEM 0x85U +#define AD_REQ_GET_STAT 0xFFU + +#define AD_OUT_STREAMING_CTRL 0x05U +#define AD_IN_STREAMING_CTRL 0x02U /* audio stream interface number */ enum { -#ifdef USE_USB_AUDIO_MICPHONE +#ifdef USE_USB_AD_MICPHONE MIC_INTERFACE_COUNT, -#endif -#ifdef USE_USB_AUDIO_SPEAKER +#endif /* USE_USB_AD_MICPHONE */ SPEAK_INTERFACE_COUNT, -#endif CONFIG_DESC_AS_ITF_COUNT, }; @@ -138,13 +137,11 @@ typedef struct uint16_t bcdADC; /*!< audio device class specification release number in binary-coded decimal */ uint16_t wTotalLength; /*!< total number of bytes */ uint8_t bInCollection; /*!< the number of the streaming interfaces */ -#ifdef USE_USB_AUDIO_MICPHONE +#ifdef USE_USB_AD_MICPHONE uint8_t baInterfaceNr0; /*!< interface number of the streaming interfaces */ -#endif +#endif /* USE_USB_AD_MICPHONE */ -#ifdef USE_USB_AUDIO_SPEAKER uint8_t baInterfaceNr1; /*!< interface number of the streaming interfaces */ -#endif } usb_desc_AC_itf; typedef struct @@ -237,64 +234,79 @@ typedef struct uint16_t wLockDelay; /*!< indicates the time it takes this endpoint to reliably lock its internal clock recovery circuitry */ } usb_desc_AS_ep; +typedef struct +{ + usb_desc_header header; /*!< descriptor header, including type and size */ + uint8_t bEndpointAddress; /*!< EP_GENERAL descriptor subtype */ + uint8_t bmAttributes; /*!< transfer type and synchronization type */ + uint16_t wMaxPacketSize; /*!< maximum packet size this endpoint is capable of sending or receiving */ + uint8_t bInterval; /*!< polling interval in milliseconds for the endpoint if it is an INTERRUPT or ISOCHRONOUS type */ + uint8_t Refresh; /*!< bRefresh 1~9, power of 2 */ + uint8_t bSynchAddress; /* bSynchAddress */ +} usb_desc_FeedBack_ep; + #pragma pack() /* USB configuration descriptor structure */ typedef struct { - usb_desc_config config; - usb_desc_itf std_itf; - usb_desc_AC_itf ac_itf; - -#ifdef USE_USB_AUDIO_MICPHONE - usb_desc_input_terminal mic_in_terminal; - usb_desc_mono_feature_unit mic_feature_unit; - usb_desc_output_terminal mic_out_terminal; -#endif - -#ifdef USE_USB_AUDIO_SPEAKER - usb_desc_input_terminal speak_in_terminal; - usb_desc_mono_feature_unit speak_feature_unit; - usb_desc_output_terminal speak_out_terminal; + usb_desc_config config; + usb_desc_itf std_itf; + usb_desc_AC_itf ac_itf; + +#ifdef USE_USB_AD_MICPHONE + usb_desc_input_terminal mic_in_terminal; + usb_desc_mono_feature_unit mic_feature_unit; + usb_desc_output_terminal mic_out_terminal; #endif -#ifdef USE_USB_AUDIO_MICPHONE - usb_desc_itf mic_std_as_itf_zeroband; - usb_desc_itf mic_std_as_itf_opera; - usb_desc_AS_itf mic_as_itf; - usb_desc_format_type mic_format_typeI; - usb_desc_std_ep mic_std_endpoint; - usb_desc_AS_ep mic_as_endpoint; + usb_desc_input_terminal speak_in_terminal; + usb_desc_mono_feature_unit speak_feature_unit; + usb_desc_output_terminal speak_out_terminal; + +#ifdef USE_USB_AD_MICPHONE + usb_desc_itf mic_std_as_itf_zeroband; + usb_desc_itf mic_std_as_itf_opera; + usb_desc_AS_itf mic_as_itf; + usb_desc_format_type mic_format_typeI; + usb_desc_std_ep mic_std_endpoint; + usb_desc_AS_ep mic_as_endpoint; #endif -#ifdef USE_USB_AUDIO_SPEAKER - usb_desc_itf speak_std_as_itf_zeroband; - usb_desc_itf speak_std_as_itf_opera; - usb_desc_AS_itf speak_as_itf; - usb_desc_format_type speak_format_typeI; - usb_desc_std_ep speak_std_endpoint; - usb_desc_AS_ep speak_as_endpoint; -#endif + usb_desc_itf speak_std_as_itf_zeroband; + usb_desc_itf speak_std_as_itf_opera; + usb_desc_AS_itf speak_as_itf; + usb_desc_format_type speak_format_typeI; + usb_desc_std_ep speak_std_endpoint; + usb_desc_AS_ep speak_as_endpoint; + usb_desc_FeedBack_ep speak_feedback_endpoint; } usb_desc_config_set; typedef struct { /* main buffer for audio data out transfers and its relative pointers */ - uint8_t isoc_out_buff[TOTAL_OUT_BUF_SIZE * 2U]; + uint8_t isoc_out_buff[TOTAL_OUT_BUF_SIZE]; uint8_t* isoc_out_wrptr; uint8_t* isoc_out_rdptr; + uint16_t buf_free_size; + uint16_t dam_tx_len; + + __IO uint32_t actual_freq; + __IO uint8_t play_flag; + uint8_t feedback_freq[3]; + uint32_t cur_sam_freq; + + /* usb receive buffer */ + uint8_t usb_rx_buffer[SPEAKER_OUT_MAX_PACKET]; /* main buffer for audio control requests transfers and its relative variables */ uint8_t audioctl[64]; uint8_t audioctl_unit; uint32_t audioctl_len; - -#ifdef USE_USB_AUDIO_SPEAKER - uint32_t play_flag; -#endif /* USE_USB_AUDIO_SPEAKER */ } usbd_audio_handler; extern usb_desc audio_desc; extern usb_class_core usbd_audio_cb; +extern usbd_audio_handler audio_handler; #endif /* __AUDIO_CORE_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Include/audio_out_itf.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Include/audio_out_itf.h index 252d1512..4f4c17b7 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Include/audio_out_itf.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Include/audio_out_itf.h @@ -3,10 +3,11 @@ \brief audio OUT (playback) interface header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -36,39 +37,12 @@ OF SUCH DAMAGE. #define __AUDIO_OUT_ITF_H #include "usbd_conf.h" - -/* audio commands enumeration */ -typedef enum -{ - AUDIO_CMD_PLAY = 1U, - AUDIO_CMD_PAUSE, - AUDIO_CMD_STOP, -}audio_cmd_enum; - -/* mute commands */ -#define AUDIO_MUTE 0x01U -#define AUDIO_UNMUTE 0x00U - -/* functions return value */ -#define AUDIO_OK 0x00U -#define AUDIO_FAIL 0xFFU - -/* audio machine states */ -#define AUDIO_STATE_INACTIVE 0x00U -#define AUDIO_STATE_ACTIVE 0x01U -#define AUDIO_STATE_PLAYING 0x02U -#define AUDIO_STATE_PAUSED 0x03U -#define AUDIO_STATE_STOPPED 0x04U -#define AUDIO_STATE_ERROR 0x05U +#include "string.h" typedef struct { - uint8_t (*audio_init) (uint32_t audio_freq, uint32_t volume, uint32_t options); - uint8_t (*audio_deinit) (uint32_t options); + uint8_t (*audio_init) (uint32_t audio_freq, uint32_t volume); + uint8_t (*audio_deinit) (void); uint8_t (*audio_cmd) (uint8_t* pbuf, uint32_t size, uint8_t cmd); - uint8_t (*audio_volume_ctl) (uint8_t vol); - uint8_t (*audio_mute_ctl) (uint8_t cmd); - uint8_t (*audio_periodic_tc) (uint8_t cmd); - uint8_t (*audio_state_get) (void); } audio_fops_struct; extern audio_fops_struct audio_out_fops; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Source/audio_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Source/audio_core.c index 9b2876c2..1e9e113c 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Source/audio_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Source/audio_core.c @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2020-12-07, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -36,15 +37,23 @@ OF SUCH DAMAGE. #include "audio_out_itf.h" #include "audio_core.h" #include +#include #define USBD_VID 0x28E9U #define USBD_PID 0x9574U -#ifdef USE_USB_AUDIO_MICPHONE +#define VOL_MIN 0U /* volume Minimum Value */ +#define VOL_MAX 100U /* volume Maximum Value */ +#define VOL_RES 1U /* volume Resolution */ +#define VOL_0dB 70U /* 0dB is in the middle of VOL_MIN and VOL_MAX */ + +#ifdef USE_USB_AD_MICPHONE extern volatile uint32_t count_data; extern const char wavetestdata[]; #define LENGTH_DATA (1747 * 32) -#endif +#endif /* USE_USB_AD_MICPHONE */ + +usbd_audio_handler audio_handler; /* local function prototypes ('static') */ static uint8_t audio_init (usb_dev *udev, uint8_t config_index); @@ -54,9 +63,14 @@ static uint8_t audio_set_intf (usb_dev *udev, usb_req *req); static uint8_t audio_ctlx_out (usb_dev *udev); static uint8_t audio_data_in (usb_dev *udev, uint8_t ep_num); static uint8_t audio_data_out (usb_dev *udev, uint8_t ep_num); -static uint8_t usbd_audio_sof (usb_dev *udev); +static uint8_t audio_sof (usb_dev *udev); +static uint8_t audio_iso_in_incomplete (usb_dev *udev); +static uint8_t audio_iso_out_incomplete (usb_dev *udev); +static uint32_t usbd_audio_spk_get_feedback(usb_dev *udev); +static void get_feedback_fs_rate(uint32_t rate, uint8_t *buf); -usb_class_core usbd_audio_cb = { +usb_class_core usbd_audio_cb = +{ .init = audio_init, .deinit = audio_deinit, .req_proc = audio_req_handler, @@ -64,14 +78,11 @@ usb_class_core usbd_audio_cb = { .ctlx_out = audio_ctlx_out, .data_in = audio_data_in, .data_out = audio_data_out, - .SOF = usbd_audio_sof + .SOF = audio_sof, + .incomplete_isoc_in = audio_iso_in_incomplete, + .incomplete_isoc_out = audio_iso_out_incomplete }; -#define VOL_MIN 0U /* Volume Minimum Value */ -#define VOL_MAX 100U /* Volume Maximum Value */ -#define VOL_RES 1U /* Volume Resolution */ -#define VOL_0dB 70U /* 0dB is in the middle of VOL_MIN and VOL_MAX */ - /* note:it should use the c99 standard when compiling the below codes */ /* USB standard device descriptor */ const usb_desc_dev audio_dev_desc = @@ -105,7 +116,7 @@ const usb_desc_config_set audio_config_set = .bLength = sizeof(usb_desc_config), .bDescriptorType = USB_DESCTYPE_CONFIG }, - .wTotalLength = AUDIO_CONFIG_DESC_SET_LEN, + .wTotalLength = AD_CONFIG_DESC_SET_LEN, .bNumInterfaces = 0x01U + CONFIG_DESC_AS_ITF_COUNT, .bConfigurationValue = 0x01U, .iConfiguration = 0x00U, @@ -124,8 +135,8 @@ const usb_desc_config_set audio_config_set = .bAlternateSetting = 0x00U, .bNumEndpoints = 0x00U, .bInterfaceClass = USB_CLASS_AUDIO, - .bInterfaceSubClass = AUDIO_SUBCLASS_CONTROL, - .bInterfaceProtocol = AUDIO_PROTOCOL_UNDEFINED, + .bInterfaceSubClass = AD_SUBCLASS_CONTROL, + .bInterfaceProtocol = AD_PROTOCOL_UNDEFINED, .iInterface = 0x00U }, @@ -134,27 +145,26 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_AC_itf), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, .bDescriptorSubtype = 0x01U, .bcdADC = 0x0100U, .wTotalLength = AC_ITF_TOTAL_LEN, .bInCollection = CONFIG_DESC_AS_ITF_COUNT, -#ifdef USE_USB_AUDIO_MICPHONE +#ifdef USE_USB_AD_MICPHONE .baInterfaceNr0 = 0x01U, #endif -#ifdef USE_USB_AUDIO_SPEAKER .baInterfaceNr1 = 0x02U -#endif + }, -#ifdef USE_USB_AUDIO_MICPHONE +#ifdef USE_USB_AD_MICPHONE .mic_in_terminal = { .header = { .bLength = sizeof(usb_desc_input_terminal), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, .bDescriptorSubtype = 0x02U, .bTerminalID = 0x01U, @@ -171,14 +181,14 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_mono_feature_unit), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_CONTROL_FEATURE_UNIT, - .bUnitID = AUDIO_IN_STREAMING_CTRL, + .bDescriptorSubtype = AD_CONTROL_FEATURE_UNIT, + .bUnitID = AD_IN_STREAMING_CTRL, .bSourceID = 0x01U, .bControlSize = 0x01U, - .bmaControls0 = AUDIO_CONTROL_MUTE, - .bmaControls1 = AUDIO_CONTROL_VOLUME, + .bmaControls0 = AD_CONTROL_MUTE | AD_CONTROL_VOLUME, + .bmaControls1 = 0x00U, .iFeature = 0x00U }, @@ -187,26 +197,25 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_output_terminal), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_CONTROL_OUTPUT_TERMINAL, + .bDescriptorSubtype = AD_CONTROL_OUTPUT_TERMINAL, .bTerminalID = 0x03U, .wTerminalType = 0x0101U, .bAssocTerminal = 0x00U, .bSourceID = 0x02U, .iTerminal = 0x00U }, -#endif +#endif /* USE_USB_AD_MICPHONE */ -#ifdef USE_USB_AUDIO_SPEAKER .speak_in_terminal = { .header = { .bLength = sizeof(usb_desc_input_terminal), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_CONTROL_INPUT_TERMINAL, + .bDescriptorSubtype = AD_CONTROL_INPUT_TERMINAL, .bTerminalID = 0x04U, .wTerminalType = 0x0101U, .bAssocTerminal = 0x00U, @@ -221,14 +230,14 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_mono_feature_unit), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_CONTROL_FEATURE_UNIT, - .bUnitID = AUDIO_OUT_STREAMING_CTRL, + .bDescriptorSubtype = AD_CONTROL_FEATURE_UNIT, + .bUnitID = AD_OUT_STREAMING_CTRL, .bSourceID = 0x04U, .bControlSize = 0x01U, - .bmaControls0 = AUDIO_CONTROL_MUTE, - .bmaControls1 = AUDIO_CONTROL_VOLUME, + .bmaControls0 = AD_CONTROL_MUTE | AD_CONTROL_VOLUME, + .bmaControls1 = 0x00U, .iFeature = 0x00U }, @@ -237,18 +246,17 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_output_terminal), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_CONTROL_OUTPUT_TERMINAL, + .bDescriptorSubtype = AD_CONTROL_OUTPUT_TERMINAL, .bTerminalID = 0x06U, .wTerminalType = 0x0301U, .bAssocTerminal = 0x00U, .bSourceID = 0x05U, .iTerminal = 0x00U }, -#endif -#ifdef USE_USB_AUDIO_MICPHONE +#ifdef USE_USB_AD_MICPHONE .mic_std_as_itf_zeroband = { .header = @@ -260,8 +268,8 @@ const usb_desc_config_set audio_config_set = .bAlternateSetting = 0x00U, .bNumEndpoints = 0x00U, .bInterfaceClass = USB_CLASS_AUDIO, - .bInterfaceSubClass = AUDIO_SUBCLASS_AUDIOSTREAMING, - .bInterfaceProtocol = AUDIO_PROTOCOL_UNDEFINED, + .bInterfaceSubClass = AD_SUBCLASS_AUDIOSTREAMING, + .bInterfaceProtocol = AD_PROTOCOL_UNDEFINED, .iInterface = 0x00U }, @@ -276,8 +284,8 @@ const usb_desc_config_set audio_config_set = .bAlternateSetting = 0x01U, .bNumEndpoints = 0x01U, .bInterfaceClass = USB_CLASS_AUDIO, - .bInterfaceSubClass = AUDIO_SUBCLASS_AUDIOSTREAMING, - .bInterfaceProtocol = AUDIO_PROTOCOL_UNDEFINED, + .bInterfaceSubClass = AD_SUBCLASS_AUDIOSTREAMING, + .bInterfaceProtocol = AD_PROTOCOL_UNDEFINED, .iInterface = 0x00U }, @@ -286,9 +294,9 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_AS_itf), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_STREAMING_GENERAL, + .bDescriptorSubtype = AD_STREAMING_GENERAL, .bTerminalLink = 0x03U, .bDelay = 0x01U, .wFormatTag = 0x0001U, @@ -299,10 +307,10 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_format_type), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_STREAMING_FORMAT_TYPE, - .bFormatType = AUDIO_FORMAT_TYPE_I, + .bDescriptorSubtype = AD_STREAMING_FORMAT_TYPE, + .bFormatType = AD_FORMAT_TYPE_I, .bNrChannels = MIC_IN_CHANNEL_NBR, .bSubFrameSize = 0x02U, .bBitResolution = MIC_IN_BIT_RESOLUTION, @@ -319,7 +327,7 @@ const usb_desc_config_set audio_config_set = .bLength = sizeof(usb_desc_std_ep), .bDescriptorType = USB_DESCTYPE_EP }, - .bEndpointAddress = AUDIO_IN_EP, + .bEndpointAddress = AD_IN_EP, .bmAttributes = USB_ENDPOINT_TYPE_ISOCHRONOUS, .wMaxPacketSize = MIC_IN_PACKET, .bInterval = 0x01U, @@ -332,16 +340,15 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_AS_ep), - .bDescriptorType = AUDIO_DESCTYPE_ENDPOINT + .bDescriptorType = AD_DESCTYPE_ENDPOINT }, - .bDescriptorSubtype = AUDIO_ENDPOINT_GENERAL, + .bDescriptorSubtype = AD_ENDPOINT_GENERAL, .bmAttributes = 0x00U, .bLockDelayUnits = 0x00U, .wLockDelay = 0x0000U, }, -#endif +#endif /* USE_USB_AD_MICPHONE */ -#ifdef USE_USB_AUDIO_SPEAKER .speak_std_as_itf_zeroband = { .header = @@ -353,8 +360,8 @@ const usb_desc_config_set audio_config_set = .bAlternateSetting = 0x00U, .bNumEndpoints = 0x00U, .bInterfaceClass = USB_CLASS_AUDIO, - .bInterfaceSubClass = AUDIO_SUBCLASS_AUDIOSTREAMING, - .bInterfaceProtocol = AUDIO_PROTOCOL_UNDEFINED, + .bInterfaceSubClass = AD_SUBCLASS_AUDIOSTREAMING, + .bInterfaceProtocol = AD_PROTOCOL_UNDEFINED, .iInterface = 0x00U }, @@ -367,10 +374,10 @@ const usb_desc_config_set audio_config_set = }, .bInterfaceNumber = 0x02U, .bAlternateSetting = 0x01U, - .bNumEndpoints = 0x01U, + .bNumEndpoints = 0x02U, .bInterfaceClass = USB_CLASS_AUDIO, - .bInterfaceSubClass = AUDIO_SUBCLASS_AUDIOSTREAMING, - .bInterfaceProtocol = AUDIO_PROTOCOL_UNDEFINED, + .bInterfaceSubClass = AD_SUBCLASS_AUDIOSTREAMING, + .bInterfaceProtocol = AD_PROTOCOL_UNDEFINED, .iInterface = 0x00U }, @@ -379,9 +386,9 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_AS_itf), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_STREAMING_GENERAL, + .bDescriptorSubtype = AD_STREAMING_GENERAL, .bTerminalLink = 0x04U, .bDelay = 0x01U, .wFormatTag = 0x0001U, @@ -392,10 +399,10 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_format_type), - .bDescriptorType = AUDIO_DESCTYPE_INTERFACE + .bDescriptorType = AD_DESCTYPE_INTERFACE }, - .bDescriptorSubtype = AUDIO_STREAMING_FORMAT_TYPE, - .bFormatType = AUDIO_FORMAT_TYPE_I, + .bDescriptorSubtype = AD_STREAMING_FORMAT_TYPE, + .bFormatType = AD_FORMAT_TYPE_I, .bNrChannels = SPEAKER_OUT_CHANNEL_NBR, .bSubFrameSize = 0x02U, .bBitResolution = SPEAKER_OUT_BIT_RESOLUTION, @@ -412,12 +419,12 @@ const usb_desc_config_set audio_config_set = .bLength = sizeof(usb_desc_std_ep), .bDescriptorType = USB_DESCTYPE_EP }, - .bEndpointAddress = AUDIO_OUT_EP, - .bmAttributes = USB_ENDPOINT_TYPE_ISOCHRONOUS, + .bEndpointAddress = AD_OUT_EP, + .bmAttributes = USB_EP_ATTR_ISO | USB_EP_ATTR_ASYNC, .wMaxPacketSize = SPEAKER_OUT_PACKET, .bInterval = 0x01U, .bRefresh = 0x00U, - .bSynchAddress = 0x00U + .bSynchAddress = AD_FEEDBACK_IN_EP, }, .speak_as_endpoint = @@ -425,14 +432,28 @@ const usb_desc_config_set audio_config_set = .header = { .bLength = sizeof(usb_desc_AS_ep), - .bDescriptorType = AUDIO_DESCTYPE_ENDPOINT + .bDescriptorType = AD_DESCTYPE_ENDPOINT }, - .bDescriptorSubtype = AUDIO_ENDPOINT_GENERAL, + .bDescriptorSubtype = AD_ENDPOINT_GENERAL, .bmAttributes = 0x00U, .bLockDelayUnits = 0x00U, .wLockDelay = 0x0000U, - } -#endif + }, + + .speak_feedback_endpoint = + { + .header = + { + .bLength = sizeof(usb_desc_FeedBack_ep), + .bDescriptorType = USB_DESCTYPE_EP + }, + .bEndpointAddress = AD_FEEDBACK_IN_EP, + .bmAttributes = USB_EP_ATTR_ISO | USB_EP_ATTR_ASYNC | USB_EP_ATTR_FEEDBACK, + .wMaxPacketSize = FEEDBACK_IN_PACKET, + .bInterval = 0x01U, + .Refresh = 0x05U, /* refresh every 32(2^5) ms */ + .bSynchAddress = 0x00U, + }, }; /* USB language ID descriptor */ @@ -488,7 +509,9 @@ void *const usbd_audio_strings[] = [STR_IDX_SERIAL] = (uint8_t *)&serial_string }; -usb_desc audio_desc = { +/* USB descriptor configure */ +usb_desc audio_desc = +{ .dev_desc = (uint8_t *)&audio_dev_desc, .config_desc = (uint8_t *)&audio_config_set, .strings = usbd_audio_strings @@ -503,11 +526,9 @@ usb_desc audio_desc = { */ static uint8_t audio_init (usb_dev *udev, uint8_t config_index) { - static usbd_audio_handler audio_handler; - memset((void *)&audio_handler, 0, sizeof(usbd_audio_handler)); -#ifdef USE_USB_AUDIO_MICPHONE +#ifdef USE_USB_AD_MICPHONE { usb_desc_std_ep std_ep = audio_config_set.mic_std_endpoint; @@ -522,37 +543,44 @@ static uint8_t audio_init (usb_dev *udev, uint8_t config_index) /* initialize Tx endpoint */ usbd_ep_setup (udev, &ep); } -#endif +#endif /* USE_USB_AD_MICPHONE */ -#ifdef USE_USB_AUDIO_SPEAKER -{ audio_handler.isoc_out_rdptr = audio_handler.isoc_out_buff; audio_handler.isoc_out_wrptr = audio_handler.isoc_out_buff; usb_desc_std_ep std_ep = audio_config_set.speak_std_endpoint; - usb_desc_ep ep = { + usb_desc_ep ep1 = { .header = std_ep.header, .bEndpointAddress = std_ep.bEndpointAddress, .bmAttributes = std_ep.bmAttributes, - .wMaxPacketSize = std_ep.wMaxPacketSize, + .wMaxPacketSize = SPEAKER_OUT_MAX_PACKET, .bInterval = std_ep.bInterval }; - /* initialize Rx endpoint */ - usbd_ep_setup (udev, &ep); + /* initialize RX endpoint */ + usbd_ep_setup (udev, &ep1); + + /* prepare out endpoint to receive next audio packet */ + usbd_ep_recev (udev, AD_OUT_EP, audio_handler.usb_rx_buffer, SPEAKER_OUT_MAX_PACKET); /* initialize the audio output hardware layer */ - if (USBD_OK != audio_out_fops.audio_init(USBD_AUDIO_FREQ_16K, DEFAULT_VOLUME, 0U)) { + if (USBD_OK != audio_out_fops.audio_init(USBD_SPEAKER_FREQ, DEFAULT_VOLUME)) { return USBD_FAIL; } - /* prepare OUT endpoint to receive audio data */ - usbd_ep_recev (udev, AUDIO_OUT_EP, (uint8_t*)audio_handler.isoc_out_buff, SPEAKER_OUT_PACKET); -} -#endif + usb_desc_FeedBack_ep feedback_ep = audio_config_set.speak_feedback_endpoint; + + usb_desc_ep ep2 = { + .header = feedback_ep.header, + .bEndpointAddress = feedback_ep.bEndpointAddress, + .bmAttributes = feedback_ep.bmAttributes, + .wMaxPacketSize = feedback_ep.wMaxPacketSize, + .bInterval = feedback_ep.bInterval + }; - udev->dev.class_data[USBD_AUDIO_INTERFACE] = (void *)&audio_handler; + /* initialize Tx endpoint */ + usbd_ep_setup (udev, &ep2); return USBD_OK; } @@ -566,20 +594,21 @@ static uint8_t audio_init (usb_dev *udev, uint8_t config_index) */ static uint8_t audio_deinit (usb_dev *udev, uint8_t config_index) { -#ifdef USE_USB_AUDIO_MICPHONE +#ifdef USE_USB_AD_MICPHONE /* deinitialize AUDIO endpoints */ - usbd_ep_clear(udev, AUDIO_IN_EP); -#endif + usbd_ep_clear(udev, AD_IN_EP); +#endif /* USE_USB_AD_MICPHONE */ -#ifdef USE_USB_AUDIO_SPEAKER /* deinitialize AUDIO endpoints */ - usbd_ep_clear(udev, AUDIO_OUT_EP); + usbd_ep_clear(udev, AD_OUT_EP); /* deinitialize the audio output hardware layer */ - if (USBD_OK != audio_out_fops.audio_deinit(0U)) { + if (USBD_OK != audio_out_fops.audio_deinit()) { return USBD_FAIL; } -#endif + + /* deinitialize AUDIO endpoints */ + usbd_ep_clear(udev, AD_FEEDBACK_IN_EP); return USBD_OK; } @@ -595,50 +624,48 @@ static uint8_t audio_req_handler (usb_dev *udev, usb_req *req) { uint8_t status = REQ_NOTSUPP; - usbd_audio_handler *audio = (usbd_audio_handler *)udev->dev.class_data[USBD_AUDIO_INTERFACE]; - usb_transc *transc_in = &udev->dev.transc_in[0]; usb_transc *transc_out = &udev->dev.transc_out[0]; switch (req->bRequest) { - case AUDIO_REQ_GET_CUR: - transc_in->xfer_buf = audio->audioctl; + case AD_REQ_GET_CUR: + transc_in->xfer_buf = audio_handler.audioctl; transc_in->remain_len = req->wLength; status = REQ_SUPP; break; - case AUDIO_REQ_SET_CUR: + case AD_REQ_SET_CUR: if (req->wLength) { - transc_out->xfer_buf = audio->audioctl; + transc_out->xfer_buf = audio_handler.audioctl; transc_out->remain_len = req->wLength; - udev->dev.class_core->command = AUDIO_REQ_SET_CUR; + udev->dev.class_core->command = AD_REQ_SET_CUR; - audio->audioctl_len = req->wLength; - audio->audioctl_unit = BYTE_HIGH(req->wIndex); + audio_handler.audioctl_len = req->wLength; + audio_handler.audioctl_unit = BYTE_HIGH(req->wIndex); status = REQ_SUPP; } break; - case AUDIO_REQ_GET_MIN: - *((uint16_t *)audio->audioctl) = VOL_MIN; - transc_in->xfer_buf = audio->audioctl; + case AD_REQ_GET_MIN: + *((uint16_t *)audio_handler.audioctl) = VOL_MIN; + transc_in->xfer_buf = audio_handler.audioctl; transc_in->remain_len = req->wLength; status = REQ_SUPP; break; - case AUDIO_REQ_GET_MAX: - *((uint16_t *)audio->audioctl) = VOL_MAX; - transc_in->xfer_buf = audio->audioctl; + case AD_REQ_GET_MAX: + *((uint16_t *)audio_handler.audioctl) = VOL_MAX; + transc_in->xfer_buf = audio_handler.audioctl; transc_in->remain_len = req->wLength; status = REQ_SUPP; break; - case AUDIO_REQ_GET_RES: - *((uint16_t *)audio->audioctl) = VOL_RES; - transc_in->xfer_buf = audio->audioctl; + case AD_REQ_GET_RES: + *((uint16_t *)audio_handler.audioctl) = VOL_RES; + transc_in->xfer_buf = audio_handler.audioctl; transc_in->remain_len = req->wLength; status = REQ_SUPP; break; @@ -661,7 +688,36 @@ static uint8_t audio_set_intf(usb_dev *udev, usb_req *req) { udev->dev.class_core->alter_set = req->wValue; - return USBD_OK; + if(0xFF != req->wValue){ + if (req->wValue != 0){ + /* deinit audio handler */ + memset((void *)&audio_handler, 0, sizeof(usbd_audio_handler)); + + audio_handler.play_flag = 0; + audio_handler.isoc_out_rdptr = audio_handler.isoc_out_buff; + audio_handler.isoc_out_wrptr = audio_handler.isoc_out_buff; + + /* feedback calculate sample freq */ + audio_handler.actual_freq = I2S_ACTUAL_SAM_FREQ(USBD_SPEAKER_FREQ); + get_feedback_fs_rate(audio_handler.actual_freq, audio_handler.feedback_freq); + + /* send feedback data of estimated frequence*/ + usbd_ep_send(udev, AD_FEEDBACK_IN_EP, audio_handler.feedback_freq, FEEDBACK_IN_PACKET); + } else { + /* stop audio output */ + audio_out_fops.audio_cmd(audio_handler.isoc_out_rdptr, SPEAKER_OUT_PACKET/2, AD_CMD_STOP); + + audio_handler.play_flag = 0; + audio_handler.isoc_out_rdptr = audio_handler.isoc_out_buff; + audio_handler.isoc_out_wrptr = audio_handler.isoc_out_buff; + + usbd_fifo_flush (udev, AD_IN_EP); + usbd_fifo_flush (udev, AD_FEEDBACK_IN_EP); + usbd_fifo_flush (udev, AD_OUT_EP); + } + } + + return 0; } /*! @@ -672,28 +728,21 @@ static uint8_t audio_set_intf(usb_dev *udev, usb_req *req) */ static uint8_t audio_ctlx_out (usb_dev *udev) { -#ifdef USE_USB_AUDIO_SPEAKER - usbd_audio_handler *audio = (usbd_audio_handler *)udev->dev.class_data[USBD_AUDIO_INTERFACE]; - /* handles audio control requests data */ /* check if an audio_control request has been issued */ - if (AUDIO_REQ_SET_CUR == udev->dev.class_core->command) { + if (AD_REQ_SET_CUR == udev->dev.class_core->command) { /* in this driver, to simplify code, only SET_CUR request is managed */ /* check for which addressed unit the audio_control request has been issued */ - if (AUDIO_OUT_STREAMING_CTRL == audio->audioctl_unit) { + if (AD_OUT_STREAMING_CTRL == audio_handler.audioctl_unit) { /* in this driver, to simplify code, only one unit is manage */ - /* call the audio interface mute function */ - audio_out_fops.audio_mute_ctl(audio->audioctl[0]); - /* reset the audioctl_cmd variable to prevent re-entering this function */ udev->dev.class_core->command = 0U; - audio->audioctl_len = 0U; + audio_handler.audioctl_len = 0U; } } -#endif return USBD_OK; } @@ -707,16 +756,26 @@ static uint8_t audio_ctlx_out (usb_dev *udev) */ static uint8_t audio_data_in (usb_dev *udev, uint8_t ep_num) { -#ifdef USE_USB_AUDIO_MICPHONE +#ifdef USE_USB_AD_MICPHONE + if(ep_num == EP_ID(AD_IN_EP)){ if(count_data < LENGTH_DATA){ /* Prepare next buffer to be sent: dummy data */ - usbd_ep_send(udev, AUDIO_IN_EP,(uint8_t*)&wavetestdata[count_data],MIC_IN_PACKET); + usbd_ep_send(udev, AD_IN_EP,(uint8_t*)&wavetestdata[count_data],MIC_IN_PACKET); count_data += MIC_IN_PACKET; } else { - usbd_ep_send(udev, AUDIO_IN_EP,(uint8_t*)wavetestdata,MIC_IN_PACKET); + usbd_ep_send(udev, AD_IN_EP,(uint8_t*)wavetestdata,MIC_IN_PACKET); count_data = MIC_IN_PACKET; } -#endif + } +#endif /* USE_USB_AD_MICPHONE */ + + if(ep_num == EP_ID(AD_FEEDBACK_IN_EP)){ + /* calculate feedback actual freq */ + audio_handler.actual_freq = usbd_audio_spk_get_feedback(udev); + get_feedback_fs_rate(audio_handler.actual_freq, audio_handler.feedback_freq); + + usbd_ep_send(udev, AD_FEEDBACK_IN_EP, audio_handler.feedback_freq, FEEDBACK_IN_PACKET); + } return USBD_OK; } @@ -730,31 +789,73 @@ static uint8_t audio_data_in (usb_dev *udev, uint8_t ep_num) */ static uint8_t audio_data_out (usb_dev *udev, uint8_t ep_num) { -#ifdef USE_USB_AUDIO_SPEAKER - usbd_audio_handler *audio = (usbd_audio_handler *)udev->dev.class_data[USBD_AUDIO_INTERFACE]; - - /* increment the Buffer pointer or roll it back when all buffers are full */ - if (audio->isoc_out_wrptr >= (audio->isoc_out_buff + (SPEAKER_OUT_PACKET * OUT_PACKET_NUM))) { - /* all buffers are full: roll back */ - audio->isoc_out_wrptr = audio->isoc_out_buff; - } else { - /* increment the buffer pointer */ - audio->isoc_out_wrptr += SPEAKER_OUT_PACKET; + uint16_t usb_rx_length, tail_len; + + /* get receive length */ + usb_rx_length = ((usb_core_driver *)udev)->dev.transc_out[ep_num].xfer_count; + + if(audio_handler.isoc_out_wrptr >= audio_handler.isoc_out_rdptr){ + audio_handler.buf_free_size = TOTAL_OUT_BUF_SIZE + audio_handler.isoc_out_rdptr - audio_handler.isoc_out_wrptr; + }else{ + audio_handler.buf_free_size = audio_handler.isoc_out_rdptr - audio_handler.isoc_out_wrptr; + } + + /* free buffer enough to save rx data */ + if(audio_handler.buf_free_size > usb_rx_length){ + if(audio_handler.isoc_out_wrptr >= audio_handler.isoc_out_rdptr){ + tail_len = audio_handler.isoc_out_buff + TOTAL_OUT_BUF_SIZE - audio_handler.isoc_out_wrptr; + + if(tail_len >= usb_rx_length){ + memcpy(audio_handler.isoc_out_wrptr, audio_handler.usb_rx_buffer, usb_rx_length); + + /* increment the buffer pointer */ + audio_handler.isoc_out_wrptr += usb_rx_length; + + /* increment the Buffer pointer or roll it back when all buffers are full */ + if(audio_handler.isoc_out_wrptr >= (audio_handler.isoc_out_buff + TOTAL_OUT_BUF_SIZE)){ + /* all buffers are full: roll back */ + audio_handler.isoc_out_wrptr = audio_handler.isoc_out_buff; + } + }else{ + memcpy(audio_handler.isoc_out_wrptr, audio_handler.usb_rx_buffer, tail_len); + /* adjust write pointer */ + audio_handler.isoc_out_wrptr = audio_handler.isoc_out_buff; + + memcpy(audio_handler.isoc_out_wrptr, &audio_handler.usb_rx_buffer[tail_len], usb_rx_length - tail_len); + /* adjust write pointer */ + audio_handler.isoc_out_wrptr += usb_rx_length - tail_len; + } + }else{ + memcpy(audio_handler.isoc_out_wrptr, audio_handler.usb_rx_buffer, usb_rx_length); + + /* increment the buffer pointer */ + audio_handler.isoc_out_wrptr += usb_rx_length; + } } /* Toggle the frame index */ - udev->dev.transc_out[ep_num].frame_num = - (udev->dev.transc_out[ep_num].frame_num)? 0U:1U; + udev->dev.transc_out[ep_num].frame_num = (udev->dev.transc_out[ep_num].frame_num)? 0U:1U; /* prepare out endpoint to receive next audio packet */ - usbd_ep_recev (udev, AUDIO_OUT_EP, (uint8_t*)(audio->isoc_out_wrptr), SPEAKER_OUT_PACKET); + usbd_ep_recev (udev, AD_OUT_EP, audio_handler.usb_rx_buffer, SPEAKER_OUT_MAX_PACKET); + + if(audio_handler.isoc_out_wrptr >= audio_handler.isoc_out_rdptr){ + audio_handler.buf_free_size = TOTAL_OUT_BUF_SIZE + audio_handler.isoc_out_rdptr - audio_handler.isoc_out_wrptr; + }else{ + audio_handler.buf_free_size = audio_handler.isoc_out_rdptr - audio_handler.isoc_out_wrptr; + } - /* trigger the start of streaming only when half buffer is full */ - if ((0U == audio->play_flag) && (audio->isoc_out_wrptr >= (audio->isoc_out_buff + ((SPEAKER_OUT_PACKET * OUT_PACKET_NUM) / 2U)))) { + if ((0U == audio_handler.play_flag) && (audio_handler.buf_free_size < TOTAL_OUT_BUF_SIZE/2)) { /* enable start of streaming */ - audio->play_flag = 1U; + audio_handler.play_flag = 1U; + + /* initialize the audio output hardware layer */ + if (USBD_OK != audio_out_fops.audio_cmd(audio_handler.isoc_out_rdptr, SPEAKER_OUT_MAX_PACKET/2, AD_CMD_PLAY)) { + return USBD_FAIL; + } + + audio_handler.dam_tx_len = SPEAKER_OUT_MAX_PACKET; } -#endif return USBD_OK; } @@ -765,45 +866,80 @@ static uint8_t audio_data_out (usb_dev *udev, uint8_t ep_num) \param[out] none \retval USB device operation status */ -static uint8_t usbd_audio_sof (usb_dev *udev) +static uint8_t audio_sof (usb_dev *udev) { -#ifdef USE_USB_AUDIO_SPEAKER - usbd_audio_handler *audio = (usbd_audio_handler *)udev->dev.class_data[USBD_AUDIO_INTERFACE]; - - /* check if there are available data in stream buffer. - in this function, a single variable (play_flag) is used to avoid software delays. - the play operation must be executed as soon as possible after the SOF detection. */ - if (audio->play_flag) { - /* start playing received packet */ - audio_out_fops.audio_cmd((uint8_t*)(audio->isoc_out_rdptr), /* samples buffer pointer */ - SPEAKER_OUT_PACKET, /* number of samples in Bytes */ - AUDIO_CMD_PLAY); /* command to be processed */ - - /* increment the Buffer pointer or roll it back when all buffers all full */ - if (audio->isoc_out_rdptr >= (audio->isoc_out_buff + (SPEAKER_OUT_PACKET * OUT_PACKET_NUM))) { - /* roll back to the start of buffer */ - audio->isoc_out_rdptr = audio->isoc_out_buff; - } else { - /* increment to the next sub-buffer */ - audio->isoc_out_rdptr += SPEAKER_OUT_PACKET; - } + return USBD_OK; +} - /* if all available buffers have been consumed, stop playing */ - if (audio->isoc_out_rdptr == audio->isoc_out_wrptr) { - /* Pause the audio stream */ - audio_out_fops.audio_cmd((uint8_t*)(audio->isoc_out_buff), /* samples buffer pointer */ - SPEAKER_OUT_PACKET, /* number of samples in Bytes */ - AUDIO_CMD_PAUSE); /* command to be processed */ +/*! + \brief handles the audio ISO IN Incomplete event + \param[in] udev: pointer to USB device instance + \param[out] none + \retval USB device operation status +*/ +static uint8_t audio_iso_in_incomplete (usb_dev *udev) +{ + (void)usb_txfifo_flush (&udev->regs, EP_ID(AD_FEEDBACK_IN_EP)); - /* stop entering play loop */ - audio->play_flag = 0U; + audio_handler.actual_freq = usbd_audio_spk_get_feedback(udev); + get_feedback_fs_rate(audio_handler.actual_freq, audio_handler.feedback_freq); - /* reset buffer pointers */ - audio->isoc_out_rdptr = audio->isoc_out_buff; - audio->isoc_out_wrptr = audio->isoc_out_buff; - } - } -#endif + /* send feedback data of estimated frequence*/ + usbd_ep_send(udev, AD_FEEDBACK_IN_EP, audio_handler.feedback_freq, FEEDBACK_IN_PACKET); return USBD_OK; } + +/*! + \brief handles the audio ISO OUT Incomplete event + \param[in] udev: pointer to USB device instance + \param[out] none + \retval USB device operation status +*/ +static uint8_t audio_iso_out_incomplete (usb_dev *udev) +{ + return USBD_OK; +} + +/*! + \brief calculate feedback sample frequency + \param[in] udev: pointer to USB device instance + \param[out] none + \retval feedback frequency value +*/ +static uint32_t usbd_audio_spk_get_feedback(usb_dev *udev) +{ + static uint32_t fb_freq; + + if(audio_handler.isoc_out_wrptr >= audio_handler.isoc_out_rdptr){ + audio_handler.buf_free_size = TOTAL_OUT_BUF_SIZE + audio_handler.isoc_out_rdptr - audio_handler.isoc_out_wrptr; + }else{ + audio_handler.buf_free_size = audio_handler.isoc_out_rdptr - audio_handler.isoc_out_wrptr; + } + + if(audio_handler.buf_free_size <= (TOTAL_OUT_BUF_SIZE/4)){ + fb_freq = I2S_ACTUAL_SAM_FREQ(USBD_SPEAKER_FREQ) - FEEDBACK_FREQ_OFFSET; + }else if(audio_handler.buf_free_size >= (TOTAL_OUT_BUF_SIZE*3/4)){ + fb_freq = I2S_ACTUAL_SAM_FREQ(USBD_SPEAKER_FREQ) + FEEDBACK_FREQ_OFFSET; + }else{ + fb_freq = I2S_ACTUAL_SAM_FREQ(USBD_SPEAKER_FREQ); + } + + return fb_freq; +} + +/*! + \brief get feedback value from rate in usb full speed + \param[in] rate: sample frequence + \param[in] buf: pointer to result buffer + \param[out] none + \retval USB device operation status +*/ +static void get_feedback_fs_rate(uint32_t rate, uint8_t *buf) +{ + rate = ((rate / 1000) << 14) | ((rate % 1000) << 4); + + buf[0] = rate; + buf[1] = rate >> 8; + buf[2] = rate >> 16; +} diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Source/audio_out_itf.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Source/audio_out_itf.c index 4615cfdc..d23f1e85 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Source/audio_out_itf.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/audio/Source/audio_out_itf.c @@ -3,10 +3,11 @@ \brief audio OUT (playback) interface functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -36,70 +37,64 @@ OF SUCH DAMAGE. #include "audio_out_itf.h" /* local function prototypes ('static') */ -static uint8_t init (uint32_t audiofreq, uint32_t volume, uint32_t options); -static uint8_t deinit (uint32_t options); -static uint8_t audio_cmd (uint8_t* pbuf, uint32_t size, uint8_t cmd); -static uint8_t volume_ctl (uint8_t vol); -static uint8_t mute_ctl (uint8_t cmd); -static uint8_t periodic_tc (uint8_t cmd); -static uint8_t get_state (void); +static uint8_t init (uint32_t audio_freq, uint32_t volume); +static uint8_t deinit (void); +static uint8_t audio_cmd (uint8_t* pbuf, uint32_t size, uint8_t cmd); + +/* local variable defines */ +static uint8_t audio_state = AD_STATE_INACTIVE; audio_fops_struct audio_out_fops = { - init, - deinit, - audio_cmd, - volume_ctl, - mute_ctl, - periodic_tc, - get_state + .audio_init = init, + .audio_deinit = deinit, + .audio_cmd = audio_cmd, }; -static uint8_t audio_state = AUDIO_STATE_INACTIVE; - /*! - \brief initialize and configures all required resources for audio play function + \brief initialize and configures all required resources \param[in] audio_freq: statrt_up audio frequency \param[in] volume: start_up volume to be set - \param[in] options: specific options passed to low layer function \param[out] none - \retval AUDIO_OK if all operations succeed, AUDIO_FAIL else + \retval AD_OK if all operations succeed, otherwise, AD_FAIL. */ -static uint8_t init (uint32_t audio_freq, uint32_t volume, uint32_t options) +static uint8_t init (uint32_t audio_freq, uint32_t volume) { static uint32_t initialized = 0U; /* check if the low layer has already been initialized */ if (0U == initialized) { - /* call low layer function */ - if (0U != eval_audio_init(OUTPUT_DEVICE_AUTO, (uint8_t)volume, audio_freq)) { - audio_state = AUDIO_STATE_ERROR; + /* initialize GPIO */ + codec_gpio_init(); - return AUDIO_FAIL; - } + /* initialize i2s */ + codec_audio_interface_init(audio_freq); + + /* initialize DMA */ + codec_i2s_dma_init(); - /* set the initialization flag to prevent reinitializing the interface again */ + /* prevent reinitializing the interface again */ initialized = 1U; } /* update the audio state machine */ - audio_state = AUDIO_STATE_ACTIVE; + audio_state = AD_STATE_ACTIVE; - return AUDIO_OK; + return AD_OK; } /*! \brief free all resources used by low layer and stops audio-play function - \param[in] options: specific options passed to low layer function + \param[in] none \param[out] none - \retval AUDIO_OK if all operations succeed, AUDIO_FAIL else + \retval AD_OK if all operations succeed, otherwise, AD_FAIL. */ -static uint8_t deinit (uint32_t options) +static uint8_t deinit (void) { /* update the audio state machine */ - audio_state = AUDIO_STATE_INACTIVE; + audio_state = AD_STATE_INACTIVE; - return AUDIO_OK; + return AD_OK; } /*! @@ -107,123 +102,68 @@ static uint8_t deinit (uint32_t options) \param[in] pbuf: address from which file should be played \param[in] size: size of the current buffer/file \param[in] cmd: command to be executed, can be: - \arg AUDIO_CMD_PLAY - \arg AUDIO_CMD_PAUSE - \arg AUDIO_CMD_RESUME - \arg AUDIO_CMD_STOP + \arg AD_CMD_PLAY + \arg AD_CMD_PAUSE + \arg AD_CMD_RESUME + \arg AD_CMD_STOP \param[out] none - \retval AUDIO_OK if all operations succeed, AUDIO_FAIL else + \retval AD_OK if all operations succeed, otherwise, AD_FAIL. */ static uint8_t audio_cmd (uint8_t* pbuf, uint32_t size, uint8_t cmd) { /* check the current state */ - if ((AUDIO_STATE_INACTIVE == audio_state) || (AUDIO_STATE_ERROR == audio_state)) { - audio_state = AUDIO_STATE_ERROR; + if ((AD_STATE_INACTIVE == audio_state) || (AD_STATE_ERROR == audio_state)) { + audio_state = AD_STATE_ERROR; - return AUDIO_FAIL; + return AD_FAIL; } switch (cmd) { /* process the play command */ - case AUDIO_CMD_PLAY: + case AD_CMD_PLAY: /* if current state is active or stopped */ - if ((AUDIO_STATE_ACTIVE == audio_state) || \ - (AUDIO_STATE_STOPPED == audio_state) || \ - (AUDIO_STATE_PLAYING == audio_state)) { - audio_mal_play((uint32_t)pbuf, size); - audio_state = AUDIO_STATE_PLAYING; - - return AUDIO_OK; - } else if (AUDIO_STATE_PAUSED == audio_state) { - if (eval_audio_pause_resume(AUDIO_RESUME, (uint32_t)pbuf, (size / 2U))) { - audio_state = AUDIO_STATE_ERROR; - - return AUDIO_FAIL; - } else { - audio_state = AUDIO_STATE_PLAYING; - - return AUDIO_OK; - } + if ((AD_STATE_ACTIVE == audio_state) || \ + (AD_STATE_STOPPED == audio_state) || \ + (AD_STATE_PLAYING == audio_state)) { + audio_play((uint32_t)pbuf, size); + audio_state = AD_STATE_PLAYING; + + return AD_OK; + } else if (AD_STATE_PAUSED == audio_state) { + audio_pause_resume(AD_RESUME, (uint32_t)pbuf, (size/2)); + audio_state = AD_STATE_PLAYING; + + return AD_OK; } else { - return AUDIO_FAIL; + return AD_FAIL; } /* process the stop command */ - case AUDIO_CMD_STOP: - if (AUDIO_STATE_PLAYING != audio_state) { + case AD_CMD_STOP: + if (AD_STATE_PLAYING != audio_state) { /* unsupported command */ - return AUDIO_FAIL; - } else if (eval_audio_stop(CODEC_PDWN_SW)) { - audio_state = AUDIO_STATE_ERROR; - - return AUDIO_FAIL; + return AD_FAIL; } else { - audio_state = AUDIO_STATE_STOPPED; + audio_stop(); + audio_state = AD_STATE_STOPPED; - return AUDIO_OK; + return AD_OK; } /* process the pause command */ - case AUDIO_CMD_PAUSE: - if (AUDIO_STATE_PLAYING != audio_state) { + case AD_CMD_PAUSE: + if (AD_STATE_PLAYING != audio_state) { /* unsupported command */ - return AUDIO_FAIL; - } else if (eval_audio_pause_resume(AUDIO_PAUSE, (uint32_t)pbuf, (size / 2U))) { - audio_state = AUDIO_STATE_ERROR; - - return AUDIO_FAIL; + return AD_FAIL; } else { - audio_state = AUDIO_STATE_PAUSED; + audio_pause_resume(AD_PAUSE, (uint32_t)pbuf, (size/2)); + audio_state = AD_STATE_PAUSED; - return AUDIO_OK; + return AD_OK; } /* unsupported command */ default: - return AUDIO_FAIL; + return AD_FAIL; } } - -/*! - \brief set the volume level - \param[in] vol: volume level to be set in % (from 0% to 100%) - \param[out] none - \retval AUDIO_OK if all operations succeed, AUDIO_FAIL else -*/ -static uint8_t volume_ctl (uint8_t vol) -{ - return AUDIO_OK; -} - -/*! - \brief mute or unmute the audio current output - \param[in] cmd: can be 0 to unmute, or 1 to mute - \param[out] none - \retval AUDIO_OK if all operations succeed, AUDIO_FAIL else -*/ -static uint8_t mute_ctl (uint8_t cmd) -{ - return AUDIO_OK; -} - -/*! - \brief periodic transfer control - \param[in] cmd: command - \param[out] none - \retval AUDIO_OK if all operations succeed, AUDIO_FAIL else -*/ -static uint8_t periodic_tc (uint8_t cmd) -{ - return AUDIO_OK; -} - -/*! - \brief return the current state of the audio machine - \param[in] none - \param[out] none - \retval AUDIO_OK if all operations succeed, AUDIO_FAIL else -*/ -static uint8_t get_state (void) -{ - return audio_state; -} diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/cdc/Include/cdc_acm_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/cdc/Include/cdc_acm_core.h index eb77246d..9ca4cde3 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/cdc/Include/cdc_acm_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/cdc/Include/cdc_acm_core.h @@ -3,10 +3,11 @@ \brief the header file of cdc acm driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/cdc/Source/cdc_acm_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/cdc/Source/cdc_acm_core.c index 14de3a3b..2bf0a75b 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/cdc/Source/cdc_acm_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/cdc/Source/cdc_acm_core.c @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2020-12-07, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_core.h index 40619922..5090add9 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_core.h @@ -3,10 +3,11 @@ \brief the header file of USB DFU device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -76,14 +77,11 @@ OF SUCH DAMAGE. /* bit detach capable = bit 3 in bmAttributes field */ #define DFU_DETACH_MASK (uint8_t)(0x10U) -#define USB_SERIAL_STR_LEN 0x06U - -#define USB_DFU_CONFIG_DESC_SIZE 27U - #define DFU_DESC_TYPE 0x21U /* DFU device state defines */ -typedef enum { +typedef enum +{ STATE_APP_IDLE = 0x00U, STATE_APP_DETACH, STATE_DFU_IDLE, @@ -98,7 +96,8 @@ typedef enum { } dfu_state; /* DFU device status defines */ -typedef enum { +typedef enum +{ STATUS_OK = 0x00U, STATUS_ERR_TARGET, STATUS_ERR_FILE, @@ -118,7 +117,8 @@ typedef enum { } dfu_status; /* DFU class-specific requests */ -typedef enum { +typedef enum +{ DFU_DETACH = 0U, DFU_DNLOAD, DFU_UPLOAD, @@ -147,7 +147,9 @@ typedef struct typedef struct { usb_desc_config config; - usb_desc_itf dfu_itf; + usb_desc_itf dfu_itf0; + usb_desc_itf dfu_itf1; + usb_desc_itf dfu_itf2; usb_desc_dfu_func dfu_func; } usb_dfu_desc_config_set; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_mem.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_mem.h new file mode 100644 index 00000000..0c36bf87 --- /dev/null +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Include/dfu_mem.h @@ -0,0 +1,85 @@ +/*! + \file dfu_mem.h + \brief USB DFU device media access layer header file + + \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x +*/ + +/* + Copyright (c) 2022, GigaDevice Semiconductor Inc. + + Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY +OF SUCH DAMAGE. +*/ + +#ifndef __DFU_MEM_H +#define __DFU_MEM_H + +#include "usb_conf.h" + +typedef struct _dfu_mem_prop +{ + const uint8_t* pstr_desc; + + uint8_t (*mem_init) (void); + uint8_t (*mem_deinit) (void); + uint8_t (*mem_erase) (uint32_t addr); + uint8_t (*mem_write) (uint8_t *buf, uint32_t addr, uint32_t len); + uint8_t* (*mem_read) (uint8_t *buf, uint32_t addr, uint32_t len); + uint8_t (*mem_checkaddr) (uint32_t addr); + + const uint32_t erase_timeout; + const uint32_t write_timeout; +} dfu_mem_prop; + +typedef enum +{ + MEM_OK = 0, + MEM_FAIL +} mem_status; + +#define _1ST_BYTE(x) (uint8_t)((x) & 0xFF) /*!< addressing cycle 1st byte */ +#define _2ND_BYTE(x) (uint8_t)(((x) & 0xFF00) >> 8) /*!< addressing cycle 2nd byte */ +#define _3RD_BYTE(x) (uint8_t)(((x) & 0xFF0000) >> 16) /*!< addressing cycle 3rd byte */ + +#define POLLING_TIMEOUT_SET(x) buffer[0] = _1ST_BYTE(x);\ + buffer[1] = _2ND_BYTE(x);\ + buffer[2] = _3RD_BYTE(x); + +/* function declarations */ +/* initialize the memory media on the GD32 */ +uint8_t dfu_mem_init(void); +/* deinitialize the memory media on the GD32 */ +uint8_t dfu_mem_deinit(void); +/* erase a memory sector */ +uint8_t dfu_mem_erase(uint32_t addr); +/* write data to sectors of memory */ +uint8_t dfu_mem_write(uint8_t *buf, uint32_t addr, uint32_t len); +/* read data from sectors of memory */ +uint8_t* dfu_mem_read(uint8_t *buf, uint32_t addr, uint32_t len); +/* get the status of a given memory and store in buffer */ +uint8_t dfu_mem_getstatus(uint32_t addr, uint8_t cmd, uint8_t *buffer); + +#endif /* __DFU_MEM_H */ + diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_core.c index 3f47dd00..77b9682e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_core.c @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2020-12-07, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -34,9 +35,8 @@ OF SUCH DAMAGE. */ #include "dfu_core.h" +#include "dfu_mem.h" #include "drv_usb_hw.h" -#include "dfu_mal.h" -#include "flash_if.h" #include #define USBD_VID 0x28E9U @@ -47,6 +47,11 @@ static uint8_t dfu_init(usb_dev *udev, uint8_t config_index); static uint8_t dfu_deinit(usb_dev *udev, uint8_t config_index); static uint8_t dfu_req_handler(usb_dev *udev, usb_req *req); static uint8_t dfu_ctlx_in(usb_dev *udev); + +static void dfu_mode_leave(usb_dev *udev); +static uint8_t dfu_getstatus_complete (usb_dev *udev); + +/* DFU requests management functions */ static void dfu_detach(usb_dev *udev, usb_req *req); static void dfu_dnload(usb_dev *udev, usb_req *req); static void dfu_upload(usb_dev *udev, usb_req *req); @@ -54,8 +59,8 @@ static void dfu_getstatus(usb_dev *udev, usb_req *req); static void dfu_clrstatus(usb_dev *udev, usb_req *req); static void dfu_getstate(usb_dev *udev, usb_req *req); static void dfu_abort(usb_dev *udev, usb_req *req); -static void dfu_mode_leave(usb_dev *udev); -static uint8_t dfu_getstatus_complete (usb_dev *udev); + +static void string_to_unicode (uint8_t *str, uint16_t *pbuf); static void (*dfu_request_process[])(usb_dev *udev, usb_req *req) = { @@ -101,7 +106,7 @@ const usb_dfu_desc_config_set dfu_config_desc = .bLength = sizeof(usb_desc_config), .bDescriptorType = USB_DESCTYPE_CONFIG }, - .wTotalLength = USB_DFU_CONFIG_DESC_SIZE, + .wTotalLength = sizeof(usb_dfu_desc_config_set), .bNumInterfaces = 0x01U, .bConfigurationValue = 0x01U, .iConfiguration = 0x00U, @@ -109,7 +114,7 @@ const usb_dfu_desc_config_set dfu_config_desc = .bMaxPower = 0x32U }, - .dfu_itf = + .dfu_itf0 = { .header = { @@ -122,7 +127,39 @@ const usb_dfu_desc_config_set dfu_config_desc = .bInterfaceClass = USB_DFU_CLASS, .bInterfaceSubClass = USB_DFU_SUBCLASS_UPGRADE, .bInterfaceProtocol = USB_DFU_PROTOCL_DFU, - .iInterface = 0x05U + .iInterface = STR_IDX_ALT_ITF0 + }, + + .dfu_itf1 = + { + .header = + { + .bLength = sizeof(usb_desc_itf), + .bDescriptorType = USB_DESCTYPE_ITF + }, + .bInterfaceNumber = 0x00U, + .bAlternateSetting = 0x01U, + .bNumEndpoints = 0x00U, + .bInterfaceClass = USB_DFU_CLASS, + .bInterfaceSubClass = USB_DFU_SUBCLASS_UPGRADE, + .bInterfaceProtocol = USB_DFU_PROTOCL_DFU, + .iInterface = STR_IDX_ALT_ITF1 + }, + + .dfu_itf2 = + { + .header = + { + .bLength = sizeof(usb_desc_itf), + .bDescriptorType = USB_DESCTYPE_ITF + }, + .bInterfaceNumber = 0x00U, + .bAlternateSetting = 0x02U, + .bNumEndpoints = 0x00U, + .bInterfaceClass = USB_DFU_CLASS, + .bInterfaceSubClass = USB_DFU_SUBCLASS_UPGRADE, + .bInterfaceProtocol = USB_DFU_PROTOCL_DFU, + .iInterface = STR_IDX_ALT_ITF2 }, .dfu_func = @@ -135,14 +172,15 @@ const usb_dfu_desc_config_set dfu_config_desc = .bmAttributes = USB_DFU_CAN_DOWNLOAD | USB_DFU_CAN_UPLOAD | USB_DFU_WILL_DETACH, .wDetachTimeOut = 0x00FFU, .wTransferSize = TRANSFER_SIZE, - .bcdDFUVersion = 0x011AU, + .bcdDFUVersion = 0x0110U, }, }; /* USB language ID Descriptor */ static const usb_desc_LANGID usbd_language_id_desc = { - .header = { + .header = + { .bLength = sizeof(usb_desc_LANGID), .bDescriptorType = USB_DESCTYPE_STR }, @@ -192,25 +230,46 @@ static const usb_desc_str config_string = .unicode_string = {'G', 'D', '3', '2', ' ', 'U', 'S', 'B', ' ', 'C', 'O', 'N', 'F', 'I', 'G'} }; -static const usb_desc_str interface_string = +/* alternate interface 0 string */ +static usb_desc_str interface_string0 = { .header = - { - .bLength = USB_STRING_LEN(44U), + { + .bLength = USB_STRING_LEN(2U), .bDescriptorType = USB_DESCTYPE_STR, - }, - .unicode_string = {'@', 'I', 'n', 't', 'e', 'r', 'n', 'a', 'l', 'F', 'l', 'a', 's', 'h', ' ', '/', '0', 'x', '0', '8', '0', '0', - '0', '0', '0', '0', '/', '1', '6', '*', '0', '0', '1', 'K', 'a', ',', '4', '8', '*', '0', '0', '1', 'K', 'g'} + }, +}; + +/* alternate interface 1 string */ +static usb_desc_str interface_string1 = +{ + .header = + { + .bLength = USB_STRING_LEN(2U), + .bDescriptorType = USB_DESCTYPE_STR, + }, +}; + +/* alternate interface 2 string */ +static usb_desc_str interface_string2 = +{ + .header = + { + .bLength = USB_STRING_LEN(2U), + .bDescriptorType = USB_DESCTYPE_STR, + }, }; void *const usbd_dfu_strings[] = { - [STR_IDX_LANGID] = (uint8_t *)&usbd_language_id_desc, - [STR_IDX_MFC] = (uint8_t *)&manufacturer_string, - [STR_IDX_PRODUCT] = (uint8_t *)&product_string, - [STR_IDX_SERIAL] = (uint8_t *)&serial_string, - [STR_IDX_CONFIG] = (uint8_t *)&config_string, - [STR_IDX_ITF] = (uint8_t *)&interface_string + [STR_IDX_LANGID] = (uint8_t *)&usbd_language_id_desc, + [STR_IDX_MFC] = (uint8_t *)&manufacturer_string, + [STR_IDX_PRODUCT] = (uint8_t *)&product_string, + [STR_IDX_SERIAL] = (uint8_t *)&serial_string, + [STR_IDX_CONFIG] = (uint8_t *)&config_string, + [STR_IDX_ALT_ITF0] = (uint8_t *)&interface_string0, + [STR_IDX_ALT_ITF1] = (uint8_t *)&interface_string1, + [STR_IDX_ALT_ITF2] = (uint8_t *)&interface_string2, }; usb_desc dfu_desc = { @@ -238,22 +297,26 @@ static uint8_t dfu_init (usb_dev *udev, uint8_t config_index) static usbd_dfu_handler dfu_handler; /* unlock the internal flash */ - dfu_mal_init(); + dfu_mem_init(); memset((void *)&dfu_handler, 0, sizeof(usbd_dfu_handler)); - dfu_handler.base_addr = APP_LOADED_ADDR; dfu_handler.manifest_state = MANIFEST_COMPLETE; dfu_handler.bState = STATE_DFU_IDLE; dfu_handler.bStatus = STATUS_OK; udev->dev.class_data[USBD_DFU_INTERFACE] = (void *)&dfu_handler; + /* create interface string */ + string_to_unicode((uint8_t *)dfu_inter_flash_cb.pstr_desc, udev->dev.desc->strings[STR_IDX_ALT_ITF0]); + string_to_unicode((uint8_t *)dfu_nor_flash_cb.pstr_desc, udev->dev.desc->strings[STR_IDX_ALT_ITF1]); + string_to_unicode((uint8_t *)dfu_nand_flash_cb.pstr_desc, udev->dev.desc->strings[STR_IDX_ALT_ITF2]); + return USBD_OK; } /*! - \brief de-initialize the DFU device + \brief deinitialize the DFU device \param[in] udev: pointer to USB device instance \param[in] config_index: configuration index \param[out] none @@ -270,7 +333,7 @@ static uint8_t dfu_deinit (usb_dev *udev, uint8_t config_index) dfu->bStatus = STATUS_OK; /* lock the internal flash */ - dfu_mal_deinit(); + dfu_mem_deinit(); return USBD_OK; } @@ -296,7 +359,6 @@ static uint8_t dfu_req_handler (usb_dev *udev, usb_req *req) /*! \brief handle data Stage \param[in] udev: pointer to USB device instance - \param[in] ep_num: the endpoint number \param[out] none \retval USB device operation status */ @@ -325,7 +387,7 @@ static void dfu_mode_leave (usb_dev *udev) dfu->bState = STATE_DFU_MANIFEST_WAIT_RESET; /* lock the internal flash */ - dfu_mal_deinit(); + dfu_mem_deinit(); /* generate system reset to allow jumping to the user code */ NVIC_SystemReset(); @@ -334,9 +396,9 @@ static void dfu_mode_leave (usb_dev *udev) /*! \brief handle data IN stage in control endpoint 0 - \param[in] udev: pointer to usb device instance + \param[in] udev: pointer to USB device instance \param[out] none - \retval usb device operation status + \retval USB device operation status */ static uint8_t dfu_getstatus_complete (usb_dev *udev) { @@ -358,7 +420,7 @@ static uint8_t dfu_getstatus_complete (usb_dev *udev) } else if (ERASE == dfu->buf[0]) { dfu->base_addr = *(uint32_t *)(dfu->buf + 1U); - dfu_mal_erase(dfu->base_addr); + dfu_mem_erase(dfu->base_addr); } else { /* no operation */ } @@ -369,7 +431,7 @@ static uint8_t dfu_getstatus_complete (usb_dev *udev) /* decode the required address */ addr = (dfu->block_num - 2U) * TRANSFER_SIZE + dfu->base_addr; - dfu_mal_write (dfu->buf, addr, dfu->data_len); + dfu_mem_write (dfu->buf, addr, dfu->data_len); dfu->block_num = 0U; } else { @@ -394,7 +456,7 @@ static uint8_t dfu_getstatus_complete (usb_dev *udev) /*! \brief handle the DFU_DETACH request - \param[in] udev: pointer to usb device instance + \param[in] udev: pointer to USB device instance \param[in] req: DFU class request \param[out] none \retval none. @@ -434,7 +496,7 @@ static void dfu_detach(usb_dev *udev, usb_req *req) /*! \brief handle the DFU_DNLOAD request - \param[in] udev: pointer to usb device instance + \param[in] udev: pointer to USB device instance \param[in] req: DFU class request \param[out] none \retval none @@ -469,7 +531,7 @@ static void dfu_dnload(usb_dev *udev, usb_req *req) /*! \brief handles the DFU UPLOAD request. - \param[in] udev: pointer to usb device instance + \param[in] udev: pointer to USB device instance \param[in] req: DFU class request \param[out] none \retval none @@ -514,7 +576,7 @@ static void dfu_upload (usb_dev *udev, usb_req *req) addr = (dfu->block_num - 2U) * TRANSFER_SIZE + dfu->base_addr; /* return the physical address where data are stored */ - phy_addr = dfu_mal_read (dfu->buf, addr, dfu->data_len); + phy_addr = dfu_mem_read (dfu->buf, addr, dfu->data_len); /* send the status data over EP0 */ transc->xfer_buf = phy_addr; @@ -533,7 +595,7 @@ static void dfu_upload (usb_dev *udev, usb_req *req) /*! \brief handle the DFU_GETSTATUS request - \param[in] udev: pointer to usb device instance + \param[in] udev: pointer to USB device instance \param[in] req: DFU class request \param[out] none \retval none @@ -551,9 +613,9 @@ static void dfu_getstatus (usb_dev *udev, usb_req *req) if (0U == dfu->block_num) { if (ERASE == dfu->buf[0]) { - dfu_mal_getstatus (dfu->base_addr, CMD_ERASE, (uint8_t *)&dfu->bwPollTimeout0); + dfu_mem_getstatus (dfu->base_addr, CMD_ERASE, (uint8_t *)&dfu->bwPollTimeout0); } else { - dfu_mal_getstatus (dfu->base_addr, CMD_WRITE, (uint8_t *)&dfu->bwPollTimeout0); + dfu_mem_getstatus (dfu->base_addr, CMD_WRITE, (uint8_t *)&dfu->bwPollTimeout0); } } } else { @@ -585,7 +647,8 @@ static void dfu_getstatus (usb_dev *udev, usb_req *req) /*! \brief handle the DFU_CLRSTATUS request - \param udev: pointer to usb device instance + \param[in] udev: pointer to USB device instance + \param[in] req: DFU class request \param[out] none \retval none */ @@ -607,7 +670,8 @@ static void dfu_clrstatus (usb_dev *udev, usb_req *req) /*! \brief handle the DFU_GETSTATE request - \param[in] udev: pointer to usb device instance + \param[in] udev: pointer to USB device instance + \param[in] req: DFU class request \param[out] none \retval none */ @@ -624,7 +688,8 @@ static void dfu_getstate (usb_dev *udev, usb_req *req) /*! \brief handle the DFU_ABORT request - \param[in] udev: pointer to usb device instance + \param[in] udev: pointer to USB device instance + \param[in] req: DFU class request \param[out] none \retval none */ @@ -650,3 +715,23 @@ static void dfu_abort (usb_dev *udev, usb_req *req) break; } } + +/*! + \brief convert string value into unicode char + \param[in] str: pointer to plain string + \param[in] pbuf: buffer pointer to store unicode char + \param[out] none + \retval none +*/ +static void string_to_unicode (uint8_t *str, uint16_t *pbuf) +{ + uint8_t index = 0; + + if (str != NULL) { + pbuf[index++] = ((strlen((const char *)str) * 2U + 2U) & 0x00FFU) | ((USB_DESCTYPE_STR << 8U) & 0xFF00); + + while (*str != '\0') { + pbuf[index++] = *str++; + } + } +} diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_mal.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_mem.c similarity index 65% rename from system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_mal.c rename to system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_mem.c index de09087e..cf745ed6 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_mal.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/dfu/Source/dfu_mem.c @@ -1,12 +1,13 @@ /*! - \file dfu_mal.c + \file dfu_mem.c \brief USB DFU device media access layer functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -32,8 +33,7 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI OF SUCH DAMAGE. */ -#include "dfu_mal.h" -#include "flash_if.h" +#include "dfu_mem.h" #include "drv_usb_hw.h" #include "usbd_transc.h" @@ -46,85 +46,89 @@ extern struct { uint32_t base_addr; } prog; -dfu_mal_prop* tMALTab[MAX_USED_MEMORY_MEDIA] = { - &DFU_Flash_cb +dfu_mem_prop* mem_tab[MAX_USED_MEMORY_MEDIA] = { + &dfu_inter_flash_cb, + &dfu_nor_flash_cb, + &dfu_nand_flash_cb, }; /* The list of memory interface string descriptor pointers. This list can be updated whenever a memory has to be added or removed */ const uint8_t* USBD_DFU_StringDesc[MAX_USED_MEMORY_MEDIA] = { - (const uint8_t *)FLASH_IF_STRING + (const uint8_t *)INTER_FLASH_IF_STR, + (const uint8_t *)NOR_FLASH_IF_STR, + (const uint8_t *)NAND_FLASH_IF_STR }; -static uint8_t dfu_mal_checkaddr (uint32_t addr); +static uint8_t dfu_mem_checkaddr (uint32_t addr); /*! \brief initialize the memory media on the GD32 \param[in] none \param[out] none - \retval MAL_OK + \retval MEM_OK */ -uint8_t dfu_mal_init (void) +uint8_t dfu_mem_init (void) { uint32_t mem_index = 0U; /* initialize all supported memory medias */ for (mem_index = 0U; mem_index < MAX_USED_MEMORY_MEDIA; mem_index++) { /* check if the memory media exists */ - if (NULL != tMALTab[mem_index]->mal_init) { - tMALTab[mem_index]->mal_init(); + if (NULL != mem_tab[mem_index]->mem_init) { + mem_tab[mem_index]->mem_init(); } } - return MAL_OK; + return MEM_OK; } /*! \brief deinitialize the memory media on the GD32 \param[in] none \param[out] none - \retval MAL_OK + \retval MEM_OK */ -uint8_t dfu_mal_deinit (void) +uint8_t dfu_mem_deinit (void) { uint32_t mem_index = 0U; - /* deinitializes all supported memory medias */ + /* deinitialize all supported memory medias */ for (mem_index = 0U; mem_index < MAX_USED_MEMORY_MEDIA; mem_index++) { /* check if the memory media exists */ - if (NULL != tMALTab[mem_index]->mal_deinit) { - tMALTab[mem_index]->mal_deinit(); + if (NULL != mem_tab[mem_index]->mem_deinit) { + mem_tab[mem_index]->mem_deinit(); } } - return MAL_OK; + return MEM_OK; } /*! \brief erase a memory sector \param[in] addr: memory sector address/code \param[out] none - \retval MAL_OK + \retval MEM_OK */ -uint8_t dfu_mal_erase (uint32_t addr) +uint8_t dfu_mem_erase (uint32_t addr) { - uint32_t mem_index = dfu_mal_checkaddr(addr); + uint32_t mem_index = dfu_mem_checkaddr(addr); /* check if the address is in protected area */ if (IS_PROTECTED_AREA(addr)) { - return MAL_FAIL; + return MEM_FAIL; } if (mem_index < MAX_USED_MEMORY_MEDIA) { /* check if the operation is supported */ - if (NULL != tMALTab[mem_index]->mal_erase) { - return tMALTab[mem_index]->mal_erase(addr); + if (NULL != mem_tab[mem_index]->mem_erase) { + return mem_tab[mem_index]->mem_erase(addr); } else { - return MAL_FAIL; + return MEM_FAIL; } } else { - return MAL_FAIL; + return MEM_FAIL; } } @@ -134,26 +138,34 @@ uint8_t dfu_mal_erase (uint32_t addr) \param[in] addr: memory sector address/code \param[in] len: data length \param[out] none - \retval MAL_OK + \retval MEM_OK */ -uint8_t dfu_mal_write (uint8_t *buf, uint32_t addr, uint32_t len) +uint8_t dfu_mem_write (uint8_t *buf, uint32_t addr, uint32_t len) { - uint32_t mem_index = dfu_mal_checkaddr(addr); + uint32_t mem_index = dfu_mem_checkaddr(addr); /* check if the address is in protected area */ if (IS_PROTECTED_AREA(addr)) { - return MAL_FAIL; + return MEM_FAIL; + } + + if ((addr & MAL_MASK_OB) == OB_RDPT) { + option_byte_write(addr, buf); + + NVIC_SystemReset(); + + return MEM_OK; } if (mem_index < MAX_USED_MEMORY_MEDIA) { /* check if the operation is supported */ - if (NULL != tMALTab[mem_index]->mal_write) { - return tMALTab[mem_index]->mal_write(buf, addr, len); + if (NULL != mem_tab[mem_index]->mem_write) { + return mem_tab[mem_index]->mem_write(buf, addr, len); } else { - return MAL_FAIL; + return MEM_FAIL; } } else { - return MAL_FAIL; + return MEM_FAIL; } } @@ -165,18 +177,18 @@ uint8_t dfu_mal_write (uint8_t *buf, uint32_t addr, uint32_t len) \param[out] none \retval pointer to buffer */ -uint8_t* dfu_mal_read (uint8_t *buf, uint32_t addr, uint32_t len) +uint8_t* dfu_mem_read (uint8_t *buf, uint32_t addr, uint32_t len) { uint32_t mem_index = 0U; if (OB_RDPT != addr) { - mem_index = dfu_mal_checkaddr(addr); + mem_index = dfu_mem_checkaddr(addr); } if (mem_index < MAX_USED_MEMORY_MEDIA) { /* check if the operation is supported */ - if (NULL != tMALTab[mem_index]->mal_read) { - return tMALTab[mem_index]->mal_read(buf, addr, len); + if (NULL != mem_tab[mem_index]->mem_read) { + return mem_tab[mem_index]->mem_read(buf, addr, len); } else { return buf; } @@ -191,22 +203,22 @@ uint8_t* dfu_mal_read (uint8_t *buf, uint32_t addr, uint32_t len) \param[in] cmd: 0 for erase and 1 for write \param[in] buffer: pointer to the buffer where the status data will be stored \param[out] none - \retval MAL_OK if all operations are OK, MAL_FAIL else + \retval MEM_OK if all operations are OK, MEM_FAIL else */ -uint8_t dfu_mal_getstatus (uint32_t addr, uint8_t cmd, uint8_t *buffer) +uint8_t dfu_mem_getstatus (uint32_t addr, uint8_t cmd, uint8_t *buffer) { - uint32_t mem_index = dfu_mal_checkaddr(addr); + uint32_t mem_index = dfu_mem_checkaddr(addr); if (mem_index < MAX_USED_MEMORY_MEDIA) { if (cmd & 0x01U) { - SET_POLLING_TIMEOUT(tMALTab[mem_index]->write_timeout); + POLLING_TIMEOUT_SET(mem_tab[mem_index]->write_timeout); } else { - SET_POLLING_TIMEOUT(tMALTab[mem_index]->erase_timeout); + POLLING_TIMEOUT_SET(mem_tab[mem_index]->erase_timeout); } - return MAL_OK; + return MEM_OK; } else { - return MAL_FAIL; + return MEM_FAIL; } } @@ -216,14 +228,14 @@ uint8_t dfu_mal_getstatus (uint32_t addr, uint8_t cmd, uint8_t *buffer) \param[out] none \retval index of the addressed memory */ -static uint8_t dfu_mal_checkaddr (uint32_t addr) +static uint8_t dfu_mem_checkaddr (uint32_t addr) { uint8_t mem_index = 0U; /* check with all supported memories */ for (mem_index = 0U; mem_index < MAX_USED_MEMORY_MEDIA; mem_index++) { /* if the check address is supported, return the memory index */ - if (MAL_OK == tMALTab[mem_index]->mal_checkaddr(addr)) { + if (MEM_OK == mem_tab[mem_index]->mem_checkaddr(addr)) { return mem_index; } } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Include/custom_hid_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Include/custom_hid_core.h index d28db663..1119ca4e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Include/custom_hid_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Include/custom_hid_core.h @@ -3,10 +3,11 @@ \brief definitions for HID core \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -45,15 +46,16 @@ OF SUCH DAMAGE. #define MAX_PERIPH_NUM 4U -typedef struct { +typedef struct +{ uint8_t data[2]; - uint8_t reportID; uint8_t idlestate; uint8_t protocol; } custom_hid_handler; -typedef struct { +typedef struct +{ void (*periph_config[MAX_PERIPH_NUM])(void); } hid_fop_handler; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Include/standard_hid_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Include/standard_hid_core.h index dec63084..bc3ac791 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Include/standard_hid_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Include/standard_hid_core.h @@ -3,10 +3,11 @@ \brief definitions for HID core \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -43,15 +44,16 @@ OF SUCH DAMAGE. #define NO_CMD 0xFFU -typedef struct { +typedef struct +{ uint32_t protocol; uint32_t idle_state; - uint8_t data[HID_IN_PACKET]; __IO uint8_t prev_transfer_complete; } standard_hid_handler; -typedef struct { +typedef struct +{ void (*hid_itf_config) (void); void (*hid_itf_data_process) (usb_dev *udev); } hid_fop_handler; @@ -63,6 +65,6 @@ extern usb_class_core usbd_hid_cb; /* register HID interface operation functions */ uint8_t hid_itfop_register (usb_dev *udev, hid_fop_handler *hid_fop); /* send keyboard report */ -uint8_t hid_report_send (usb_dev *pudev, uint8_t *report, uint32_t len); +uint8_t hid_report_send (usb_dev *udev, uint8_t *report, uint32_t len); #endif /* __STANDARD_HID_CORE_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Source/custom_hid_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Source/custom_hid_core.c index 59d9f8a0..fc081e19 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Source/custom_hid_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Source/custom_hid_core.c @@ -4,10 +4,12 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2020-12-07, V3.0.1, firmware for GD32F30x + \version 2021-06-22, V3.0.2, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -482,7 +484,7 @@ static uint8_t custom_hid_data_out (usb_dev *udev, uint8_t ep_num) break; } - usbd_ep_recev (udev, CUSTOMHID_IN_EP, hid->data, 2U); + usbd_ep_recev (udev, CUSTOMHID_OUT_EP, hid->data, 2U); return USBD_OK; } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Source/standard_hid_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Source/standard_hid_core.c index d8938269..8e99e6bd 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Source/standard_hid_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/hid/Source/standard_hid_core.c @@ -3,10 +3,11 @@ \brief HID class driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -216,7 +217,8 @@ static uint8_t hid_deinit (usb_dev *udev, uint8_t config_index); static uint8_t hid_req (usb_dev *udev, usb_req *req); static uint8_t hid_data_in (usb_dev *udev, uint8_t ep_num); -usb_class_core usbd_hid_cb = { +usb_class_core usbd_hid_cb = +{ .command = NO_CMD, .alter_set = 0U, diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/iap/Include/usb_iap_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/iap/Include/usb_iap_core.h index 749a657c..e877115d 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/iap/Include/usb_iap_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/iap/Include/usb_iap_core.h @@ -3,10 +3,11 @@ \brief the header file of IAP driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -61,13 +62,10 @@ typedef struct /* state machine variables */ uint8_t dev_status[IAP_IN_PACKET]; uint8_t bin_addr[IAP_IN_PACKET]; - uint8_t reportID; uint8_t flag; - uint32_t protocol; uint32_t idlestate; - uint16_t transfer_times; uint16_t page_count; uint16_t lps; /* last packet size */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/iap/Source/usb_iap_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/iap/Source/usb_iap_core.c index fb1a8d44..e75c7377 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/iap/Source/usb_iap_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/iap/Source/usb_iap_core.c @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2020-12-07, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -207,7 +208,8 @@ static void iap_req_optionbyte(usb_dev *udev, uint8_t option_num); static void iap_req_leave (usb_dev *udev); static void iap_address_send (usb_dev *udev); -usb_class_core iap_class = { +usb_class_core iap_class = +{ .init = iap_init, .deinit = iap_deinit, .req_proc = iap_req_handler, diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_bbb.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_bbb.h index 293e04a6..1552325b 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_bbb.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_bbb.h @@ -3,10 +3,11 @@ \brief the header file of the usbd_msc_bot.c file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -41,7 +42,8 @@ OF SUCH DAMAGE. #include "usbd_msc_scsi.h" /* MSC BBB state */ -enum msc_bbb_state { +enum msc_bbb_state +{ BBB_IDLE = 0U, /*!< idle state */ BBB_DATA_OUT, /*!< data OUT state */ BBB_DATA_IN, /*!< data IN state */ @@ -50,7 +52,8 @@ enum msc_bbb_state { }; /* MSC BBB status */ -enum msc_bbb_status { +enum msc_bbb_status +{ BBB_STATUS_NORMAL = 0U, /*!< normal status */ BBB_STATUS_RECOVERY, /*!< recovery status*/ BBB_STATUS_ERROR /*!< error status */ @@ -84,18 +87,18 @@ typedef struct /* function declarations */ /* initialize the bbb process */ -void msc_bbb_init (usb_core_driver *pudev); +void msc_bbb_init (usb_core_driver *udev); /* reset the BBB machine */ -void msc_bbb_reset (usb_core_driver *pudev); -/* de-initialize the BBB machine */ -void msc_bbb_deinit (usb_core_driver *pudev); +void msc_bbb_reset (usb_core_driver *udev); +/* deinitialize the BBB machine */ +void msc_bbb_deinit (usb_core_driver *udev); /* handle BBB data IN stage */ -void msc_bbb_data_in (usb_core_driver *pudev, uint8_t ep_num); +void msc_bbb_data_in (usb_core_driver *udev, uint8_t ep_num); /* handle BBB data OUT stage */ -void msc_bbb_data_out (usb_core_driver *pudev, uint8_t ep_num); +void msc_bbb_data_out (usb_core_driver *udev, uint8_t ep_num); /* send the CSW(command status wrapper) */ -void msc_bbb_csw_send (usb_core_driver *pudev, uint8_t csw_status); +void msc_bbb_csw_send (usb_core_driver *udev, uint8_t csw_status); /* complete the clear feature request */ -void msc_bbb_clrfeature (usb_core_driver *pudev, uint8_t ep_num); +void msc_bbb_clrfeature (usb_core_driver *udev, uint8_t ep_num); #endif /* __USBD_MSC_BBB_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_core.h index ca7a9cdb..10b9f026 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_core.h @@ -3,10 +3,11 @@ \brief the header file of USB MSC device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -47,7 +48,6 @@ OF SUCH DAMAGE. typedef struct { usb_desc_config config; - usb_desc_itf msc_itf; usb_desc_ep msc_epin; usb_desc_ep msc_epout; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_data.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_data.h deleted file mode 100644 index 80b50085..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_data.h +++ /dev/null @@ -1,49 +0,0 @@ -/*! - \file usbd_msc_data.h - \brief the header file of the usbd_msc_data.c file - - \version 2020-08-01, V3.0.0, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#ifndef __USBD_MSC_DATA_H -#define __USBD_MSC_DATA_H - -#include "usbd_conf.h" - -#define MODE_SENSE6_LENGTH 8U -#define MODE_SENSE10_LENGTH 8U -#define INQUIRY_PAGE00_LENGTH 96U -#define FORMAT_CAPACITIES_LENGTH 20U - -extern const uint8_t msc_page00_inquiry_data[]; -extern const uint8_t msc_mode_sense6_data[]; -extern const uint8_t msc_mode_sense10_data[]; - -#endif /* __USBD_MSC_DATA_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_mem.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_mem.h index 7c0bdd19..f15cd56c 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_mem.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_mem.h @@ -3,10 +3,11 @@ \brief header file for storage memory \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_scsi.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_scsi.h index 0bfa21cb..d1112194 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_scsi.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Include/usbd_msc_scsi.h @@ -3,10 +3,11 @@ \brief the header file of the usbd_msc_scsi.c file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -35,16 +36,24 @@ OF SUCH DAMAGE. #ifndef __USBD_MSC_SCSI_H #define __USBD_MSC_SCSI_H -#include "usbd_msc_data.h" #include "usbd_msc_bbb.h" #include "msc_scsi.h" #define SENSE_LIST_DEEPTH 4U +#define MODE_SENSE6_LENGTH 8U +#define MODE_SENSE10_LENGTH 8U +#define INQUIRY_PAGE00_LENGTH 96U +#define FORMAT_CAPACITIES_LENGTH 20U + +extern const uint8_t msc_page00_inquiry_data[]; +extern const uint8_t msc_mode_sense6_data[]; +extern const uint8_t msc_mode_sense10_data[]; + /* function declarations */ /* process SCSI commands */ -int8_t scsi_process_cmd (usb_core_driver *pudev, uint8_t lun, uint8_t *cmd); +int8_t scsi_process_cmd (usb_core_driver *udev, uint8_t lun, uint8_t *cmd); /* load the last error code in the error list */ -void scsi_sense_code (usb_core_driver *pudev, uint8_t lun, uint8_t skey, uint8_t asc); +void scsi_sense_code (usb_core_driver *udev, uint8_t lun, uint8_t skey, uint8_t asc); #endif /* __USBD_MSC_SCSI_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_bbb.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_bbb.c index 2fa1804c..8397973c 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_bbb.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_bbb.c @@ -4,10 +4,11 @@ \note BBB means Bulk-only transport protocol for USB MSC \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -37,91 +38,91 @@ OF SUCH DAMAGE. #include "usbd_msc_bbb.h" /* local function prototypes ('static') */ -static void msc_bbb_cbw_decode (usb_core_driver *pudev); -static void msc_bbb_data_send (usb_core_driver *pudev, uint8_t *pbuf, uint32_t Len); -static void msc_bbb_abort (usb_core_driver *pudev); +static void msc_bbb_cbw_decode (usb_core_driver *udev); +static void msc_bbb_data_send (usb_core_driver *udev, uint8_t *pbuf, uint32_t Len); +static void msc_bbb_abort (usb_core_driver *udev); /*! \brief initialize the bbb process - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[out] none \retval none */ -void msc_bbb_init (usb_core_driver *pudev) +void msc_bbb_init (usb_core_driver *udev) { uint8_t lun_num; - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_state = BBB_IDLE; msc->bbb_status = BBB_STATUS_NORMAL; - /* init the storage logic unit */ + /* initializes the storage logic unit */ for(lun_num = 0U; lun_num < MEM_LUN_NUM; lun_num++) { usbd_mem_fops->mem_init(lun_num); } - /* flush the Rx FIFO */ - usbd_fifo_flush (pudev, MSC_OUT_EP); + /* flush the RX FIFO */ + usbd_fifo_flush (udev, MSC_OUT_EP); - /* flush the Tx FIFO */ - usbd_fifo_flush (pudev, MSC_IN_EP); + /* flush the TX FIFO */ + usbd_fifo_flush (udev, MSC_IN_EP); /* prepare endpoint to receive the first BBB CBW */ - usbd_ep_recev (pudev, MSC_OUT_EP, (uint8_t *)&msc->bbb_cbw, BBB_CBW_LENGTH); + usbd_ep_recev (udev, MSC_OUT_EP, (uint8_t *)&msc->bbb_cbw, BBB_CBW_LENGTH); } /*! \brief reset the BBB machine - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[out] none \retval none */ -void msc_bbb_reset (usb_core_driver *pudev) +void msc_bbb_reset (usb_core_driver *udev) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_state = BBB_IDLE; msc->bbb_status = BBB_STATUS_RECOVERY; /* prepare endpoint to receive the first BBB command */ - usbd_ep_recev (pudev, MSC_OUT_EP, (uint8_t *)&msc->bbb_cbw, BBB_CBW_LENGTH); + usbd_ep_recev (udev, MSC_OUT_EP, (uint8_t *)&msc->bbb_cbw, BBB_CBW_LENGTH); } /*! - \brief de-initialize the BBB machine - \param[in] pudev: pointer to USB device instance + \brief deinitialize the BBB machine + \param[in] udev: pointer to USB device instance \param[out] none \retval none */ -void msc_bbb_deinit (usb_core_driver *pudev) +void msc_bbb_deinit (usb_core_driver *udev) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_state = BBB_IDLE; } /*! \brief handle BBB data IN stage - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] ep_num: endpoint number \param[out] none \retval none */ -void msc_bbb_data_in (usb_core_driver *pudev, uint8_t ep_num) +void msc_bbb_data_in (usb_core_driver *udev, uint8_t ep_num) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; switch (msc->bbb_state) { case BBB_DATA_IN: - if (scsi_process_cmd (pudev, msc->bbb_cbw.bCBWLUN, &msc->bbb_cbw.CBWCB[0]) < 0) { - msc_bbb_csw_send (pudev, CSW_CMD_FAILED); + if (scsi_process_cmd (udev, msc->bbb_cbw.bCBWLUN, &msc->bbb_cbw.CBWCB[0]) < 0) { + msc_bbb_csw_send (udev, CSW_CMD_FAILED); } break; case BBB_SEND_DATA: case BBB_LAST_DATA_IN: - msc_bbb_csw_send (pudev, CSW_CMD_PASSED); + msc_bbb_csw_send (udev, CSW_CMD_PASSED); break; default: @@ -131,23 +132,23 @@ void msc_bbb_data_in (usb_core_driver *pudev, uint8_t ep_num) /*! \brief handle BBB data OUT stage - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] ep_num: endpoint number \param[out] none \retval none */ -void msc_bbb_data_out (usb_core_driver *pudev, uint8_t ep_num) +void msc_bbb_data_out (usb_core_driver *udev, uint8_t ep_num) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; switch (msc->bbb_state) { case BBB_IDLE: - msc_bbb_cbw_decode (pudev); + msc_bbb_cbw_decode (udev); break; case BBB_DATA_OUT: - if (scsi_process_cmd (pudev, msc->bbb_cbw.bCBWLUN, &msc->bbb_cbw.CBWCB[0]) < 0) { - msc_bbb_csw_send (pudev, CSW_CMD_FAILED); + if (scsi_process_cmd (udev, msc->bbb_cbw.bCBWLUN, &msc->bbb_cbw.CBWCB[0]) < 0) { + msc_bbb_csw_send (udev, CSW_CMD_FAILED); } break; @@ -158,42 +159,42 @@ void msc_bbb_data_out (usb_core_driver *pudev, uint8_t ep_num) /*! \brief send the CSW(command status wrapper) - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] csw_status: CSW status \param[out] none \retval none */ -void msc_bbb_csw_send (usb_core_driver *pudev, uint8_t csw_status) +void msc_bbb_csw_send (usb_core_driver *udev, uint8_t csw_status) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_csw.dCSWSignature = BBB_CSW_SIGNATURE; msc->bbb_csw.bCSWStatus = csw_status; msc->bbb_state = BBB_IDLE; - usbd_ep_send (pudev, MSC_IN_EP, (uint8_t *)&msc->bbb_csw, BBB_CSW_LENGTH); + usbd_ep_send (udev, MSC_IN_EP, (uint8_t *)&msc->bbb_csw, BBB_CSW_LENGTH); - /* prapare endpoint to receive next command */ - usbd_ep_recev (pudev, MSC_OUT_EP, (uint8_t *)&msc->bbb_cbw, BBB_CBW_LENGTH); + /* prepare endpoint to receive next command */ + usbd_ep_recev (udev, MSC_OUT_EP, (uint8_t *)&msc->bbb_cbw, BBB_CBW_LENGTH); } /*! \brief complete the clear feature request - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] ep_num: endpoint number \param[out] none \retval none */ -void msc_bbb_clrfeature (usb_core_driver *pudev, uint8_t ep_num) +void msc_bbb_clrfeature (usb_core_driver *udev, uint8_t ep_num) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; if (msc->bbb_status == BBB_STATUS_ERROR)/* bad CBW signature */ { - usbd_ep_stall(pudev, MSC_IN_EP); + usbd_ep_stall(udev, MSC_IN_EP); msc->bbb_status = BBB_STATUS_NORMAL; } else if(((ep_num & 0x80U) == 0x80U) && (msc->bbb_status != BBB_STATUS_RECOVERY)) { - msc_bbb_csw_send (pudev, CSW_CMD_FAILED); + msc_bbb_csw_send (udev, CSW_CMD_FAILED); } else { } @@ -201,38 +202,38 @@ void msc_bbb_clrfeature (usb_core_driver *pudev, uint8_t ep_num) /*! \brief decode the CBW command and set the BBB state machine accordingly - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[out] none \retval none */ -static void msc_bbb_cbw_decode (usb_core_driver *pudev) +static void msc_bbb_cbw_decode (usb_core_driver *udev) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_csw.dCSWTag = msc->bbb_cbw.dCBWTag; msc->bbb_csw.dCSWDataResidue = msc->bbb_cbw.dCBWDataTransferLength; - if ((BBB_CBW_LENGTH != usbd_rxcount_get (pudev, MSC_OUT_EP)) || + if ((BBB_CBW_LENGTH != usbd_rxcount_get (udev, MSC_OUT_EP)) || (BBB_CBW_SIGNATURE != msc->bbb_cbw.dCBWSignature)|| (msc->bbb_cbw.bCBWLUN > 1U) || (msc->bbb_cbw.bCBWCBLength < 1U) || (msc->bbb_cbw.bCBWCBLength > 16U)) { /* illegal command handler */ - scsi_sense_code (pudev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); + scsi_sense_code (udev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); msc->bbb_status = BBB_STATUS_ERROR; - msc_bbb_abort (pudev); + msc_bbb_abort (udev); } else { - if (scsi_process_cmd (pudev, msc->bbb_cbw.bCBWLUN, &msc->bbb_cbw.CBWCB[0]) < 0) { - msc_bbb_abort (pudev); + if (scsi_process_cmd (udev, msc->bbb_cbw.bCBWLUN, &msc->bbb_cbw.CBWCB[0]) < 0) { + msc_bbb_abort (udev); } else if ((BBB_DATA_IN != msc->bbb_state) && (BBB_DATA_OUT != msc->bbb_state) && (BBB_LAST_DATA_IN != msc->bbb_state)) { /* burst xfer handled internally */ if (msc->bbb_datalen > 0U) { - msc_bbb_data_send (pudev, msc->bbb_data, msc->bbb_datalen); + msc_bbb_data_send (udev, msc->bbb_data, msc->bbb_datalen); } else if (0U == msc->bbb_datalen) { - msc_bbb_csw_send (pudev, CSW_CMD_PASSED); + msc_bbb_csw_send (udev, CSW_CMD_PASSED); } else { } @@ -244,15 +245,15 @@ static void msc_bbb_cbw_decode (usb_core_driver *pudev) /*! \brief send the requested data - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] buf: pointer to data buffer \param[in] len: data length \param[out] none \retval none */ -static void msc_bbb_data_send (usb_core_driver *pudev, uint8_t *buf, uint32_t len) +static void msc_bbb_data_send (usb_core_driver *udev, uint8_t *buf, uint32_t len) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; len = USB_MIN (msc->bbb_cbw.dCBWDataTransferLength, len); @@ -260,28 +261,28 @@ static void msc_bbb_data_send (usb_core_driver *pudev, uint8_t *buf, uint32_t le msc->bbb_csw.bCSWStatus = CSW_CMD_PASSED; msc->bbb_state = BBB_SEND_DATA; - usbd_ep_send (pudev, MSC_IN_EP, buf, len); + usbd_ep_send (udev, MSC_IN_EP, buf, len); } /*! \brief abort the current transfer - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[out] none \retval none */ -static void msc_bbb_abort (usb_core_driver *pudev) +static void msc_bbb_abort (usb_core_driver *udev) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; if ((0U == msc->bbb_cbw.bmCBWFlags) && (0U != msc->bbb_cbw.dCBWDataTransferLength) && (BBB_STATUS_NORMAL == msc->bbb_status)) { - usbd_ep_stall(pudev, MSC_OUT_EP); + usbd_ep_stall(udev, MSC_OUT_EP); } - usbd_ep_stall(pudev, MSC_IN_EP); + usbd_ep_stall(udev, MSC_IN_EP); if (msc->bbb_status == BBB_STATUS_ERROR) { - usbd_ep_recev (pudev, MSC_OUT_EP, (uint8_t *)&msc->bbb_cbw, BBB_CBW_LENGTH); + usbd_ep_recev (udev, MSC_OUT_EP, (uint8_t *)&msc->bbb_cbw, BBB_CBW_LENGTH); } } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_core.c index 1adfc01b..01daf489 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_core.c @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2020-12-07, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -42,11 +43,11 @@ OF SUCH DAMAGE. #define USBD_PID 0x028FU /* local function prototypes ('static') */ -static uint8_t msc_core_init (usb_dev *pudev, uint8_t config_index); -static uint8_t msc_core_deinit (usb_dev *pudev, uint8_t config_index); -static uint8_t msc_core_req (usb_dev *pudev, usb_req *req); -static uint8_t msc_core_in (usb_dev *pudev, uint8_t ep_num); -static uint8_t msc_core_out (usb_dev *pudev, uint8_t ep_num); +static uint8_t msc_core_init (usb_dev *udev, uint8_t config_index); +static uint8_t msc_core_deinit (usb_dev *udev, uint8_t config_index); +static uint8_t msc_core_req (usb_dev *udev, usb_req *req); +static uint8_t msc_core_in (usb_dev *udev, uint8_t ep_num); +static uint8_t msc_core_out (usb_dev *udev, uint8_t ep_num); usb_class_core msc_class = { @@ -200,60 +201,60 @@ static __ALIGN_BEGIN uint8_t usbd_msc_maxlun = 0U __ALIGN_END; /*! \brief initialize the MSC device - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] config_index: configuration index \param[out] none \retval USB device operation status */ -static uint8_t msc_core_init (usb_dev *pudev, uint8_t config_index) +static uint8_t msc_core_init (usb_dev *udev, uint8_t config_index) { static __ALIGN_BEGIN usbd_msc_handler msc_handler __ALIGN_END; memset((void *)&msc_handler, 0U, sizeof(usbd_msc_handler)); - pudev->dev.class_data[USBD_MSC_INTERFACE] = (void *)&msc_handler; + udev->dev.class_data[USBD_MSC_INTERFACE] = (void *)&msc_handler; - /* configure MSC Tx endpoint */ - usbd_ep_setup (pudev, &(msc_config_desc.msc_epin)); + /* configure MSC TX endpoint */ + usbd_ep_setup (udev, &(msc_config_desc.msc_epin)); - /* configure MSC Rx endpoint */ - usbd_ep_setup (pudev, &(msc_config_desc.msc_epout)); + /* configure MSC RX endpoint */ + usbd_ep_setup (udev, &(msc_config_desc.msc_epout)); - /* init the BBB layer */ - msc_bbb_init(pudev); + /* initialize the BBB layer */ + msc_bbb_init(udev); return USBD_OK; } /*! - \brief de-initialize the MSC device - \param[in] pudev: pointer to USB device instance + \brief deinitialize the MSC device + \param[in] udev: pointer to USB device instance \param[in] config_index: configuration index \param[out] none \retval USB device operation status */ -static uint8_t msc_core_deinit (usb_dev *pudev, uint8_t config_index) +static uint8_t msc_core_deinit (usb_dev *udev, uint8_t config_index) { /* clear MSC endpoints */ - usbd_ep_clear (pudev, MSC_IN_EP); - usbd_ep_clear (pudev, MSC_OUT_EP); + usbd_ep_clear (udev, MSC_IN_EP); + usbd_ep_clear (udev, MSC_OUT_EP); - /* un-init the BBB layer */ - msc_bbb_deinit(pudev); + /* deinitialize the BBB layer */ + msc_bbb_deinit(udev); return USBD_OK; } /*! \brief handle the MSC class-specific and standard requests - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] req: device class-specific request \param[out] none \retval USB device operation status */ -static uint8_t msc_core_req (usb_dev *pudev, usb_req *req) +static uint8_t msc_core_req (usb_dev *udev, usb_req *req) { - usb_transc *transc = &pudev->dev.transc_in[0]; + usb_transc *transc = &udev->dev.transc_in[0]; switch (req->bRequest) { case BBB_GET_MAX_LUN : @@ -273,14 +274,14 @@ static uint8_t msc_core_req (usb_dev *pudev, usb_req *req) if((0U == req->wValue) && (0U == req->wLength) && (0x80U != (req->bmRequestType & 0x80U))) { - msc_bbb_reset(pudev); + msc_bbb_reset(udev); } else { return USBD_FAIL; } break; case USB_CLEAR_FEATURE: - msc_bbb_clrfeature (pudev, (uint8_t)req->wIndex); + msc_bbb_clrfeature (udev, (uint8_t)req->wIndex); break; default: @@ -292,28 +293,28 @@ static uint8_t msc_core_req (usb_dev *pudev, usb_req *req) /*! \brief handle data in stage - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] ep_num: the endpoint number \param[out] none \retval none */ -static uint8_t msc_core_in (usb_dev *pudev, uint8_t ep_num) +static uint8_t msc_core_in (usb_dev *udev, uint8_t ep_num) { - msc_bbb_data_in(pudev, ep_num); + msc_bbb_data_in(udev, ep_num); return USBD_OK; } /*! \brief handle data out stage - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] ep_num: the endpoint number \param[out] none \retval none */ -static uint8_t msc_core_out (usb_dev *pudev, uint8_t ep_num) +static uint8_t msc_core_out (usb_dev *udev, uint8_t ep_num) { - msc_bbb_data_out (pudev, ep_num); + msc_bbb_data_out (udev, ep_num); return USBD_OK; } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_data.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_data.c deleted file mode 100644 index c5fbf9ad..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_data.c +++ /dev/null @@ -1,73 +0,0 @@ -/*! - \file usbd_msc_data.c - \brief USB MSC vital inquiry pages and sense data - - \version 2020-08-01, V3.0.0, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#include "usbd_msc_data.h" - -/* USB mass storage page 0 inquiry data */ -const uint8_t msc_page00_inquiry_data[] = -{ - 0x00U, - 0x00U, - 0x00U, - 0x00U, - (INQUIRY_PAGE00_LENGTH - 4U), - 0x80U, - 0x83U, -}; - -/* USB mass storage sense 6 data */ -const uint8_t msc_mode_sense6_data[] = -{ - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U -}; - -/* USB mass storage sense 10 data */ -const uint8_t msc_mode_sense10_data[] = -{ - 0x00U, - 0x06U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U, - 0x00U -}; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_scsi.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_scsi.c index b6e182ae..ee8598ec 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_scsi.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/msc/Source/usbd_msc_scsi.c @@ -3,10 +3,11 @@ \brief USB SCSI layer functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -35,107 +36,145 @@ OF SUCH DAMAGE. #include "usbd_enum.h" #include "usbd_msc_bbb.h" #include "usbd_msc_scsi.h" -#include "usbd_msc_data.h" + +/* USB mass storage page 0 inquiry data */ +const uint8_t msc_page00_inquiry_data[] = +{ + 0x00U, + 0x00U, + 0x00U, + 0x00U, + (INQUIRY_PAGE00_LENGTH - 4U), + 0x80U, + 0x83U, +}; + +/* USB mass storage sense 6 data */ +const uint8_t msc_mode_sense6_data[] = +{ + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U +}; + +/* USB mass storage sense 10 data */ +const uint8_t msc_mode_sense10_data[] = +{ + 0x00U, + 0x06U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U, + 0x00U +}; /* local function prototypes ('static') */ -static int8_t scsi_test_unit_ready (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_mode_select6 (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_mode_select10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_inquiry (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_read_format_capacity (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_read_capacity10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_request_sense (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_mode_sense6 (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_toc_cmd_read (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_mode_sense10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_write10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_read10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_verify10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static int8_t scsi_process_read (usb_core_driver *pudev, uint8_t lun); -static int8_t scsi_process_write (usb_core_driver *pudev, uint8_t lun); - -static inline int8_t scsi_check_address_range (usb_core_driver *pudev, uint8_t lun, uint32_t blk_offset, uint16_t blk_nbr); -static inline int8_t scsi_format_cmd (usb_core_driver *pudev, uint8_t lun); -static inline int8_t scsi_start_stop_unit (usb_core_driver *pudev, uint8_t lun, uint8_t *params); -static inline int8_t scsi_allow_medium_removal (usb_core_driver *pudev, uint8_t lun, uint8_t *params); +static int8_t scsi_test_unit_ready (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_mode_select6 (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_mode_select10 (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_inquiry (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_read_format_capacity (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_read_capacity10 (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_request_sense (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_mode_sense6 (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_toc_cmd_read (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_mode_sense10 (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_write10 (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_read10 (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static int8_t scsi_verify10 (usb_core_driver *udev, uint8_t lun, uint8_t *params); + +static int8_t scsi_process_read (usb_core_driver *udev, uint8_t lun); +static int8_t scsi_process_write (usb_core_driver *udev, uint8_t lun); + +static inline int8_t scsi_check_address_range (usb_core_driver *udev, uint8_t lun, uint32_t blk_offset, uint16_t blk_nbr); +static inline int8_t scsi_format_cmd (usb_core_driver *udev, uint8_t lun); +static inline int8_t scsi_start_stop_unit (usb_core_driver *udev, uint8_t lun, uint8_t *params); +static inline int8_t scsi_allow_medium_removal (usb_core_driver *udev, uint8_t lun, uint8_t *params); /*! \brief process SCSI commands - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -int8_t scsi_process_cmd(usb_core_driver *pudev, uint8_t lun, uint8_t *params) +int8_t scsi_process_cmd(usb_core_driver *udev, uint8_t lun, uint8_t *params) { switch (params[0]) { case SCSI_TEST_UNIT_READY: - return scsi_test_unit_ready (pudev, lun, params); + return scsi_test_unit_ready (udev, lun, params); case SCSI_REQUEST_SENSE: - return scsi_request_sense (pudev, lun, params); + return scsi_request_sense (udev, lun, params); case SCSI_INQUIRY: - return scsi_inquiry (pudev, lun, params); + return scsi_inquiry (udev, lun, params); case SCSI_START_STOP_UNIT: - return scsi_start_stop_unit (pudev, lun, params); + return scsi_start_stop_unit (udev, lun, params); case SCSI_ALLOW_MEDIUM_REMOVAL: - return scsi_allow_medium_removal (pudev, lun, params); + return scsi_allow_medium_removal (udev, lun, params); case SCSI_MODE_SENSE6: - return scsi_mode_sense6 (pudev, lun, params); + return scsi_mode_sense6 (udev, lun, params); case SCSI_MODE_SENSE10: - return scsi_mode_sense10 (pudev, lun, params); + return scsi_mode_sense10 (udev, lun, params); case SCSI_READ_FORMAT_CAPACITIES: - return scsi_read_format_capacity (pudev, lun, params); + return scsi_read_format_capacity (udev, lun, params); case SCSI_READ_CAPACITY10: - return scsi_read_capacity10 (pudev, lun, params); + return scsi_read_capacity10 (udev, lun, params); case SCSI_READ10: - return scsi_read10 (pudev, lun, params); + return scsi_read10 (udev, lun, params); case SCSI_WRITE10: - return scsi_write10 (pudev, lun, params); + return scsi_write10 (udev, lun, params); case SCSI_VERIFY10: - return scsi_verify10 (pudev, lun, params); + return scsi_verify10 (udev, lun, params); case SCSI_FORMAT_UNIT: - return scsi_format_cmd (pudev, lun); + return scsi_format_cmd (udev, lun); case SCSI_READ_TOC_DATA: - return scsi_toc_cmd_read (pudev, lun, params); - + return scsi_toc_cmd_read (udev, lun, params); + case SCSI_MODE_SELECT6: - return scsi_mode_select6 (pudev, lun, params); + return scsi_mode_select6 (udev, lun, params); case SCSI_MODE_SELECT10: - return scsi_mode_select10 (pudev, lun, params); + return scsi_mode_select10 (udev, lun, params); default: - scsi_sense_code (pudev, lun, ILLEGAL_REQUEST, INVALID_CDB); + scsi_sense_code (udev, lun, ILLEGAL_REQUEST, INVALID_CDB); return -1; } } /*! \brief load the last error code in the error list - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] skey: sense key - \param[in] asc: additional aense key + \param[in] asc: additional sense key \param[out] none \retval none */ -void scsi_sense_code (usb_core_driver *pudev, uint8_t lun, uint8_t skey, uint8_t asc) +void scsi_sense_code (usb_core_driver *udev, uint8_t lun, uint8_t skey, uint8_t asc) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->scsi_sense[msc->scsi_sense_tail].SenseKey = skey; msc->scsi_sense[msc->scsi_sense_tail].ASC = asc << 8U; @@ -148,29 +187,29 @@ void scsi_sense_code (usb_core_driver *pudev, uint8_t lun, uint8_t skey, uint8_t /*! \brief process SCSI Test Unit Ready command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_test_unit_ready (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_test_unit_ready (usb_core_driver *udev, uint8_t lun, uint8_t *params) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; /* case 9 : Hi > D0 */ if (0U != msc->bbb_cbw.dCBWDataTransferLength) { - scsi_sense_code (pudev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); + scsi_sense_code (udev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); return -1; } if (0 != usbd_mem_fops->mem_ready(lun)) { - scsi_sense_code(pudev, lun, NOT_READY, MEDIUM_NOT_PRESENT); + scsi_sense_code(udev, lun, NOT_READY, MEDIUM_NOT_PRESENT); return -1; } - + msc->bbb_datalen = 0U; return 0; @@ -184,9 +223,9 @@ static int8_t scsi_test_unit_ready (usb_core_driver *pudev, uint8_t lun, uint8_t \param[out] none \retval status */ -static int8_t scsi_mode_select6 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_mode_select6 (usb_core_driver *udev, uint8_t lun, uint8_t *params) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_datalen = 0U; @@ -201,9 +240,9 @@ static int8_t scsi_mode_select6 (usb_core_driver *pudev, uint8_t lun, uint8_t *p \param[out] none \retval status */ -static int8_t scsi_mode_select10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_mode_select10 (usb_core_driver *udev, uint8_t lun, uint8_t *params) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_datalen = 0U; @@ -212,21 +251,20 @@ static int8_t scsi_mode_select10 (usb_core_driver *pudev, uint8_t lun, uint8_t * /*! \brief process Inquiry command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_inquiry (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_inquiry (usb_core_driver *udev, uint8_t lun, uint8_t *params) { uint8_t *page = NULL; uint16_t len = 0U; - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; if (params[1] & 0x01U) { - /* Evpd is set */ page = (uint8_t *)msc_page00_inquiry_data; len = INQUIRY_PAGE00_LENGTH; @@ -252,16 +290,16 @@ static int8_t scsi_inquiry (usb_core_driver *pudev, uint8_t lun, uint8_t *params /*! \brief process Read Capacity 10 command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_read_capacity10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_read_capacity10 (usb_core_driver *udev, uint8_t lun, uint8_t *params) { uint32_t blk_num = usbd_mem_fops->mem_block_len[lun] - 1U; - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->scsi_blk_nbr[lun] = usbd_mem_fops->mem_block_len[lun]; msc->scsi_blk_size[lun] = usbd_mem_fops->mem_block_size[lun]; @@ -283,20 +321,20 @@ static int8_t scsi_read_capacity10 (usb_core_driver *pudev, uint8_t lun, uint8_t /*! \brief process Read Format Capacity command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_read_format_capacity (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_read_format_capacity (usb_core_driver *udev, uint8_t lun, uint8_t *params) { uint16_t i = 0U; uint32_t blk_size = usbd_mem_fops->mem_block_size[lun]; uint32_t blk_num = usbd_mem_fops->mem_block_len[lun]; uint32_t blk_nbr = blk_num - 1U; - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; for (i = 0U; i < 12U; i++) { msc->bbb_data[i] = 0U; @@ -320,16 +358,16 @@ static int8_t scsi_read_format_capacity (usb_core_driver *pudev, uint8_t lun, ui /*! \brief process Mode Sense6 command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_mode_sense6 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_mode_sense6 (usb_core_driver *udev, uint8_t lun, uint8_t *params) { uint16_t len = 8U; - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_datalen = len; @@ -343,16 +381,16 @@ static int8_t scsi_mode_sense6 (usb_core_driver *pudev, uint8_t lun, uint8_t *pa /*! \brief process Mode Sense10 command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_mode_sense10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_mode_sense10 (usb_core_driver *udev, uint8_t lun, uint8_t *params) { uint16_t len = 8U; - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_datalen = len; @@ -366,16 +404,16 @@ static int8_t scsi_mode_sense10 (usb_core_driver *pudev, uint8_t lun, uint8_t *p /*! \brief process Request Sense command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_request_sense (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_request_sense (usb_core_driver *udev, uint8_t lun, uint8_t *params) { uint8_t i = 0U; - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; for (i = 0U; i < REQUEST_SENSE_DATA_LEN; i++) { msc->bbb_data[i] = 0U; @@ -402,15 +440,15 @@ static int8_t scsi_request_sense (usb_core_driver *pudev, uint8_t lun, uint8_t * /*! \brief process Start Stop Unit command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static inline int8_t scsi_start_stop_unit (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static inline int8_t scsi_start_stop_unit (usb_core_driver *udev, uint8_t lun, uint8_t *params) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_datalen = 0U; msc->scsi_disk_pop = 1U; @@ -420,15 +458,15 @@ static inline int8_t scsi_start_stop_unit (usb_core_driver *pudev, uint8_t lun, /*! \brief process Allow Medium Removal command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static inline int8_t scsi_allow_medium_removal (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static inline int8_t scsi_allow_medium_removal (usb_core_driver *udev, uint8_t lun, uint8_t *params) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; msc->bbb_datalen = 0U; @@ -437,26 +475,26 @@ static inline int8_t scsi_allow_medium_removal (usb_core_driver *pudev, uint8_t /*! \brief process Read10 command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_read10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_read10 (usb_core_driver *udev, uint8_t lun, uint8_t *params) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; if (msc->bbb_state == BBB_IDLE) { /* direction is from device to host */ if (0x80U != (msc->bbb_cbw.bmCBWFlags & 0x80U)) { - scsi_sense_code (pudev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); + scsi_sense_code (udev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); return -1; } if (0 != usbd_mem_fops->mem_ready(lun)) { - scsi_sense_code (pudev, lun, NOT_READY, MEDIUM_NOT_PRESENT); + scsi_sense_code (udev, lun, NOT_READY, MEDIUM_NOT_PRESENT); return -1; } @@ -466,7 +504,7 @@ static int8_t scsi_read10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) msc->scsi_blk_len = (params[7] << 8U) | params[8]; - if (scsi_check_address_range (pudev, lun, msc->scsi_blk_addr, (uint16_t)msc->scsi_blk_len) < 0) { + if (scsi_check_address_range (udev, lun, msc->scsi_blk_addr, (uint16_t)msc->scsi_blk_len) < 0) { return -1; /* error */ } @@ -477,7 +515,7 @@ static int8_t scsi_read10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) /* cases 4,5 : Hi <> Dn */ if (msc->bbb_cbw.dCBWDataTransferLength != msc->scsi_blk_len) { - scsi_sense_code (pudev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); + scsi_sense_code (udev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); return -1; } @@ -485,39 +523,39 @@ static int8_t scsi_read10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) msc->bbb_datalen = MSC_MEDIA_PACKET_SIZE; - return scsi_process_read (pudev, lun); + return scsi_process_read (udev, lun); } /*! \brief process Write10 command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_write10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_write10 (usb_core_driver *udev, uint8_t lun, uint8_t *params) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; if (BBB_IDLE == msc->bbb_state) { /* case 8 : Hi <> Do */ if (0x80U == (msc->bbb_cbw.bmCBWFlags & 0x80U)) { - scsi_sense_code (pudev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); + scsi_sense_code (udev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); return -1; } /* check whether media is ready */ if (0 != usbd_mem_fops->mem_ready(lun)) { - scsi_sense_code (pudev, lun, NOT_READY, MEDIUM_NOT_PRESENT); + scsi_sense_code (udev, lun, NOT_READY, MEDIUM_NOT_PRESENT); return -1; } /* check if media is write-protected */ if (0 != usbd_mem_fops->mem_protected(lun)) { - scsi_sense_code (pudev, lun, NOT_READY, WRITE_PROTECTED); + scsi_sense_code (udev, lun, NOT_READY, WRITE_PROTECTED); return -1; } @@ -528,7 +566,7 @@ static int8_t scsi_write10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params msc->scsi_blk_len = (params[7] << 8U) | params[8]; /* check if LBA address is in the right range */ - if (scsi_check_address_range (pudev, lun, msc->scsi_blk_addr, (uint16_t)msc->scsi_blk_len) < 0) { + if (scsi_check_address_range (udev, lun, msc->scsi_blk_addr, (uint16_t)msc->scsi_blk_len) < 0) { return -1; /* error */ } @@ -537,7 +575,7 @@ static int8_t scsi_write10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params /* cases 3,11,13 : Hn,Ho <> D0 */ if (msc->bbb_cbw.dCBWDataTransferLength != msc->scsi_blk_len) { - scsi_sense_code (pudev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); + scsi_sense_code (udev, msc->bbb_cbw.bCBWLUN, ILLEGAL_REQUEST, INVALID_CDB); return -1; } @@ -545,12 +583,12 @@ static int8_t scsi_write10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params /* prepare endpoint to receive first data packet */ msc->bbb_state = BBB_DATA_OUT; - usbd_ep_recev (pudev, + usbd_ep_recev (udev, MSC_OUT_EP, msc->bbb_data, USB_MIN (msc->scsi_blk_len, MSC_MEDIA_PACKET_SIZE)); } else { /* write process ongoing */ - return scsi_process_write (pudev, lun); + return scsi_process_write (udev, lun); } return 0; @@ -558,23 +596,23 @@ static int8_t scsi_write10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params /*! \brief process Verify10 command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_verify10 (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_verify10 (usb_core_driver *udev, uint8_t lun, uint8_t *params) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; if (0x02U == (params[1] & 0x02U)) { - scsi_sense_code (pudev, lun, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + scsi_sense_code (udev, lun, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); return -1; /* error, verify mode not supported*/ } - if (scsi_check_address_range (pudev, lun, msc->scsi_blk_addr, (uint16_t)msc->scsi_blk_len) < 0) { + if (scsi_check_address_range (udev, lun, msc->scsi_blk_addr, (uint16_t)msc->scsi_blk_len) < 0) { return -1; /* error */ } @@ -585,19 +623,19 @@ static int8_t scsi_verify10 (usb_core_driver *pudev, uint8_t lun, uint8_t *param /*! \brief check address range - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] blk_offset: block offset \param[in] blk_nbr: number of block to be processed \param[out] none \retval status */ -static inline int8_t scsi_check_address_range (usb_core_driver *pudev, uint8_t lun, uint32_t blk_offset, uint16_t blk_nbr) +static inline int8_t scsi_check_address_range (usb_core_driver *udev, uint8_t lun, uint32_t blk_offset, uint16_t blk_nbr) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; if ((blk_offset + blk_nbr) > msc->scsi_blk_nbr[lun]) { - scsi_sense_code (pudev, lun, ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE); + scsi_sense_code (udev, lun, ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE); return -1; } @@ -607,14 +645,14 @@ static inline int8_t scsi_check_address_range (usb_core_driver *pudev, uint8_t l /*! \brief handle read process - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[out] none \retval status */ -static int8_t scsi_process_read (usb_core_driver *pudev, uint8_t lun) +static int8_t scsi_process_read (usb_core_driver *udev, uint8_t lun) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; uint32_t len = USB_MIN(msc->scsi_blk_len, MSC_MEDIA_PACKET_SIZE); @@ -622,12 +660,12 @@ static int8_t scsi_process_read (usb_core_driver *pudev, uint8_t lun) msc->bbb_data, msc->scsi_blk_addr, (uint16_t)(len / msc->scsi_blk_size[lun])) < 0) { - scsi_sense_code(pudev, lun, HARDWARE_ERROR, UNRECOVERED_READ_ERROR); + scsi_sense_code(udev, lun, HARDWARE_ERROR, UNRECOVERED_READ_ERROR); return -1; } - usbd_ep_send (pudev, MSC_IN_EP, msc->bbb_data, len); + usbd_ep_send (udev, MSC_IN_EP, msc->bbb_data, len); msc->scsi_blk_addr += len; msc->scsi_blk_len -= len; @@ -644,14 +682,14 @@ static int8_t scsi_process_read (usb_core_driver *pudev, uint8_t lun) /*! \brief handle write process - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[out] none \retval status */ -static int8_t scsi_process_write (usb_core_driver *pudev, uint8_t lun) +static int8_t scsi_process_write (usb_core_driver *udev, uint8_t lun) { - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; uint32_t len = USB_MIN(msc->scsi_blk_len, MSC_MEDIA_PACKET_SIZE); @@ -659,7 +697,7 @@ static int8_t scsi_process_write (usb_core_driver *pudev, uint8_t lun) msc->bbb_data, msc->scsi_blk_addr, (uint16_t)(len / msc->scsi_blk_size[lun])) < 0) { - scsi_sense_code(pudev, lun, HARDWARE_ERROR, WRITE_FAULT); + scsi_sense_code(udev, lun, HARDWARE_ERROR, WRITE_FAULT); return -1; } @@ -671,10 +709,10 @@ static int8_t scsi_process_write (usb_core_driver *pudev, uint8_t lun) msc->bbb_csw.dCSWDataResidue -= len; if (0U == msc->scsi_blk_len) { - msc_bbb_csw_send (pudev, CSW_CMD_PASSED); + msc_bbb_csw_send (udev, CSW_CMD_PASSED); } else { - /* prapare endpoint to receive next packet */ - usbd_ep_recev (pudev, + /* prepare endpoint to receive next packet */ + usbd_ep_recev (udev, MSC_OUT_EP, msc->bbb_data, USB_MIN (msc->scsi_blk_len, MSC_MEDIA_PACKET_SIZE)); @@ -685,30 +723,30 @@ static int8_t scsi_process_write (usb_core_driver *pudev, uint8_t lun) /*! \brief process Format Unit command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[out] none \retval status */ -static inline int8_t scsi_format_cmd (usb_core_driver *pudev, uint8_t lun) +static inline int8_t scsi_format_cmd (usb_core_driver *udev, uint8_t lun) { return 0; } /*! \brief process Read_Toc command - \param[in] pudev: pointer to USB device instance + \param[in] udev: pointer to USB device instance \param[in] lun: logical unit number \param[in] params: command parameters \param[out] none \retval status */ -static int8_t scsi_toc_cmd_read (usb_core_driver *pudev, uint8_t lun, uint8_t *params) +static int8_t scsi_toc_cmd_read (usb_core_driver *udev, uint8_t lun, uint8_t *params) { uint8_t* pPage; uint16_t len; - usbd_msc_handler *msc = (usbd_msc_handler *)pudev->dev.class_data[USBD_MSC_INTERFACE]; + usbd_msc_handler *msc = (usbd_msc_handler *)udev->dev.class_data[USBD_MSC_INTERFACE]; pPage = (uint8_t *)&usbd_mem_fops->mem_toc_data[lun * READ_TOC_CMD_LEN]; len = (uint16_t)pPage[1] + 2U; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/printer/Include/printer_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/printer/Include/printer_core.h index 9a3371ee..112b430e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/printer/Include/printer_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/printer/Include/printer_core.h @@ -3,10 +3,11 @@ \brief the header file of USB printer device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -38,13 +39,13 @@ OF SUCH DAMAGE. #include "usbd_enum.h" #include "usb_ch9_std.h" -/* USB printing device class code */ +/* USB printer device class code */ #define USB_CLASS_PRINTER 0x07U -/* printing device subclass code */ +/* printer device subclass code */ #define USB_SUBCLASS_PRINTER 0x01U -/* printing device protocol code */ +/* printer device protocol code */ #define PROTOCOL_UNIDIRECTIONAL_ITF 0x01U #define PROTOCOL_BI_DIRECTIONAL_ITF 0x02U #define PROTOCOL_1284_4_ITF 0x03U @@ -54,7 +55,7 @@ OF SUCH DAMAGE. #define USB_PRINTER_CONFIG_DESC_LEN 32U -/* printing device specific-class request */ +/* printer device specific-class request */ #define GET_DEVICE_ID 0x00U #define GET_PORT_STATUS 0x01U #define SOFT_RESET 0x02U diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/printer/Source/printer_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/printer/Source/printer_core.c index beef283e..69965fcb 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/printer/Source/printer_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/class/printer/Source/printer_core.c @@ -3,6 +3,7 @@ \brief USB printer device class core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_core.h index c4f82e45..1bc34f66 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_core.h @@ -3,10 +3,11 @@ \brief USB device mode core functions protype \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -45,7 +46,8 @@ typedef enum USBD_FAIL, /*!< status fail */ } usbd_status; -enum _usbd_status { +enum _usbd_status +{ USBD_DEFAULT = 1U, /*!< default status */ USBD_ADDRESSED = 2U, /*!< address send status */ USBD_CONFIGURED = 3U, /*!< configured status */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_enum.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_enum.h index a2e58de1..b6c78cfa 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_enum.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_enum.h @@ -3,10 +3,11 @@ \brief USB enumeration definitions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -43,7 +44,8 @@ OF SUCH DAMAGE. #define NULL 0U #endif -typedef enum _usb_reqsta { +typedef enum _usb_reqsta +{ REQ_SUPP = 0x0U, /* request support */ REQ_NOTSUPP = 0x1U, /* request not support */ } usb_reqsta; @@ -57,11 +59,7 @@ enum _str_index STR_IDX_SERIAL = 0x3U, /* serial string index */ STR_IDX_CONFIG = 0x4U, /* configuration string index */ STR_IDX_ITF = 0x5U, /* interface string index */ -#ifndef WINUSB_EXEMPT_DRIVER - STR_IDX_MAX = 0x6U, /* string maximum index */ -#else STR_IDX_MAX = 0xEFU, /* string maximum index */ -#endif /* WINUSB_EXEMPT_DRIVER */ }; typedef enum _usb_pwrsta { diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_transc.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_transc.h index 7aa24a00..5a65e333 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_transc.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Include/usbd_transc.h @@ -3,10 +3,11 @@ \brief USB transaction core functions prototype \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_core.c index 48fc97f8..1e855ca8 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_core.c @@ -3,10 +3,11 @@ \brief USB device mode core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -171,10 +172,6 @@ uint32_t usbd_ep_recev (usb_core_driver *udev, uint8_t ep_addr, uint8_t *pbuf, u transc->xfer_len = len; transc->xfer_count = 0U; - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - transc->dma_addr = (uint32_t)pbuf; - } - /* start the transfer */ (void)usb_transc_outxfer (udev, transc); @@ -202,10 +199,6 @@ uint32_t usbd_ep_send (usb_core_driver *udev, uint8_t ep_addr, uint8_t *pbuf, ui transc->xfer_len = len; transc->xfer_count = 0U; - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - transc->dma_addr = (uint32_t)pbuf; - } - /* start the transfer */ (void)usb_transc_inxfer (udev, transc); diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_enum.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_enum.c index 076901f4..894476e0 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_enum.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_enum.c @@ -3,10 +3,12 @@ \brief USB enumeration function \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2021-09-27, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -252,7 +254,7 @@ static uint8_t* _usb_config_desc_get (usb_core_driver *udev, uint8_t index, uint { (void)index; - *len = udev->dev.desc->config_desc[2]; + *len = udev->dev.desc->config_desc[2] | (udev->dev.desc->config_desc[3]<< 8); return udev->dev.desc->config_desc; } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_transc.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_transc.c index 52412b73..d7009244 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_transc.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/device/core/Source/usbd_transc.c @@ -3,10 +3,11 @@ \brief USB transaction core functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -177,10 +178,6 @@ uint8_t usbd_out_transc (usb_core_driver *udev, uint8_t ep_num) /* update transfer length */ transc->remain_len -= transc->max_len; - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - transc->xfer_buf += transc->max_len; - } - (void)usbd_ctl_recev (udev); break; @@ -225,10 +222,6 @@ uint8_t usbd_in_transc (usb_core_driver *udev, uint8_t ep_num) /* update transfer length */ transc->remain_len -= transc->max_len; - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - transc->xfer_buf += transc->max_len; - } - (void)usbd_ctl_send (udev); break; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_core.h index fe1fdb4d..5f795f48 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_core.h @@ -3,10 +3,11 @@ \brief USB core low level driver header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -73,7 +74,6 @@ typedef enum typedef enum { USB_USE_FIFO, /*!< USB use FIFO transfer mode */ - USB_USE_DMA /*!< USB use DMA transfer mode */ } usb_transfer_mode; typedef struct @@ -103,7 +103,11 @@ typedef struct */ __STATIC_INLINE uint32_t usb_coreintr_get(usb_core_regs *usb_regs) { - return usb_regs->gr->GINTEN & usb_regs->gr->GINTF; + uint32_t reg_data = usb_regs->gr->GINTEN; + + reg_data &= usb_regs->gr->GINTF; + + return reg_data; } /*! diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_dev.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_dev.h index d55cf986..58801aae 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_dev.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_dev.h @@ -4,10 +4,11 @@ \version 2020-08-01, V3.0.0, firmware for GD32F30x \version 2020-12-07, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -39,7 +40,8 @@ OF SUCH DAMAGE. #include "usbd_conf.h" #include "drv_usb_core.h" -enum usb_ctl_status { +enum usb_ctl_status +{ USB_CTL_IDLE = 0U, /*!< USB control transfer idle state */ USB_CTL_DATA_IN, /*!< USB control transfer data in state */ USB_CTL_LAST_DATA_IN, /*!< USB control transfer last data in state */ @@ -53,7 +55,8 @@ enum usb_ctl_status { #define EP_OUT(x) ((uint8_t)(x)) /*!< device OUT endpoint */ /* USB descriptor */ -typedef struct _usb_desc { +typedef struct _usb_desc +{ uint8_t *dev_desc; /*!< device descriptor */ uint8_t *config_desc; /*!< configure descriptor */ uint8_t *bos_desc; /*!< BOS descriptor */ @@ -62,7 +65,8 @@ typedef struct _usb_desc { } usb_desc; /* USB power management */ -typedef struct _usb_pm { +typedef struct _usb_pm +{ uint8_t power_mode; /*!< power mode */ uint8_t power_low; /*!< power low */ uint8_t dev_remote_wakeup; /*!< remote wakeup */ @@ -70,7 +74,8 @@ typedef struct _usb_pm { } usb_pm; /* USB control information */ -typedef struct _usb_control { +typedef struct _usb_control +{ usb_req req; /*!< USB standard device request */ uint8_t ctl_state; /*!< USB control transfer state */ @@ -97,8 +102,6 @@ typedef struct uint32_t xfer_count; /*!< transmit buffer count */ uint32_t remain_len; /*!< remain packet length */ - - uint32_t dma_addr; /*!< DMA address */ } usb_transc; typedef struct _usb_core_driver usb_dev; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_host.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_host.h index f547d3c0..3c59194d 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_host.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_host.h @@ -3,10 +3,11 @@ \brief USB host mode low level driver header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_hw.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_hw.h index 0e651636..c93ba853 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_hw.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_hw.h @@ -3,10 +3,11 @@ \brief usb hardware configuration header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -51,11 +52,6 @@ void usb_mdelay (const uint32_t msec); /* configures system clock after wakeup from STOP mode */ void system_clk_config_stop(void); -/* configure the CTC peripheral */ -#ifdef USE_IRC48M - void ctc_config(void); -#endif /* USE_IRC48M */ - #ifdef USE_HOST_MODE void systick_config(void); diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_regs.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_regs.h index 5d9f262c..23efb266 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_regs.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usb_regs.h @@ -3,10 +3,11 @@ \brief USB cell registers definition and handle macros \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usbd_int.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usbd_int.h index ec6bec6a..5d39a5be 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usbd_int.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usbd_int.h @@ -3,10 +3,11 @@ \brief USB device mode interrupt header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usbh_int.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usbh_int.h index 4808d992..b9296657 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usbh_int.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Include/drv_usbh_int.h @@ -3,10 +3,11 @@ \brief USB host mode interrupt management header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -38,16 +39,14 @@ OF SUCH DAMAGE. #include "drv_usb_host.h" #include "usbh_core.h" -typedef struct _usbh_int_cb +typedef struct _usbh_ev_cb { uint8_t (*connect) (usbh_host *puhost); uint8_t (*disconnect) (usbh_host *puhost); - uint8_t (*port_enabled) (usbh_host *puhost); - uint8_t (*port_disabled) (usbh_host *puhost); uint8_t (*SOF) (usbh_host *puhost); -} usbh_int_cb; +} usbh_ev_cb; -extern usbh_int_cb *usbh_int_fop; +extern usbh_ev_cb *usbh_int_fop; /* function declarations */ /* handle global host interrupt */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_core.c index 269b7bb5..580aca64 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_core.c @@ -3,10 +3,11 @@ \brief USB core driver which can operate in host and device mode \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -161,11 +162,6 @@ usb_status usb_core_init (usb_core_basic usb_basic, usb_core_regs *usb_regs) usb_mdelay(20U); } - if ((uint8_t)USB_USE_DMA == usb_basic.transfer_mode) { - usb_regs->gr->GAHBCS &= ~GAHBCS_BURST; - usb_regs->gr->GAHBCS |= DMA_INCR8 | GAHBCS_DMAEN; - } - #ifdef USE_OTG_MODE /* enable USB OTG features */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_dev.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_dev.c index 0d1272b4..ce53042e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_dev.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_dev.c @@ -3,10 +3,11 @@ \brief USB device mode low level driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -182,6 +183,8 @@ usb_status usb_transc0_active (usb_core_driver *udev, usb_transc *transc) { __IO uint32_t *reg_addr = NULL; + uint8_t enum_speed = udev->regs.dr->DSTAT & DSTAT_ES; + /* get the endpoint number */ uint8_t ep_num = transc->ep_addr.num; @@ -201,7 +204,7 @@ usb_status usb_transc0_active (usb_core_driver *udev, usb_transc *transc) *reg_addr &= ~(DEPCTL_MPL | DEPCTL_EPTYPE | DIEPCTL_TXFNUM); /* set endpoint 0 maximum packet length */ - *reg_addr |= EP0_MAXLEN[udev->regs.dr->DSTAT & DSTAT_ES]; + *reg_addr |= EP0_MAXLEN[enum_speed]; /* activate endpoint */ *reg_addr |= ((uint32_t)transc->ep_type << 18U) | ((uint32_t)ep_num << 22U) | DEPCTL_SD0PID | DEPCTL_EPACT; @@ -219,7 +222,8 @@ usb_status usb_transc0_active (usb_core_driver *udev, usb_transc *transc) usb_status usb_transc_active (usb_core_driver *udev, usb_transc *transc) { __IO uint32_t *reg_addr = NULL; - __IO uint32_t epinten = 0U; + uint32_t epinten = 0U; + uint8_t enum_speed = udev->regs.dr->DSTAT & DSTAT_ES; /* get the endpoint number */ uint8_t ep_num = transc->ep_addr.num; @@ -241,7 +245,7 @@ usb_status usb_transc_active (usb_core_driver *udev, usb_transc *transc) /* set endpoint maximum packet length */ if (0U == ep_num) { - *reg_addr |= EP0_MAXLEN[udev->regs.dr->DSTAT & DSTAT_ES]; + *reg_addr |= EP0_MAXLEN[enum_speed]; } else { *reg_addr |= transc->max_len; } @@ -338,10 +342,6 @@ usb_status usb_transc_inxfer (usb_core_driver *udev, usb_transc *transc) } } - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - udev->regs.er_in[ep_num]->DIEPDMAADDR = transc->dma_addr; - } - /* enable the endpoint and clear the NAK */ epctl |= DEPCTL_CNAK | DEPCTL_EPEN; @@ -399,10 +399,6 @@ usb_status usb_transc_outxfer (usb_core_driver *udev, usb_transc *transc) udev->regs.er_out[ep_num]->DOEPLEN = eplen; - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - udev->regs.er_out[ep_num]->DOEPDMAADDR = transc->dma_addr; - } - if (transc->ep_type == (uint8_t)USB_EPTYPE_ISOC) { if (transc->frame_num) { epctl |= DEPCTL_SD1PID; @@ -512,13 +508,6 @@ void usb_ctlep_startout (usb_core_driver *udev) { /* set OUT endpoint 0 receive length to 24 bytes, 1 packet and 3 setup packets */ udev->regs.er_out[0]->DOEPLEN = DOEP0_TLEN(8U * 3U) | DOEP0_PCNT(1U) | DOEP0_STPCNT(3U); - - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - udev->regs.er_out[0]->DOEPDMAADDR = (uint32_t)&udev->dev.control.req; - - /* endpoint enable */ - udev->regs.er_out[0]->DOEPCTL |= DEPCTL_EPACT | DEPCTL_EPEN; - } } /*! @@ -577,7 +566,7 @@ void usb_dev_suspend (usb_core_driver *udev) *udev->regs.PWRCLKCTL |= PWRCLKCTL_SHCLK; /* enter DEEP_SLEEP mode with LDO in low power mode */ - pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, WFI_CMD); + pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, PMU_LOWDRIVER_DISABLE, WFI_CMD); } } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_host.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_host.c index eca34b39..cdcd7e2a 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_host.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usb_host.c @@ -3,10 +3,11 @@ \brief USB host mode low level driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -36,7 +37,8 @@ OF SUCH DAMAGE. #include "drv_usb_core.h" #include "drv_usb_host.h" -const uint32_t PIPE_DPID[2] = { +const uint32_t PIPE_DPID[2] = +{ PIPE_DPID_DATA0, PIPE_DPID_DATA1 }; @@ -59,7 +61,7 @@ usb_status usb_host_init (usb_core_driver *pudev) /* support FS/LS only */ pudev->regs.hr->HCTL &= ~HCTL_SPDFSLS; - + usb_phyclock_config (pudev, HCTL_48MHZ); /* configure data FIFOs size */ #ifdef USB_FS_CORE if (USB_CORE_ENUM_FS == pudev->bp.core_enum) { @@ -200,10 +202,6 @@ usb_status usb_pipe_init (usb_core_driver *pudev, uint8_t pipe_num) /* clear old interrupt conditions for this host channel */ pudev->regs.pr[pipe_num]->HCHINTF = 0xFFFFFFFFU; - if (USB_USE_DMA == pudev->bp.transfer_mode) { - pp_inten |= HCHINTEN_DMAERIE; - } - if (pp->ep.dir) { pp_inten |= HCHINTEN_BBERIE; } @@ -303,10 +301,6 @@ usb_status usb_pipe_xfer (usb_core_driver *pudev, uint8_t pipe_num) /* initialize the host channel transfer information */ pudev->regs.pr[pipe_num]->HCHLEN = pp->xfer_len | pp->DPID | PIPE_XFER_PCNT(packet_count); - if (USB_USE_DMA == pudev->bp.transfer_mode) { - pudev->regs.pr[pipe_num]->HCHDMAADDR = (unsigned int)pp->xfer_buf; - } - pp_ctl = pudev->regs.pr[pipe_num]->HCHCTL; if (usb_frame_even(pudev)) { diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usbd_int.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usbd_int.c index 12c3f42a..25ff0a9d 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usbd_int.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usbd_int.c @@ -3,10 +3,11 @@ \brief USB device mode interrupt routines \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -45,7 +46,8 @@ static uint32_t usbd_int_enumfinish (usb_core_driver *udev); static uint32_t usbd_int_suspend (usb_core_driver *udev); static uint32_t usbd_emptytxfifo_write (usb_core_driver *udev, uint32_t ep_num); -static const uint8_t USB_SPEED[4] = { +static const uint8_t USB_SPEED[4] = +{ [DSTAT_EM_HS_PHY_30MHZ_60MHZ] = (uint8_t)USB_SPEED_HIGH, [DSTAT_EM_FS_PHY_30MHZ_60MHZ] = (uint8_t)USB_SPEED_FULL, [DSTAT_EM_FS_PHY_48MHZ] = (uint8_t)USB_SPEED_FULL, @@ -61,7 +63,8 @@ static const uint8_t USB_SPEED[4] = { void usbd_isr (usb_core_driver *udev) { if (HOST_MODE != (udev->regs.gr->GINTF & GINTF_COPM)) { - uint32_t intr = udev->regs.gr->GINTF & udev->regs.gr->GINTEN; + uint32_t intr = udev->regs.gr->GINTF; + intr &= udev->regs.gr->GINTEN; /* there are no interrupts, avoid spurious interrupt */ if (!intr) { @@ -177,21 +180,8 @@ static uint32_t usbd_int_epout (usb_core_driver *udev) /* clear the bit in DOEPINTF for this interrupt */ udev->regs.er_out[ep_num]->DOEPINTF = DOEPINTF_TF; - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - __IO uint32_t eplen = udev->regs.er_out[ep_num]->DOEPLEN; - - udev->dev.transc_out[ep_num].xfer_count = udev->dev.transc_out[ep_num].max_len - \ - (eplen & DEPLEN_TLEN); - } - /* inform upper layer: data ready */ (void)usbd_out_transc (udev, ep_num); - - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - if ((0U == ep_num) && ((uint8_t)USB_CTL_STATUS_OUT == udev->dev.control.ctl_state)) { - usb_ctlep_startout (udev); - } - } } /* setup phase finished interrupt (control endpoints) */ @@ -227,12 +217,6 @@ static uint32_t usbd_int_epin (usb_core_driver *udev) /* data transmission is completed */ (void)usbd_in_transc (udev, ep_num); - - if ((uint8_t)USB_USE_DMA == udev->bp.transfer_mode) { - if ((0U == ep_num) && ((uint8_t)USB_CTL_STATUS_IN == udev->dev.control.ctl_state)) { - usb_ctlep_startout (udev); - } - } } if (iepintr & DIEPINTF_TXFE) { @@ -432,7 +416,7 @@ static uint32_t usbd_int_suspend (usb_core_driver *udev) *udev->regs.PWRCLKCTL |= PWRCLKCTL_SUCLK | PWRCLKCTL_SHCLK; /* enter DEEP_SLEEP mode with LDO in low power mode */ - pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, WFI_CMD); + pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, PMU_LOWDRIVER_DISABLE, WFI_CMD); } /* clear interrupt */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usbh_int.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usbh_int.c index 90b8f8c1..8003dbc2 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usbh_int.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/driver/Source/drv_usbh_int.c @@ -3,10 +3,12 @@ \brief USB host mode interrupt handler file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2021-08-06, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -32,10 +34,7 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI OF SUCH DAMAGE. */ -#include "drv_usb_core.h" -#include "drv_usb_host.h" #include "drv_usbh_int.h" -#include "usbh_core.h" #if defined (__CC_ARM) /*!< ARM compiler */ #pragma O0 @@ -206,20 +205,22 @@ static uint32_t usbh_int_port (usb_core_driver *pudev) pudev->regs.hr->HFT = 48000U; if (HCTL_48MHZ != clock_type) { - usb_phyclock_config (pudev, HCTL_48MHZ); - } + if (USB_EMBEDDED_PHY == pudev->bp.phy_itf) { + usb_phyclock_config (pudev, HCTL_48MHZ); + } - port_reset = 1U; + port_reset = 1U; + } } else { /* for high speed device and others */ port_reset = 1U; } - usbh_int_fop->port_enabled(pudev->host.data); + pudev->host.port_enabled = 1; pudev->regs.gr->GINTEN |= GINTEN_DISCIE | GINTEN_SOFIE; } else { - usbh_int_fop->port_disabled(pudev->host.data); + pudev->host.port_enabled = 0; } } @@ -273,7 +274,8 @@ static uint32_t usbh_int_pipe_in (usb_core_driver *pudev, uint32_t pp_num) usb_pipe *pp = &pudev->host.pipe[pp_num]; - __IO uint32_t intr_pp = pp_reg->HCHINTF & pp_reg->HCHINTEN; + uint32_t intr_pp = pp_reg->HCHINTF; + intr_pp &= pp_reg->HCHINTEN; uint8_t ep_type = (uint8_t)((pp_reg->HCHCTL & HCHCTL_EPTYPE) >> 18U); @@ -297,10 +299,6 @@ static uint32_t usbh_int_pipe_in (usb_core_driver *pudev, uint32_t pp_num) if (intr_pp & HCHINTF_REQOVR) { usb_pp_halt (pudev, (uint8_t)pp_num, HCHINTF_REQOVR, PIPE_REQOVR); } else if (intr_pp & HCHINTF_TF) { - if ((uint8_t)USB_USE_DMA == pudev->bp.transfer_mode) { - pudev->host.backup_xfercount[pp_num] = pp->xfer_len - (pp_reg->HCHLEN & HCHLEN_TLEN); - } - pp->pp_status = PIPE_XF; pp->err_count = 0U; @@ -404,7 +402,8 @@ static uint32_t usbh_int_pipe_out (usb_core_driver *pudev, uint32_t pp_num) usb_pipe *pp = &pudev->host.pipe[pp_num]; - uint32_t intr_pp = pp_reg->HCHINTF & pp_reg->HCHINTEN; + uint32_t intr_pp = pp_reg->HCHINTF; + intr_pp &= pp_reg->HCHINTEN; if (intr_pp & HCHINTF_ACK) { if (URB_PING == pp->urb_state) { @@ -502,7 +501,7 @@ static uint32_t usbh_int_pipe_out (usb_core_driver *pudev, uint32_t pp_num) #endif /* __ICCARM */ static uint32_t usbh_int_rxfifonoempty (usb_core_driver *pudev) { - uint32_t count = 0U; + uint32_t count = 0U,xfer_count = 0U; __IO uint8_t pp_num = 0U; __IO uint32_t rx_stat = 0U; @@ -525,11 +524,13 @@ static uint32_t usbh_int_rxfifonoempty (usb_core_driver *pudev) pudev->host.pipe[pp_num].xfer_buf += count; pudev->host.pipe[pp_num].xfer_count += count; - pudev->host.backup_xfercount[pp_num] = pudev->host.pipe[pp_num].xfer_count; + xfer_count = pudev->host.pipe[pp_num].xfer_count; + + pudev->host.backup_xfercount[pp_num] = xfer_count; if (pudev->regs.pr[pp_num]->HCHLEN & HCHLEN_PCNT) { /* re-activate the channel when more packets are expected */ - __IO uint32_t pp_ctl = pudev->regs.pr[pp_num]->HCHCTL; + uint32_t pp_ctl = pudev->regs.pr[pp_num]->HCHCTL; pp_ctl |= HCHCTL_CEN; pp_ctl &= ~HCHCTL_CDIS; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_core.h index 064cad03..fbaacafe 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_core.h @@ -3,10 +3,11 @@ \brief header file for the usbh_hid_core.c \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -41,51 +42,13 @@ OF SUCH DAMAGE. #define HID_MIN_POLL 10U #define HID_REPORT_SIZE 16U -#define HID_MAX_USAGE 10U -#define HID_MAX_NBR_REPORT_FMT 10U #define HID_QUEUE_SIZE 10U -#define HID_ITEM_LONG 0xFEU - -#define HID_ITEM_TYPE_MAIN 0x00U -#define HID_ITEM_TYPE_GLOBAL 0x01U -#define HID_ITEM_TYPE_LOCAL 0x02U -#define HID_ITEM_TYPE_RESERVED 0x03U - -#define HID_MAIN_ITEM_TAG_INPUT 0x08U -#define HID_MAIN_ITEM_TAG_OUTPUT 0x09U -#define HID_MAIN_ITEM_TAG_COLLECTION 0x0AU -#define HID_MAIN_ITEM_TAG_FEATURE 0x0BU -#define HID_MAIN_ITEM_TAG_ENDCOLLECTION 0x0CU - -#define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0x00U -#define HID_GLOBAL_ITEM_TAG_LOG_MIN 0x01U -#define HID_GLOBAL_ITEM_TAG_LOG_MAX 0x02U -#define HID_GLOBAL_ITEM_TAG_PHY_MIN 0x03U -#define HID_GLOBAL_ITEM_TAG_PHY_MAX 0x04U -#define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 0x05U -#define HID_GLOBAL_ITEM_TAG_UNIT 0x06U -#define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 0x07U -#define HID_GLOBAL_ITEM_TAG_REPORT_ID 0x08U -#define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 0x09U -#define HID_GLOBAL_ITEM_TAG_PUSH 0x0AU -#define HID_GLOBAL_ITEM_TAG_POP 0x0BU - -#define HID_LOCAL_ITEM_TAG_USAGE 0x00U -#define HID_LOCAL_ITEM_TAG_USAGE_MIN 0x01U -#define HID_LOCAL_ITEM_TAG_USAGE_MAX 0x02U -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 0x03U -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MIN 0x04U -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAX 0x05U -#define HID_LOCAL_ITEM_TAG_STRING_INDEX 0x07U -#define HID_LOCAL_ITEM_TAG_STRING_MIN 0x08U -#define HID_LOCAL_ITEM_TAG_STRING_MAX 0x09U -#define HID_LOCAL_ITEM_TAG_DELIMITER 0x0AU - #define USB_HID_DESC_SIZE 9U /* states for HID state machine */ -typedef enum { +typedef enum +{ HID_INIT = 0U, HID_IDLE, HID_SEND_DATA, @@ -96,7 +59,8 @@ typedef enum { HID_ERROR, } hid_state; -typedef enum { +typedef enum +{ HID_REQ_INIT = 0U, HID_REQ_IDLE, HID_REQ_GET_REPORT_DESC, @@ -113,51 +77,6 @@ typedef enum HID_UNKNOWN = 0xFFU, } hid_type; -typedef struct _hid_report_data -{ - uint8_t ReportID; - uint8_t ReportType; - uint16_t UsagePage; - uint32_t Usage[HID_MAX_USAGE]; - uint32_t NbrUsage; - uint32_t UsageMin; - uint32_t UsageMax; - int32_t LogMin; - int32_t LogMax; - int32_t PhyMin; - int32_t PhyMax; - int32_t UnitExp; - uint32_t Unit; - uint32_t ReportSize; - uint32_t ReportCnt; - uint32_t Flag; - uint32_t PhyUsage; - uint32_t AppUsage; - uint32_t LogUsage; -} hid_report_data; - -typedef struct _hid_report_ID -{ - uint8_t size; /*!< report size return by the device ID */ - uint8_t reportID; /*!< report ID */ - uint8_t type; /*!< report type (INPUT/OUTPUT/FEATURE) */ -} hid_report_ID; - -typedef struct _hid_collection -{ - uint32_t usage; - uint8_t type; - struct _hid_collection *next_ptr; -} hid_collection; - -typedef struct _hid_appcollection -{ - uint32_t usage; - uint8_t type; - uint8_t nbr_report_fmt; - hid_report_data report_data[HID_MAX_NBR_REPORT_FMT]; -} hid_appcollection; - typedef struct { uint8_t *buf; @@ -175,21 +94,19 @@ typedef struct _hid_process uint8_t ep_addr; uint8_t ep_in; uint8_t ep_out; - __IO uint8_t data_ready; uint8_t *pdata; + __IO uint8_t data_ready; uint16_t len; uint16_t poll; __IO uint32_t timer; - - data_fifo fifo; usb_desc_hid hid_desc; - hid_report_data hid_report; hid_state state; hid_ctlstate ctl_state; + usbh_status (*init)(usb_core_driver *pudev, usbh_host *puhost); - void (*machine)(usb_core_driver *pudev, usbh_host *puhost); + usbh_status (*decode)(uint8_t *data); } usbh_hid_handler; extern usbh_class usbh_hid; @@ -202,11 +119,6 @@ usbh_status usbh_set_report (usb_core_driver *pudev, uint8_t report_ID, uint8_t report_len, uint8_t *report_buf); -/* read data from FIFO */ -uint16_t usbh_hid_fifo_read (data_fifo *fifo, void *buf, uint16_t nbytes); -/* write data to FIFO */ -uint16_t usbh_hid_fifo_write (data_fifo *fifo, void *buf, uint16_t nbytes); -/* initialize FIFO */ -void usbh_hid_fifo_init (data_fifo *fifo, uint8_t *buf, uint16_t size); + #endif /* __USBH_HID_CORE_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_keybd.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_keybd.h deleted file mode 100644 index 90dfc68b..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_keybd.h +++ /dev/null @@ -1,303 +0,0 @@ -/*! - \file usbh_hid_keybd.h - \brief header file for usbh_hid_keybd.c - - \version 2020-08-01, V3.0.0, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#ifndef __USBH_HID_KEYBD_H -#define __USBH_HID_KEYBD_H - -#include "usb_conf.h" -#include "usbh_hid_core.h" - -//#define AZERTY_KEYBOARD -#define QWERTY_KEYBOARD - -#define KBD_LEFT_CTRL 0x01U -#define KBD_LEFT_SHIFT 0x02U -#define KBD_LEFT_ALT 0x04U -#define KBD_LEFT_GUI 0x08U -#define KBD_RIGHT_CTRL 0x10U -#define KBD_RIGHT_SHIFT 0x20U -#define KBD_RIGHT_ALT 0x40U -#define KBD_RIGHT_GUI 0x80U - -#define KEY_NONE 0x00U -#define KEY_ERRORROLLOVER 0x01U -#define KEY_POSTFAIL 0x02U -#define KEY_ERRORUNDEFINED 0x03U -#define KEY_A 0x04U -#define KEY_B 0x05U -#define KEY_C 0x06U -#define KEY_D 0x07U -#define KEY_E 0x08U -#define KEY_F 0x09U -#define KEY_G 0x0AU -#define KEY_H 0x0BU -#define KEY_I 0x0CU -#define KEY_J 0x0DU -#define KEY_K 0x0EU -#define KEY_L 0x0FU -#define KEY_M 0x10U -#define KEY_N 0x11U -#define KEY_O 0x12U -#define KEY_P 0x13U -#define KEY_Q 0x14U -#define KEY_R 0x15U -#define KEY_S 0x16U -#define KEY_T 0x17U -#define KEY_U 0x18U -#define KEY_V 0x19U -#define KEY_W 0x1AU -#define KEY_X 0x1BU -#define KEY_Y 0x1CU -#define KEY_Z 0x1DU -#define KEY_1_EXCLAMATION_MARK 0x1EU -#define KEY_2_AT 0x1FU -#define KEY_3_NUMBER_SIGN 0x20U -#define KEY_4_DOLLAR 0x21U -#define KEY_5_PERCENT 0x22U -#define KEY_6_CARET 0x23U -#define KEY_7_AMPERSAND 0x24U -#define KEY_8_ASTERISK 0x25U -#define KEY_9_OPARENTHESIS 0x26U -#define KEY_0_CPARENTHESIS 0x27U -#define KEY_ENTER 0x28U -#define KEY_ESCAPE 0x29U -#define KEY_BACKSPACE 0x2AU -#define KEY_TAB 0x2BU -#define KEY_SPACEBAR 0x2CU -#define KEY_MINUS_UNDERSCORE 0x2DU -#define KEY_EQUAL_PLUS 0x2EU -#define KEY_OBRACKET_AND_OBRACE 0x2FU -#define KEY_CBRACKET_AND_CBRACE 0x30U -#define KEY_BACKSLASH_VERTICAL_BAR 0x31U -#define KEY_NONUS_NUMBER_SIGN_TILDE 0x32U -#define KEY_SEMICOLON_COLON 0x33U -#define KEY_SINGLE_AND_DOUBLE_QUOTE 0x34U -#define KEY_GRAVE ACCENT AND TILDE 0x35U -#define KEY_COMMA_AND_LESS 0x36U -#define KEY_DOT_GREATER 0x37U -#define KEY_SLASH_QUESTION 0x38U -#define KEY_CAPS LOCK 0x39U -#define KEY_F1 0x3AU -#define KEY_F2 0x3BU -#define KEY_F3 0x3CU -#define KEY_F4 0x3DU -#define KEY_F5 0x3EU -#define KEY_F6 0x3FU -#define KEY_F7 0x40U -#define KEY_F8 0x41U -#define KEY_F9 0x42U -#define KEY_F10 0x43U -#define KEY_F11 0x44U -#define KEY_F12 0x45U -#define KEY_PRINTSCREEN 0x46U -#define KEY_SCROLL LOCK 0x47U -#define KEY_PAUSE 0x48U -#define KEY_INSERT 0x49U -#define KEY_HOME 0x4AU -#define KEY_PAGEUP 0x4BU -#define KEY_DELETE 0x4CU -#define KEY_END1 0x4DU -#define KEY_PAGEDOWN 0x4EU -#define KEY_RIGHTARROW 0x4FU -#define KEY_LEFTARROW 0x50U -#define KEY_DOWNARROW 0x51U -#define KEY_UPARROW 0x52U -#define KEY_KEYPAD_NUM_LOCK_AND_CLEAR 0x53U -#define KEY_KEYPAD_SLASH 0x54U -#define KEY_KEYPAD_ASTERIKS 0x55U -#define KEY_KEYPAD_MINUS 0x56U -#define KEY_KEYPAD_PLUS 0x57U -#define KEY_KEYPAD_ENTER 0x58U -#define KEY_KEYPAD_1_END 0x59U -#define KEY_KEYPAD_2_DOWN_ARROW 0x5AU -#define KEY_KEYPAD_3_PAGEDN 0x5BU -#define KEY_KEYPAD_4_LEFT_ARROW 0x5CU -#define KEY_KEYPAD_5 0x5DU -#define KEY_KEYPAD_6_RIGHT_ARROW 0x5EU -#define KEY_KEYPAD_7_HOME 0x5FU -#define KEY_KEYPAD_8_UP_ARROW 0x60U -#define KEY_KEYPAD_9_PAGEUP 0x61U -#define KEY_KEYPAD_0_INSERT 0x62U -#define KEY_KEYPAD_DECIMAL_SEPARATOR_DELETE 0x63U -#define KEY_NONUS_BACK_SLASH_VERTICAL_BAR 0x64U -#define KEY_APPLICATION 0x65U -#define KEY_POWER 0x66U -#define KEY_KEYPAD_EQUAL 0x67U -#define KEY_F13 0x68U -#define KEY_F14 0x69U -#define KEY_F15 0x6AU -#define KEY_F16 0x6BU -#define KEY_F17 0x6CU -#define KEY_F18 0x6DU -#define KEY_F19 0x6EU -#define KEY_F20 0x6FU -#define KEY_F21 0x70U -#define KEY_F22 0x71U -#define KEY_F23 0x72U -#define KEY_F24 0x73U -#define KEY_EXECUTE 0x74U -#define KEY_HELP 0x75U -#define KEY_MENU 0x76U -#define KEY_SELECT 0x77U -#define KEY_STOP 0x78U -#define KEY_AGAIN 0x79U -#define KEY_UNDO 0x7AU -#define KEY_CUT 0x7BU -#define KEY_COPY 0x7CU -#define KEY_PASTE 0x7DU -#define KEY_FIND 0x7EU -#define KEY_MUTE 0x7FU -#define KEY_VOLUME_UP 0x80U -#define KEY_VOLUME_DOWN 0x81U -#define KEY_LOCKING_CAPS_LOCK 0x82U -#define KEY_LOCKING_NUM_LOCK 0x83U -#define KEY_LOCKING_SCROLL_LOCK 0x84U -#define KEY_KEYPAD_COMMA 0x85U -#define KEY_KEYPAD_EQUAL_SIGN 0x86U -#define KEY_INTERNATIONAL1 0x87U -#define KEY_INTERNATIONAL2 0x88U -#define KEY_INTERNATIONAL3 0x89U -#define KEY_INTERNATIONAL4 0x8AU -#define KEY_INTERNATIONAL5 0x8BU -#define KEY_INTERNATIONAL6 0x8CU -#define KEY_INTERNATIONAL7 0x8DU -#define KEY_INTERNATIONAL8 0x8EU -#define KEY_INTERNATIONAL9 0x8FU -#define KEY_LANG1 0x90U -#define KEY_LANG2 0x91U -#define KEY_LANG3 0x92U -#define KEY_LANG4 0x93U -#define KEY_LANG5 0x94U -#define KEY_LANG6 0x95U -#define KEY_LANG7 0x96U -#define KEY_LANG8 0x97U -#define KEY_LANG9 0x98U -#define KEY_ALTERNATE_ERASE 0x99U -#define KEY_SYSREQ 0x9AU -#define KEY_CANCEL 0x9BU -#define KEY_CLEAR 0x9CU -#define KEY_PRIOR 0x9DU -#define KEY_RETURN 0x9EU -#define KEY_SEPARATOR 0x9FU -#define KEY_OUT 0xA0U -#define KEY_OPER 0xA1U -#define KEY_CLEAR_AGAIN 0xA2U -#define KEY_CRSEL 0xA3U -#define KEY_EXSEL 0xA4U -#define KEY_KEYPAD_00 0xB0U -#define KEY_KEYPAD_000 0xB1U -#define KEY_THOUSANDS_SEPARATOR 0xB2U -#define KEY_DECIMAL_SEPARATOR 0xB3U -#define KEY_CURRENCY_UNIT 0xB4U -#define KEY_CURRENCY_SUB_UNIT 0xB5U -#define KEY_KEYPAD_OPARENTHESIS 0xB6U -#define KEY_KEYPAD_CPARENTHESIS 0xB7U -#define KEY_KEYPAD_OBRACE 0xB8U -#define KEY_KEYPAD_CBRACE 0xB9U -#define KEY_KEYPAD_TAB 0xBAU -#define KEY_KEYPAD_BACKSPACE 0xBBU -#define KEY_KEYPAD_A 0xBCU -#define KEY_KEYPAD_B 0xBDU -#define KEY_KEYPAD_C 0xBEU -#define KEY_KEYPAD_D 0xBFU -#define KEY_KEYPAD_E 0xC0U -#define KEY_KEYPAD_F 0xC1U -#define KEY_KEYPAD_XOR 0xC2U -#define KEY_KEYPAD_CARET 0xC3U -#define KEY_KEYPAD_PERCENT 0xC4U -#define KEY_KEYPAD_LESS 0xC5U -#define KEY_KEYPAD_GREATER 0xC6U -#define KEY_KEYPAD_AMPERSAND 0xC7U -#define KEY_KEYPAD_LOGICAL_AND 0xC8U -#define KEY_KEYPAD_VERTICAL_BAR 0xC9U -#define KEY_KEYPAD_LOGIACL_OR 0xCAU -#define KEY_KEYPAD_COLON 0xCBU -#define KEY_KEYPAD_NUMBER_SIGN 0xCCU -#define KEY_KEYPAD_SPACE 0xCDU -#define KEY_KEYPAD_AT 0xCEU -#define KEY_KEYPAD_EXCLAMATION_MARK 0xCFU -#define KEY_KEYPAD_MEMORY_STORE 0xD0U -#define KEY_KEYPAD_MEMORY_RECALL 0xD1U -#define KEY_KEYPAD_MEMORY_CLEAR 0xD2U -#define KEY_KEYPAD_MEMORY_ADD 0xD3U -#define KEY_KEYPAD_MEMORY_SUBTRACT 0xD4U -#define KEY_KEYPAD_MEMORY_MULTIPLY 0xD5U -#define KEY_KEYPAD_MEMORY_DIVIDE 0xD6U -#define KEY_KEYPAD_PLUSMINUS 0xD7U -#define KEY_KEYPAD_CLEAR 0xD8U -#define KEY_KEYPAD_CLEAR_ENTRY 0xD9U -#define KEY_KEYPAD_BINARY 0xDAU -#define KEY_KEYPAD_OCTAL 0xDBU -#define KEY_KEYPAD_DECIMAL 0xDCU -#define KEY_KEYPAD_HEXADECIMAL 0xDDU -#define KEY_LEFTCONTROL 0xE0U -#define KEY_LEFTSHIFT 0xE1U -#define KEY_LEFTALT 0xE2U -#define KEY_LEFT_GUI 0xE3U -#define KEY_RIGHTCONTROL 0xE4U -#define KEY_RIGHTSHIFT 0xE5U -#define KEY_RIGHTALT 0xE6U -#define KEY_RIGHT_GUI 0xE7U - -#define KBR_MAX_NBR_PRESSED 6U - -typedef struct -{ - uint8_t state; - uint8_t lctrl; - uint8_t lshift; - uint8_t lalt; - uint8_t lgui; - uint8_t rctrl; - uint8_t rshift; - uint8_t ralt; - uint8_t rgui; - uint8_t keys[6]; -} hid_keybd_info; - -/* function declarations */ -/* initialize keyboard */ -void USR_KEYBRD_Init (void); -/* process keyboard data */ -void USR_KEYBRD_ProcessData (uint8_t pbuf); -/* initialize the keyboard function */ -usbh_status usbh_hid_keybd_init (usb_core_driver *pudev, usbh_host *puhost); -/* get keyboard information */ -hid_keybd_info *usbh_hid_keybd_info_get (usb_core_driver *pudev, usbh_host *puhost); -/* get the ascii code of hid */ -uint8_t usbh_hid_ascii_code_get (hid_keybd_info *info); -/* keyboard machine */ -void usbh_hid_keybrd_machine (usb_core_driver *pudev, usbh_host *puhost); - -#endif /* __USBH_HID_KEYBD_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_mouse.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_mouse.h deleted file mode 100644 index b897f7ab..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_mouse.h +++ /dev/null @@ -1,59 +0,0 @@ -/*! - \file usbh_hid_mouse.h - \brief header file for the usbh_hid_mouse.c - - \version 2020-08-01, V3.0.0, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#ifndef __USBH_HID_MOUSE_H -#define __USBH_HID_MOUSE_H - -#include "usbh_hid_core.h" - -typedef struct _hid_mouse_info -{ - uint8_t x; - uint8_t y; - uint8_t buttons[3]; -} hid_mouse_info; - -/* function declarations */ -/* initialize mouse */ -void USR_MOUSE_Init (void); -/* process mouse data */ -void USR_MOUSE_ProcessData (hid_mouse_info *data); -/* initialize mouse function */ -usbh_status usbh_hid_mouse_init (usb_core_driver *pudev, usbh_host *puhost); -/* get mouse information */ -hid_mouse_info *usbh_hid_mouse_info_get (usb_core_driver *pudev, usbh_host *puhost); -/* mouse machine */ -void usbh_hid_mouse_machine (usb_core_driver *pudev, usbh_host *puhost); - -#endif /* __USBH_HID_MOUSE_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_parser.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_parser.h deleted file mode 100644 index acc6acb7..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_parser.h +++ /dev/null @@ -1,61 +0,0 @@ -/*! - \file usbh_hid_core.h - \brief header file for the usbh_hid_core.c - - \version 2020-08-01, V3.0.0, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#ifndef __USBH_HID_PARSER_H -#define __USBH_HID_PARSER_H - -#include "usbh_hid_core.h" -#include "usbh_hid_usage.h" - -typedef struct -{ - uint8_t *data; - uint32_t size; - uint8_t shift; - uint8_t count; - uint8_t sign; - uint32_t logical_min; /*min value device can return*/ - uint32_t logical_max; /*max value device can return*/ - uint32_t physical_min; /*min vale read can report*/ - uint32_t physical_max; /*max value read can report*/ - uint32_t resolution; -} hid_report_item; - -/* function declarations */ -/* read a hid report item */ -uint32_t hid_item_read (hid_report_item *ri, uint8_t ndx); -/* write a hid report item */ -uint32_t hid_item_write (hid_report_item *ri, uint32_t value, uint8_t ndx); - -#endif /* __USBH_HID_PARSER_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_usage.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_usage.h deleted file mode 100644 index e1d00f5f..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_hid_usage.h +++ /dev/null @@ -1,141 +0,0 @@ -/*! - \file usbh_hid_core.h - \brief header file for the usbh_hid_core.c - - \version 2020-08-01, V3.0.0, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#ifndef __USDH_HID_USAGE_H -#define __USDH_HID_USAGE_H - -/* HID 1.11 usage pages */ -#define HID_USAGE_PAGE_UNDEFINED uint16_t (0x00) /* Undefined */ - -/* top level pages */ -#define HID_USAGE_PAGE_GEN_DES uint16_t (0x01) /* Generic Desktop Controls*/ -#define HID_USAGE_PAGE_SIM_CTR uint16_t (0x02) /* Simulation Controls */ -#define HID_USAGE_PAGE_VR_CTR uint16_t (0x03) /* VR Controls */ -#define HID_USAGE_PAGE_SPORT_CTR uint16_t (0x04) /* Sport Controls */ -#define HID_USAGE_PAGE_GAME_CTR uint16_t (0x05) /* Game Controls */ -#define HID_USAGE_PAGE_GEN_DEV uint16_t (0x06) /* Generic Device Controls */ -#define HID_USAGE_PAGE_KEYB uint16_t (0x07) /* Keyboard/Keypad */ -#define HID_USAGE_PAGE_LED uint16_t (0x08) /* LEDs */ -#define HID_USAGE_PAGE_BUTTON uint16_t (0x09) /* Button */ -#define HID_USAGE_PAGE_ORDINAL uint16_t (0x0A) /* Ordinal */ -#define HID_USAGE_PAGE_PHONE uint16_t (0x0B) /* Telephony */ -#define HID_USAGE_PAGE_CONSUMER uint16_t (0x0C) /* Consumer */ -#define HID_USAGE_PAGE_DIGITIZER uint16_t (0x0D) /* Digitizer*/ -#define HID_USAGE_PAGE_PID uint16_t (0x0F) /* PID Page (force feedback and related devices) */ -#define HID_USAGE_PAGE_UNICODE uint16_t (0x10) /* Unicode */ -#define HID_USAGE_PAGE_ALNUM_DISP uint16_t (0x14) /* Alphanumeric Display */ -/* end of top level pages */ - -#define HID_USAGE_PAGE_MEDICAL uint16_t (0x40) /* Medical Instruments */ - -/* 80-83 Monitor pages USB Device Class Definition for Monitor Devices */ -/* 84-87 Power pages USB Device Class Definition for Power Devices */ -#define HID_USAGE_PAGE_BARCODE uint16_t (0x8C) /* Bar Code Scanner page */ -#define HID_USAGE_PAGE_SCALE uint16_t (0x8D) /* Scale page */ -#define HID_USAGE_PAGE_MSR uint16_t (0x8E) /* Magnetic Stripe Reading (MSR) Devices */ -#define HID_USAGE_PAGE_POS uint16_t (0x8F) /* Reserved Point of Sale pages */ -#define HID_USAGE_PAGE_CAMERA_CTR uint16_t (0x90) /* Camera Control Page */ -#define HID_USAGE_PAGE_ARCADE uint16_t (0x91) /* Arcade Page */ - -/* usage definitions for the "generic desktop" page */ -#define HID_USAGE_UNDEFINED uint16_t (0x00) /* Undefined */ -#define HID_USAGE_POINTER uint16_t (0x01) /* Pointer (Physical Collection) */ -#define HID_USAGE_MOUSE uint16_t (0x02) /* Mouse (Application Collection) */ -#define HID_USAGE_JOYSTICK uint16_t (0x04) /* Joystick (Application Collection) */ -#define HID_USAGE_GAMEPAD uint16_t (0x05) /* Game Pad (Application Collection) */ -#define HID_USAGE_KBD uint16_t (0x06) /* Keyboard (Application Collection) */ -#define HID_USAGE_KEYPAD uint16_t (0x07) /* Keypad (Application Collection) */ -#define HID_USAGE_MAX_CTR uint16_t (0x08) /* Multi-axis Controller (Application Collection) */ -#define HID_USAGE_X uint16_t (0x30) /* X (Dynamic Value) */ -#define HID_USAGE_Y uint16_t (0x31) /* Y (Dynamic Value) */ -#define HID_USAGE_Z uint16_t (0x32) /* Z (Dynamic Value) */ -#define HID_USAGE_RX uint16_t (0x33) /* Rx (Dynamic Value) */ -#define HID_USAGE_RY uint16_t (0x34) /* Ry (Dynamic Value) */ -#define HID_USAGE_RZ uint16_t (0x35) /* Rz (Dynamic Value) */ -#define HID_USAGE_SLIDER uint16_t (0x36) /* Slider (Dynamic Value) */ -#define HID_USAGE_DIAL uint16_t (0x37) /* Dial (Dynamic Value) */ -#define HID_USAGE_WHEEL uint16_t (0x38) /* Wheel (Dynamic Value) */ -#define HID_USAGE_HATSW uint16_t (0x39) /* Hat switch (Dynamic Value) */ -#define HID_USAGE_COUNTEDBUF uint16_t (0x3A) /* Counted Buffer (Logical Collection) */ -#define HID_USAGE_BYTECOUNT uint16_t (0x3B) /* Byte Count (Dynamic Value) */ -#define HID_USAGE_MOTIONWAKE uint16_t (0x3C) /* Motion Wakeup (One Shot Control) */ -#define HID_USAGE_START uint16_t (0x3D) /* Start (On/Off Control) */ -#define HID_USAGE_SELECT uint16_t (0x3E) /* Select (On/Off Control) */ -#define HID_USAGE_VX uint16_t (0x40) /* Vx (Dynamic Value) */ -#define HID_USAGE_VY uint16_t (0x41) /* Vy (Dynamic Value) */ -#define HID_USAGE_VZ uint16_t (0x42) /* Vz (Dynamic Value) */ -#define HID_USAGE_VBRX uint16_t (0x43) /* Vbrx (Dynamic Value) */ -#define HID_USAGE_VBRY uint16_t (0x44) /* Vbry (Dynamic Value) */ -#define HID_USAGE_VBRZ uint16_t (0x45) /* Vbrz (Dynamic Value) */ -#define HID_USAGE_VNO uint16_t (0x46) /* Vno (Dynamic Value) */ -#define HID_USAGE_FEATNOTIF uint16_t (0x47) /* Feature Notification (Dynamic Value),(Dynamic Flag) */ -#define HID_USAGE_SYSCTL uint16_t (0x80) /* System Control (Application Collection) */ -#define HID_USAGE_PWDOWN uint16_t (0x81) /* System Power Down (One Shot Control) */ -#define HID_USAGE_SLEEP uint16_t (0x82) /* System Sleep (One Shot Control) */ -#define HID_USAGE_WAKEUP uint16_t (0x83) /* System Wake Up (One Shot Control) */ -#define HID_USAGE_CONTEXTM uint16_t (0x84) /* System Context Menu (One Shot Control) */ -#define HID_USAGE_MAINM uint16_t (0x85) /* System Main Menu (One Shot Control) */ -#define HID_USAGE_APPM uint16_t (0x86) /* System App Menu (One Shot Control) */ -#define HID_USAGE_MENUHELP uint16_t (0x87) /* System Menu Help (One Shot Control) */ -#define HID_USAGE_MENUEXIT uint16_t (0x88) /* System Menu Exit (One Shot Control) */ -#define HID_USAGE_MENUSELECT uint16_t (0x89) /* System Menu Select (One Shot Control) */ -#define HID_USAGE_SYSM_RIGHT uint16_t (0x8A) /* System Menu Right (Re-Trigger Control) */ -#define HID_USAGE_SYSM_LEFT uint16_t (0x8B) /* System Menu Left (Re-Trigger Control) */ -#define HID_USAGE_SYSM_UP uint16_t (0x8C) /* System Menu Up (Re-Trigger Control) */ -#define HID_USAGE_SYSM_DOWN uint16_t (0x8D) /* System Menu Down (Re-Trigger Control) */ -#define HID_USAGE_COLDRESET uint16_t (0x8E) /* System Cold Restart (One Shot Control) */ -#define HID_USAGE_WARMRESET uint16_t (0x8F) /* System Warm Restart (One Shot Control) */ -#define HID_USAGE_DUP uint16_t (0x90) /* D-pad Up (On/Off Control) */ -#define HID_USAGE_DDOWN uint16_t (0x91) /* D-pad Down (On/Off Control) */ -#define HID_USAGE_DRIGHT uint16_t (0x92) /* D-pad Right (On/Off Control) */ -#define HID_USAGE_DLEFT uint16_t (0x93) /* D-pad Left (On/Off Control) */ -#define HID_USAGE_SYS_DOCK uint16_t (0xA0) /* System Dock (One Shot Control) */ -#define HID_USAGE_SYS_UNDOCK uint16_t (0xA1) /* System Undock (One Shot Control) */ -#define HID_USAGE_SYS_SETUP uint16_t (0xA2) /* System Setup (One Shot Control) */ -#define HID_USAGE_SYS_BREAK uint16_t (0xA3) /* System Break (One Shot Control) */ -#define HID_USAGE_SYS_DBGBRK uint16_t (0xA4) /* System Debugger Break (One Shot Control) */ -#define HID_USAGE_APP_BRK uint16_t (0xA5) /* Application Break (One Shot Control) */ -#define HID_USAGE_APP_DBGBRK uint16_t (0xA6) /* Application Debugger Break (One Shot Control) */ -#define HID_USAGE_SYS_SPKMUTE uint16_t (0xA7) /* System Speaker Mute (One Shot Control) */ -#define HID_USAGE_SYS_HIBERN uint16_t (0xA8) /* System Hibernate (One Shot Control) */ -#define HID_USAGE_SYS_SIDPINV uint16_t (0xB0) /* System Display Invert (One Shot Control) */ -#define HID_USAGE_SYS_DISPINT uint16_t (0xB1) /* System Display Internal (One Shot Control) */ -#define HID_USAGE_SYS_DISPEXT uint16_t (0xB2) /* System Display External (One Shot Control) */ -#define HID_USAGE_SYS_DISPBOTH uint16_t (0xB3) /* System Display Both (One Shot Control) */ -#define HID_USAGE_SYS_DISPDUAL uint16_t (0xB4) /* System Display Dual (One Shot Control) */ -#define HID_USAGE_SYS_DISPTGLIE uint16_t (0xB5) /* System Display Toggle Int/Ext (One Shot Control) */ -#define HID_USAGE_SYS_DISP_SWAP uint16_t (0xB6) /* System Display Swap Primary/Secondary (One Shot Control) */ -#define HID_USAGE_SYS_DIPS_LCDA uint16_t (0xB7) /* System Display LCD Autoscale (One Shot Control) */ - -#endif /* __USDH_HID_USAGE_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_standard_hid.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_standard_hid.h new file mode 100644 index 00000000..ec5cc1dc --- /dev/null +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Include/usbh_standard_hid.h @@ -0,0 +1,100 @@ +/*! + \file usbh_standard_hid.h + \brief header file for usbh_standard_hid.c + + \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x +*/ + +/* + Copyright (c) 2022, GigaDevice Semiconductor Inc. + + Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY +OF SUCH DAMAGE. +*/ + +#ifndef __USBH_STANDARD_HID_H +#define __USBH_STANDARD_HID_H + +#include "usb_conf.h" +#include "usbh_hid_core.h" + +//#define AZERTY_KEYBOARD +#define QWERTY_KEYBOARD + +#define MOUSE_BUTTON_1 0x01U +#define MOUSE_BUTTON_2 0x02U +#define MOUSE_BUTTON_3 0x04U + +#define KBD_LEFT_CTRL 0x01U +#define KBD_LEFT_SHIFT 0x02U +#define KBD_LEFT_ALT 0x04U +#define KBD_LEFT_GUI 0x08U +#define KBD_RIGHT_CTRL 0x10U +#define KBD_RIGHT_SHIFT 0x20U +#define KBD_RIGHT_ALT 0x40U +#define KBD_RIGHT_GUI 0x80U + +#define KBD_PRESSED_MAX_NUM 6U + +typedef struct _hid_mouse_info +{ + uint8_t x; + uint8_t y; + uint8_t buttons[3]; +} hid_mouse_info; + +typedef struct +{ + uint8_t state; + uint8_t lctrl; + uint8_t lshift; + uint8_t lalt; + uint8_t lgui; + uint8_t rctrl; + uint8_t rshift; + uint8_t ralt; + uint8_t rgui; + uint8_t keys[6]; +} hid_keybd_info; + +/* function declarations */ +/* initialize mouse */ +void usr_mouse_init (void); +/* process mouse data */ +void usr_mouse_process_data (hid_mouse_info *data); +/* initialize mouse function */ +usbh_status usbh_hid_mouse_init (usb_core_driver *udev, usbh_host *uhost); +/* decode mouse information */ +usbh_status usbh_hid_mouse_decode(uint8_t *data); + +/* initialize keyboard */ +void usr_keyboard_init (void); +/* process keyboard data */ +void usr_keybrd_process_data (uint8_t pbuf); +/* initialize the keyboard function */ +usbh_status usbh_hid_keybd_init (usb_core_driver *udev, usbh_host *uhost); +/* decode keyboard information */ +usbh_status usbh_hid_keybrd_decode (uint8_t *data); + +#endif /* __USBH_STANDARD_HID_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_core.c index b444d2ad..0f5d4538 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_core.c @@ -3,10 +3,11 @@ \brief USB host HID class driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -34,8 +35,7 @@ OF SUCH DAMAGE. #include "usbh_pipe.h" #include "usbh_hid_core.h" -#include "usbh_hid_mouse.h" -#include "usbh_hid_keybd.h" +#include "usbh_standard_hid.h" #include #include @@ -200,7 +200,7 @@ uint8_t usbh_hid_poll_interval_get (usb_core_driver *pudev, usbh_host *puhost) if ((HOST_CLASS_ENUM == puhost->cur_state) || (HOST_USER_INPUT == puhost->cur_state) || - (HOST_CHECK_CLASS == puhost->cur_state) || + (HOST_CLASS_CHECK == puhost->cur_state) || (HOST_CLASS_HANDLER == puhost->cur_state)) { return (uint8_t)(hid->poll); } else { @@ -208,98 +208,6 @@ uint8_t usbh_hid_poll_interval_get (usb_core_driver *pudev, usbh_host *puhost) } } -/*! - \brief read from FIFO - \param[in] fifo: fifo address - \param[in] buf: read buffer - \param[in] nbytes: number of item to read - \param[out] none - \retval number of read items -*/ -uint16_t usbh_hid_fifo_read (data_fifo *fifo, void *buf, uint16_t nbytes) -{ - uint16_t i = 0U; - uint8_t *p = (uint8_t*) buf; - - if (0U == fifo->lock) { - fifo->lock = 1U; - - for (i = 0U; i < nbytes; i++) { - if (fifo->tail != fifo->head) { - *p++ = fifo->buf[fifo->tail]; - fifo->tail++; - - if (fifo->tail == fifo->size) { - fifo->tail = 0U; - } - } else { - fifo->lock = 0U; - - return i; - } - } - } - - fifo->lock = 0U; - - return nbytes; -} - -/*! - \brief write to FIFO - \param[in] fifo: fifo address - \param[in] buf: read buffer - \param[in] nbytes: number of item to read - \param[out] none - \retval number of write items -*/ -uint16_t usbh_hid_fifo_write (data_fifo *fifo, void *buf, uint16_t nbytes) -{ - uint16_t i = 0U; - uint8_t *p = (uint8_t*) buf; - - if (0U == fifo->lock) { - fifo->lock = 1U; - - for (i = 0U; i < nbytes; i++) { - if ((fifo->head + 1U == fifo->tail) || - ((fifo->head + 1U == fifo->size) && (0U == fifo->tail))) { - fifo->lock = 0U; - - return i; - } else { - fifo->buf[fifo->head] = *p++; - fifo->head++; - - if (fifo->head == fifo->size) { - fifo->head = 0U; - } - } - } - } - - fifo->lock = 0U; - - return nbytes; -} - -/*! - \brief initialize FIFO - \param[in] fifo: fifo address - \param[in] buf: read buffer - \param[in] size: size of FIFO - \param[out] none - \retval none -*/ -void usbh_hid_fifo_init (data_fifo *fifo, uint8_t *buf, uint16_t size) -{ - fifo->head = 0U; - fifo->tail = 0U; - fifo->lock = 0U; - fifo->size = size; - fifo->buf = buf; -} - /*! \brief initialize the hid class \param[in] puhost: pointer to usb host @@ -329,10 +237,10 @@ static usbh_status usbh_hid_itf_init (usbh_host *puhost) uint8_t itf_protocol = puhost->dev_prop.cfg_desc_set.itf_desc_set[puhost->dev_prop.cur_itf][0].itf_desc.bInterfaceProtocol; if (USB_HID_PROTOCOL_KEYBOARD == itf_protocol) { hid_handler.init = usbh_hid_keybd_init; - hid_handler.machine = usbh_hid_keybrd_machine; + hid_handler.decode = usbh_hid_keybrd_decode; } else if (USB_HID_PROTOCOL_MOUSE == itf_protocol) { hid_handler.init = usbh_hid_mouse_init; - hid_handler.machine = usbh_hid_mouse_machine; + hid_handler.decode = usbh_hid_mouse_decode; } else { status = USBH_FAIL; } @@ -479,7 +387,6 @@ static usbh_status usbh_hid_handle (usbh_host *puhost) break; case HID_SYNC: - /* sync with start of even frame */ if (true == usb_frame_even(puhost->data)) { hid->state = HID_GET_DATA; } @@ -495,17 +402,14 @@ static usbh_status usbh_hid_handle (usbh_host *puhost) case HID_POLL: if (URB_DONE == usbh_urbstate_get (puhost->data, hid->pipe_in)) { - if (0U == hid->data_ready) { /* handle data once */ - usbh_hid_fifo_write(&hid->fifo, hid->pdata, hid->len); + if (0U == hid->data_ready) { hid->data_ready = 1U; - hid->machine(puhost->data, puhost); + hid->decode(hid->pdata); } } else { - if (URB_STALL == usbh_urbstate_get (puhost->data, hid->pipe_in)) { /* IN endpoint stalled */ - /* issue clear feature on interrupt in endpoint */ + if (URB_STALL == usbh_urbstate_get (puhost->data, hid->pipe_in)) { if (USBH_OK == (usbh_clrfeature (puhost, hid->ep_addr, hid->pipe_in))) { - /* change state to issue next in token */ hid->state = HID_GET_DATA; } } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_mouse.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_mouse.c deleted file mode 100644 index 8413fd02..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_mouse.c +++ /dev/null @@ -1,216 +0,0 @@ -/*! - \file usbh_hid_mouse.c - \brief USB host HID mouse driver - - \version 2020-08-01, V3.0.0, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#include "usbh_hid_mouse.h" -#include "usbh_hid_parser.h" - -hid_mouse_info mouse_info; -uint32_t mouse_report_data[1]; - -/* structures defining how to access items in a hid mouse report */ -/* access button 1 state. */ -static const hid_report_item prop_b1 = -{ - (uint8_t *)(void *)mouse_report_data + 0, /* data */ - 1, /* size */ - 0, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed? */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min value device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -/* access button 2 state. */ -static const hid_report_item prop_b2 = -{ - (uint8_t *)(void *)mouse_report_data + 0, /* data */ - 1, /* size */ - 1, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed? */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min value device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -/* access button 3 state. */ -static const hid_report_item prop_b3 = -{ - (uint8_t *)(void *)mouse_report_data + 0, /* data */ - 1, /* size */ - 2, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed? */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -/* access x coordinate change. */ -static const hid_report_item prop_x = -{ - (uint8_t *)(void *)mouse_report_data + 1, /* data */ - 8, /* size */ - 0, /* shift */ - 0, /* count (only for array items) */ - 1, /* signed? */ - 0, /* min value read can return */ - 0xFFFF,/* max value read can return */ - 0, /* min vale device can report */ - 0xFFFF,/* max value device can report */ - 1 /* resolution */ -}; - -/* access y coordinate change. */ -static const hid_report_item prop_y = -{ - (uint8_t *)(void *)mouse_report_data + 2, /* data */ - 8, /* size */ - 0, /* shift */ - 0, /* count (only for array items) */ - 1, /* signed? */ - 0, /* min value read can return */ - 0xFFFF,/* max value read can return */ - 0, /* min vale device can report */ - 0xFFFF,/* max value device can report */ - 1 /* resolution */ -}; - -/* local function prototypes ('static') */ -static usbh_status usbh_hid_mouse_decode(usb_core_driver *pudev, usbh_host *puhost); - -/*! - \brief initialize the mouse function - \param[in] pudev: pointer to usb core instance - \param[in] puhost: pointer to usb host - \param[out] none - \retval none -*/ -usbh_status usbh_hid_mouse_init (usb_core_driver *pudev, usbh_host *puhost) -{ - usbh_hid_handler *hid = (usbh_hid_handler *)puhost->active_class->class_data; - - mouse_info.x = 0U; - mouse_info.y = 0U; - mouse_info.buttons[0] = 0U; - mouse_info.buttons[1] = 0U; - mouse_info.buttons[2] = 0U; - - mouse_report_data[0] = 0U; - - if(hid->len > sizeof(mouse_report_data)) { - hid->len = sizeof(mouse_report_data); - } - - hid->pdata = (uint8_t *)(void *)mouse_report_data; - - usbh_hid_fifo_init(&hid->fifo, puhost->dev_prop.data, HID_QUEUE_SIZE * sizeof(mouse_report_data)); - - USR_MOUSE_Init(); - - return USBH_OK; -} - -/*! - \brief get mouse information - \param[in] pudev: pointer to usb core instance - \param[in] puhost: pointer to usb host - \param[out] none - \retval mouse information -*/ -hid_mouse_info *usbh_hid_mouse_info_get (usb_core_driver *pudev, usbh_host *puhost) -{ - if(usbh_hid_mouse_decode(pudev, puhost)== USBH_OK) { - return &mouse_info; - } else { - return NULL; - } -} - -/*! - \brief decode mouse data - \param[in] pudev: pointer to usb core instance - \param[in] puhost: pointer to usb host - \param[out] none - \retval none -*/ -void usbh_hid_mouse_machine (usb_core_driver *pudev, usbh_host *puhost) -{ - hid_mouse_info *m_pinfo = NULL; - - m_pinfo = usbh_hid_mouse_info_get(pudev, puhost); - - if (NULL != m_pinfo) { - /* handle mouse data position */ - USR_MOUSE_ProcessData(&mouse_info); - } -} - -/*! - \brief decode mouse information - \param[in] pudev: pointer to usb core instance - \param[in] puhost: pointer to usb host - \param[out] none - \retval operation status -*/ -static usbh_status usbh_hid_mouse_decode(usb_core_driver *pudev, usbh_host *puhost) -{ - usbh_hid_handler *hid = (usbh_hid_handler *)puhost->active_class->class_data; - - if (0U == hid->len) { - return USBH_FAIL; - } - - /* fill report */ - if (usbh_hid_fifo_read(&hid->fifo, &mouse_report_data, hid->len) == hid->len) { - /* decode report */ - mouse_info.x = (uint8_t)hid_item_read((hid_report_item *)&prop_x, 0U); - mouse_info.y = (uint8_t)hid_item_read((hid_report_item *)&prop_y, 0U); - - mouse_info.buttons[0] = (uint8_t)hid_item_read((hid_report_item *)&prop_b1, 0U); - mouse_info.buttons[1] = (uint8_t)hid_item_read((hid_report_item *)&prop_b2, 0U); - mouse_info.buttons[2] = (uint8_t)hid_item_read((hid_report_item *)&prop_b3, 0U); - - return USBH_OK; - } - - return USBH_FAIL; -} diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_parser.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_parser.c deleted file mode 100644 index e98f0e14..00000000 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_parser.c +++ /dev/null @@ -1,148 +0,0 @@ -/*! - \file usbh_hid_parser.c - \brief USB host HID parser driver - - \version 2020-08-01, V3.0.0, firmware for GD32F30x -*/ - -/* - Copyright (c) 2020, GigaDevice Semiconductor Inc. - - Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - - 1. Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - 3. Neither the name of the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software without - specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, -INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, -WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY -OF SUCH DAMAGE. -*/ - -#include "usbh_hid_parser.h" - -/*! - \brief read a hid report item - \param[in] ri: pointer to report item - \param[in] ndx: report index - \param[out] none - \retval operation status (0: fail otherwise: item value) -*/ -uint32_t hid_item_read (hid_report_item *ri, uint8_t ndx) -{ - uint32_t val = 0U; - uint32_t bofs = 0U; - uint8_t *data = ri->data; - uint8_t shift = ri->shift; - - /* get the logical value of the item */ - - /* if this is an array, wee may need to offset ri->data.*/ - if (ri->count > 0U) { - /* if app tries to read outside of the array. */ - if (ri->count <= ndx) { - return(0U); - } - - /* calculate bit offset */ - bofs = ndx * ri->size; - bofs += shift; - - /* calculate byte offset + shift pair from bit offset. */ - data += bofs / 8U; - shift = (uint8_t)(bofs % 8U); - } - - /* read data bytes in little endian order */ - for (uint32_t x = 0U; x < ((ri->size & 0x7U) ? (ri->size / 8U) + 1U : (ri->size / 8U)); x++) { - val=(uint32_t)((uint32_t)(*data) << (x * 8U)); - } - - val=(val >> shift) & ((1U << ri->size) - 1U); - - if ((val < ri->logical_min) || (val > ri->logical_max)) { - return(0U); - } - - /* convert logical value to physical value */ - /* see if the number is negative or not. */ - if ((ri->sign) && (val & (1U << (ri->size - 1U)))) { - /* yes, so sign extend value to 32 bits. */ - uint32_t vs = (uint32_t)((0xffffffffU & ~((1U << (ri->size)) - 1U)) | val); - - if (1U == ri->resolution) { - return((uint32_t)vs); - } - return((uint32_t)(vs * ri->resolution)); - } else { - if (1U == ri->resolution) { - return(val); - } - - return (val * ri->resolution); - } -} - -/*! - \brief write a hid report item - \param[in] ri: pointer to report item - \param[in] value: the value to be write - \param[in] ndx: report index - \param[out] none - \retval operation status (1: fail 0: Ok) -*/ -uint32_t hid_item_write(hid_report_item *ri, uint32_t value, uint8_t ndx) -{ - uint32_t mask; - uint32_t bofs; - uint8_t *data = ri->data; - uint8_t shift = ri->shift; - - if ((value < ri->physical_min) || (value > ri->physical_max)) { - return(1U); - } - - /* if this is an array, wee may need to offset ri->data.*/ - if (ri->count > 0U) { - /* if app tries to read outside of the array. */ - if (ri->count >= ndx) { - return(0U); - } - - /* calculate bit offset */ - bofs = ndx * ri->size; - bofs += shift; - - /* calculate byte offset + shift pair from bit offset. */ - data += bofs / 8U; - shift = (uint8_t)(bofs % 8U); - } - - /* convert physical value to logical value. */ - if (1U != ri->resolution) { - value = value / ri->resolution; - } - - /* write logical value to report in little endian order. */ - mask = (1U << ri->size) - 1U; - value = (value & mask) << shift; - - for (uint32_t x = 0U; x < ((ri->size & 0x7U) ? (ri->size / 8U) + 1U : (ri->size / 8U)); x++) { - *(ri->data + x) = (uint8_t)((*(ri->data+x) & ~(mask>>(x* 8U))) | ((value >> (x * 8U)) & (mask >> (x * 8U)))); - } - - return 0U; -} diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_keybd.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_standard_hid.c similarity index 55% rename from system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_keybd.c rename to system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_standard_hid.c index b00747c8..6d23258a 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_hid_keybd.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/hid/Source/usbh_standard_hid.c @@ -1,12 +1,13 @@ /*! - \file usbh_hid_keybd.c - \brief USB host HID keyboard driver + \file usbh_standard_hid.c + \brief USB host HID keyboard and mouse driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -32,142 +33,17 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI OF SUCH DAMAGE. */ -#include "usbh_hid_keybd.h" -#include "usbh_hid_parser.h" +#include "usbh_standard_hid.h" #include +hid_mouse_info mouse_info; hid_keybd_info keybd_info; +uint8_t mouse_report_data[4] = {0U}; uint32_t keybd_report_data[2]; -static const hid_report_item imp_0_lctrl = -{ - (uint8_t*)(void *)keybd_report_data + 0, /* data */ - 1, /* size */ - 0, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -static const hid_report_item imp_0_lshift = -{ - (uint8_t*)(void *)keybd_report_data + 0, /* data */ - 1, /* size */ - 1, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -static const hid_report_item imp_0_lalt = -{ - (uint8_t*)(void *)keybd_report_data + 0, /* data */ - 1, /* size */ - 2, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -static const hid_report_item imp_0_lgui = -{ - (uint8_t*)(void *)keybd_report_data + 0, /* data */ - 1, /* size */ - 3, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -static const hid_report_item imp_0_rctrl = -{ - (uint8_t*)(void *)keybd_report_data + 0, /* data */ - 1, /* size */ - 4, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -static const hid_report_item imp_0_rshift = -{ - (uint8_t*)(void *)keybd_report_data + 0, /* data */ - 1, /* size */ - 5, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -static const hid_report_item imp_0_ralt = -{ - (uint8_t*)(void *)keybd_report_data + 0, /* data */ - 1, /* size */ - 6, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -static const hid_report_item imp_0_rgui = -{ - (uint8_t*)(void *)keybd_report_data + 0, /* data */ - 1, /* size */ - 7, /* shift */ - 0, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 1, /* max value read can return */ - 0, /* min vale device can report */ - 1, /* max value device can report */ - 1 /* resolution */ -}; - -static const hid_report_item imp_0_key_array = -{ - (uint8_t*)(void *)keybd_report_data + 2, /* data */ - 8, /* size */ - 0, /* shift */ - 6, /* count (only for array items) */ - 0, /* signed */ - 0, /* min value read can return */ - 101, /* max value read can return */ - 0, /* min vale device can report */ - 101, /* max value device can report */ - 1 /* resolution */ -}; - /* local constants */ -static const uint8_t hid_keybrd_codes[] = +static const uint8_t kbd_codes[] = { 0, 0, 0, 0, 31, 50, 48, 33, 19, 34, 35, 36, 24, 37, 38, 39, /* 0x00 - 0x0F */ @@ -202,7 +78,7 @@ static const uint8_t hid_keybrd_codes[] = #ifdef QWERTY_KEYBOARD -static const int8_t hid_keybrd_key[] = +static const int8_t kbd_key[] = { '\0', '`', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=', '\0', '\r', @@ -224,7 +100,7 @@ static const int8_t hid_keybrd_key[] = '\0', '\0', '\0', '\0' }; -static const int8_t hid_keybrd_shiftkey[] = { +static const int8_t kbd_key_shift[] = { '\0', '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+', '\0', '\0', '\0', 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '|', '\0', 'A', 'S', 'D', 'F', 'G', @@ -240,7 +116,7 @@ static const int8_t hid_keybrd_shiftkey[] = { #else -static const int8_t hid_keybrd_key[] = { +static const int8_t kbd_key[] = { '\0', '`', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=', '\0', '\r', '\t', 'a', 'z', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\\', '\0', 'q', 's', 'd', 'f', 'g', @@ -254,7 +130,7 @@ static const int8_t hid_keybrd_key[] = { '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0' }; -static const int8_t hid_keybrd_shiftkey[] = { +static const int8_t kbd_key_shift[] = { '\0', '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+', '\0', '\0', '\0', 'A', 'Z', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '*', '\0', 'Q', 'S', 'D', 'F', 'G', 'H', 'J', 'K', @@ -267,21 +143,67 @@ static const int8_t hid_keybrd_shiftkey[] = { '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0', '\0' }; -#endif +#endif /* QWERTY_KEYBOARD */ -/* local function prototypes ('static') */ -static usbh_status usbh_hid_keybrd_decode (usb_core_driver *pudev, usbh_host *puhost); +/*! + \brief initialize the mouse function + \param[in] udev: pointer to USB core instance + \param[in] uhost: pointer to USB host + \param[out] none + \retval none +*/ +usbh_status usbh_hid_mouse_init (usb_core_driver *udev, usbh_host *uhost) +{ + usbh_hid_handler *hid = (usbh_hid_handler *)uhost->active_class->class_data; + + mouse_info.x = 0U; + mouse_info.y = 0U; + mouse_info.buttons[0] = 0U; + mouse_info.buttons[1] = 0U; + mouse_info.buttons[2] = 0U; + + if(hid->len > sizeof(mouse_report_data)) { + hid->len = sizeof(mouse_report_data); + } + + hid->pdata = (uint8_t *)(void *)mouse_report_data; + + usr_mouse_init(); + + return USBH_OK; +} + +/*! + \brief decode mouse information + \param[in] data: pointer to inut data + \param[out] none + \retval operation status +*/ +usbh_status usbh_hid_mouse_decode(uint8_t *data) +{ + mouse_info.buttons[0] = data[0] & MOUSE_BUTTON_1; + mouse_info.buttons[1] = data[0] & MOUSE_BUTTON_2; + mouse_info.buttons[2] = data[0] & MOUSE_BUTTON_3; + + mouse_info.x = data[1]; + mouse_info.y = data[2]; + + /* handle mouse data position */ + usr_mouse_process_data(&mouse_info); + + return USBH_FAIL; +} /*! \brief initialize the keyboard function - \param[in] pudev: pointer to usb core instance - \param[in] puhost: pointer to usb host + \param[in] udev: pointer to USB core instance + \param[in] uhost: pointer to USB host \param[out] none \retval operation status */ -usbh_status usbh_hid_keybd_init (usb_core_driver *pudev, usbh_host *puhost) +usbh_status usbh_hid_keybd_init (usb_core_driver *udev, usbh_host *uhost) { - usbh_hid_handler *hid = (usbh_hid_handler *)puhost->active_class->class_data; + usbh_hid_handler *hid = (usbh_hid_handler *)uhost->active_class->class_data; keybd_info.lctrl = keybd_info.lshift = 0U; keybd_info.lalt = keybd_info.lgui = 0U; @@ -298,30 +220,12 @@ usbh_status usbh_hid_keybd_init (usb_core_driver *pudev, usbh_host *puhost) hid->pdata = (uint8_t*)(void *)keybd_report_data; - usbh_hid_fifo_init (&hid->fifo, puhost->dev_prop.data, HID_QUEUE_SIZE * sizeof(keybd_report_data)); - - /* call user init*/ - USR_KEYBRD_Init(); + /* call user initialization*/ + usr_keyboard_init(); return USBH_OK; } -/*! - \brief get keyboard information - \param[in] pudev: pointer to USB core instance - \param[in] puhost: pointer to USB host handler - \param[out] none - \retval keyboard information -*/ -hid_keybd_info *usbh_hid_keybd_info_get (usb_core_driver *pudev, usbh_host *puhost) -{ - if (USBH_OK == usbh_hid_keybrd_decode(pudev, puhost)) { - return &keybd_info; - } else { - return NULL; - } -} - /*! \brief get ascii code \param[in] info: keyboard information @@ -332,68 +236,39 @@ uint8_t usbh_hid_ascii_code_get (hid_keybd_info *info) { uint8_t output; if ((1U == info->lshift) || (info->rshift)) { - output = hid_keybrd_shiftkey[hid_keybrd_codes[info->keys[0]]]; + output = kbd_key_shift[kbd_codes[info->keys[0]]]; } else { - output = hid_keybrd_key[hid_keybrd_codes[info->keys[0]]]; + output = kbd_key[kbd_codes[info->keys[0]]]; } return output; } -/*! - \brief decode the pressed keys - \param[in] pudev: pointer to usb core instance - \param[in] puhost: pointer to usb host - \param[out] none - \retval none -*/ -void usbh_hid_keybrd_machine (usb_core_driver *pudev, usbh_host *puhost) -{ - hid_keybd_info *k_pinfo; - - k_pinfo = usbh_hid_keybd_info_get(pudev, puhost); - - if (k_pinfo != NULL) { - char c = usbh_hid_ascii_code_get(k_pinfo); - - if (c != 0U) { - USR_KEYBRD_ProcessData(c); - } - } -} - /*! \brief decode keyboard information - \param[in] pudev: pointer to usb core instance - \param[in] puhost: pointer to usb host + \param[in] udev: pointer to USB core instance + \param[in] uhost: pointer to USB host \param[out] none \retval operation status */ -static usbh_status usbh_hid_keybrd_decode (usb_core_driver *pudev, usbh_host *puhost) +usbh_status usbh_hid_keybrd_decode (uint8_t *data) { - usbh_hid_handler *hid = (usbh_hid_handler *)puhost->active_class->class_data; + uint8_t output; + + keybd_info.lshift = data[0] & KBD_LEFT_SHIFT; + keybd_info.rshift = data[0] & KBD_RIGHT_SHIFT; - if (hid->len == 0U) { - return USBH_FAIL; + keybd_info.keys[0] = data[2]; + + if (keybd_info.lshift || keybd_info.rshift) { + output = kbd_key_shift[kbd_codes[keybd_info.keys[0]]]; + } else { + output = kbd_key[kbd_codes[keybd_info.keys[0]]]; } - /* fill report */ - if (usbh_hid_fifo_read (&hid->fifo, &keybd_report_data, hid->len) == hid->len) { - keybd_info.lctrl = (uint8_t)hid_item_read((hid_report_item *)&imp_0_lctrl, 0U); - keybd_info.lshift = (uint8_t)hid_item_read((hid_report_item *)&imp_0_lshift, 0U); - keybd_info.lalt = (uint8_t)hid_item_read((hid_report_item *)&imp_0_lalt, 0U); - keybd_info.lgui = (uint8_t)hid_item_read((hid_report_item *)&imp_0_lgui, 0U); - keybd_info.rctrl = (uint8_t)hid_item_read((hid_report_item *)&imp_0_rctrl, 0U); - keybd_info.rshift = (uint8_t)hid_item_read((hid_report_item *)&imp_0_rshift, 0U); - keybd_info.ralt = (uint8_t)hid_item_read((hid_report_item *)&imp_0_ralt, 0U); - keybd_info.rgui = (uint8_t)hid_item_read((hid_report_item *)&imp_0_rgui, 0U); - - for (uint8_t x = 0U; x < sizeof(keybd_info.keys); x++) { - keybd_info.keys[x] = (uint8_t)hid_item_read((hid_report_item *)&imp_0_key_array, x); - } - - return USBH_OK; + if (0U != output) { + usr_keybrd_process_data(output); } - return USBH_FAIL; + return USBH_OK; } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_bbb.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_bbb.h index d2df14a5..75d616bd 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_bbb.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_bbb.h @@ -3,10 +3,11 @@ \brief header file for usbh_msc_bbb.c \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -38,27 +39,30 @@ OF SUCH DAMAGE. #include "usbh_enum.h" #include "msc_bbb.h" -typedef union { +typedef union +{ msc_bbb_cbw field; uint8_t CBWArray[31]; }usbh_cbw_pkt; -typedef union { +typedef union +{ msc_bbb_csw field; uint8_t CSWArray[13]; }usbh_csw_pkt; -enum usbh_msc_state { - USBH_MSC_BOT_INIT_STATE = 0U, - USBH_MSC_BOT_RESET, +enum usbh_msc_state +{ + USBH_MSC_BBB_INIT_STATE = 0U, + USBH_MSC_BBB_RESET, USBH_MSC_GET_MAX_LUN, USBH_MSC_TEST_UNIT_READY, USBH_MSC_READ_CAPACITY10, USBH_MSC_MODE_SENSE6, USBH_MSC_REQUEST_SENSE, - USBH_MSC_BOT_USB_TRANSFERS, + USBH_MSC_BBB_USB_TRANSFERS, USBH_MSC_DEFAULT_APPLI_STATE, USBH_MSC_CTRL_ERROR_STATE, USBH_MSC_UNRECOVERED_STATE @@ -66,54 +70,54 @@ enum usbh_msc_state { typedef enum { - BOT_OK = 0U, - BOT_FAIL, - BOT_PHASE_ERROR, - BOT_BUSY -} bot_status; + BBB_OK = 0U, + BBB_FAIL, + BBB_PHASE_ERROR, + BBB_BUSY +} bbb_status; typedef enum { - BOT_CMD_IDLE = 0U, - BOT_CMD_SEND, - BOT_CMD_WAIT, -} bot_cmd_state; + BBB_CMD_IDLE = 0U, + BBB_CMD_SEND, + BBB_CMD_WAIT, +} bbb_cmd_state; /* csw status definitions */ typedef enum { - BOT_CSW_CMD_PASSED = 0U, - BOT_CSW_CMD_FAILED, - BOT_CSW_PHASE_ERROR, -} bot_csw_status; + BBB_CSW_CMD_PASSED = 0U, + BBB_CSW_CMD_FAILED, + BBB_CSW_PHASE_ERROR, +} bbb_csw_status; typedef enum { - BOT_SEND_CBW = 1U, - BOT_SEND_CBW_WAIT, - BOT_DATA_IN, - BOT_DATA_IN_WAIT, - BOT_DATA_OUT, - BOT_DATA_OUT_WAIT, - BOT_RECEIVE_CSW, - BOT_RECEIVE_CSW_WAIT, - BOT_ERROR_IN, - BOT_ERROR_OUT, - BOT_UNRECOVERED_ERROR -} bot_state; + BBB_SEND_CBW = 1U, + BBB_SEND_CBW_WAIT, + BBB_DATA_IN, + BBB_DATA_IN_WAIT, + BBB_DATA_OUT, + BBB_DATA_OUT_WAIT, + BBB_RECEIVE_CSW, + BBB_RECEIVE_CSW_WAIT, + BBB_ERROR_IN, + BBB_ERROR_OUT, + BBB_UNRECOVERED_ERROR +} bbb_state; typedef struct { uint8_t *pbuf; uint32_t data[16]; - bot_state state; - bot_state prev_state; - bot_cmd_state cmd_state; + bbb_state state; + bbb_state prev_state; + bbb_cmd_state cmd_state; usbh_cbw_pkt cbw; usbh_csw_pkt csw; -} bot_handle; +} bbb_handle; -#define USBH_MSC_BOT_CBW_TAG 0x20304050U +#define USBH_MSC_BBB_CBW_TAG 0x20304050U #define USBH_MSC_CSW_MAX_LENGTH 63U @@ -137,14 +141,14 @@ typedef struct /* function declarations */ /* initialize the mass storage parameters */ -void usbh_msc_bot_init (usbh_host *puhost); +void usbh_msc_bbb_init (usbh_host *puhost); /* manage the different states of BOT transfer and updates the status to upper layer */ -usbh_status usbh_msc_bot_process (usbh_host *puhost, uint8_t lun); +usbh_status usbh_msc_bbb_process (usbh_host *puhost, uint8_t lun); /* manages the different error handling for stall */ -usbh_status usbh_msc_bot_abort (usbh_host *puhost, uint8_t direction); -/* reset msc bot request struct */ -usbh_status usbh_msc_bot_reset (usbh_host *puhost); +usbh_status usbh_msc_bbb_abort (usbh_host *puhost, uint8_t direction); +/* reset MSC bot request structure */ +usbh_status usbh_msc_bbb_reset (usbh_host *puhost); /* decode the CSW received by the device and updates the same to upper layer */ -bot_csw_status usbh_msc_csw_decode (usbh_host *puhost); +bbb_csw_status usbh_msc_csw_decode (usbh_host *puhost); #endif /* __USBH_MSC_BBB_H */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_core.h index c3e87fca..292c490a 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_core.h @@ -3,10 +3,11 @@ \brief header file for the usbh_core.c \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -98,7 +99,7 @@ typedef struct _msc_process msc_error error; msc_req_state req_state; msc_req_state prev_req_state; - bot_handle bot; + bbb_handle bot; msc_lun unit[MSC_MAX_SUPPORTED_LUN]; uint32_t timer; } usbh_msc_handler; diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_scsi.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_scsi.h index 29a9f542..d6690219 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_scsi.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Include/usbh_msc_scsi.h @@ -3,10 +3,11 @@ \brief header file for usbh_msc_scsi.c \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_bbb.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_bbb.c index 600af6a1..4c0f2b9f 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_bbb.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_bbb.c @@ -3,10 +3,11 @@ \brief USB MSC BBB protocol related functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -45,14 +46,14 @@ OF SUCH DAMAGE. \param[out] none \retval none */ -void usbh_msc_bot_init (usbh_host *puhost) +void usbh_msc_bbb_init (usbh_host *puhost) { usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; msc->bot.cbw.field.dCBWSignature = BBB_CBW_SIGNATURE; - msc->bot.cbw.field.dCBWTag = USBH_MSC_BOT_CBW_TAG; - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_SEND; + msc->bot.cbw.field.dCBWTag = USBH_MSC_BBB_CBW_TAG; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_SEND; } /*! @@ -62,18 +63,18 @@ void usbh_msc_bot_init (usbh_host *puhost) \param[out] none \retval operation status */ -usbh_status usbh_msc_bot_process (usbh_host *puhost, uint8_t lun) +usbh_status usbh_msc_bbb_process (usbh_host *puhost, uint8_t lun) { - bot_csw_status csw_status = BOT_CSW_CMD_FAILED; + bbb_csw_status csw_status = BBB_CSW_CMD_FAILED; usbh_status status = USBH_BUSY; usbh_status error = USBH_BUSY; usb_urb_state urb_status = URB_IDLE; usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; switch (msc->bot.state) { - case BOT_SEND_CBW: + case BBB_SEND_CBW: msc->bot.cbw.field.bCBWLUN = lun; - msc->bot.state = BOT_SEND_CBW_WAIT; + msc->bot.state = BBB_SEND_CBW_WAIT; /* send CBW */ usbh_data_send (puhost->data, msc->bot.cbw.CBWArray, @@ -81,39 +82,39 @@ usbh_status usbh_msc_bot_process (usbh_host *puhost, uint8_t lun) BBB_CBW_LENGTH); break; - case BOT_SEND_CBW_WAIT: + case BBB_SEND_CBW_WAIT: urb_status = usbh_urbstate_get(puhost->data, msc->pipe_out); if (URB_DONE == urb_status) { if (0U != msc->bot.cbw.field.dCBWDataTransferLength) { if (USB_TRX_IN == (msc->bot.cbw.field.bmCBWFlags & USB_TRX_MASK)) { - msc->bot.state = BOT_DATA_IN; + msc->bot.state = BBB_DATA_IN; } else { - msc->bot.state = BOT_DATA_OUT; + msc->bot.state = BBB_DATA_OUT; } } else { - msc->bot.state = BOT_RECEIVE_CSW; + msc->bot.state = BBB_RECEIVE_CSW; } } else if (URB_NOTREADY == urb_status) { - msc->bot.state = BOT_SEND_CBW; + msc->bot.state = BBB_SEND_CBW; } else { if (URB_STALL == urb_status) { - msc->bot.state = BOT_ERROR_OUT; + msc->bot.state = BBB_ERROR_OUT; } } break; - case BOT_DATA_IN: + case BBB_DATA_IN: usbh_data_recev (puhost->data, msc->bot.pbuf, msc->pipe_in, msc->ep_size_in); - msc->bot.state = BOT_DATA_IN_WAIT; + msc->bot.state = BBB_DATA_IN_WAIT; break; - case BOT_DATA_IN_WAIT: + case BBB_DATA_IN_WAIT: urb_status = usbh_urbstate_get(puhost->data, msc->pipe_in); /* BOT DATA IN stage */ @@ -131,26 +132,26 @@ usbh_status usbh_msc_bot_process (usbh_host *puhost, uint8_t lun) msc->pipe_in, msc->ep_size_in); } else { - msc->bot.state = BOT_RECEIVE_CSW; + msc->bot.state = BBB_RECEIVE_CSW; } } else if(URB_STALL == urb_status) { /* this is data stage stall condition */ - msc->bot.state = BOT_ERROR_IN; + msc->bot.state = BBB_ERROR_IN; } else { /* no operation */ } break; - case BOT_DATA_OUT: + case BBB_DATA_OUT: usbh_data_send (puhost->data, msc->bot.pbuf, msc->pipe_out, msc->ep_size_out); - msc->bot.state = BOT_DATA_OUT_WAIT; + msc->bot.state = BBB_DATA_OUT_WAIT; break; - case BOT_DATA_OUT_WAIT: + case BBB_DATA_OUT_WAIT: /* BOT DATA OUT stage */ urb_status = usbh_urbstate_get(puhost->data, msc->pipe_out); if (URB_DONE == urb_status) { @@ -167,80 +168,80 @@ usbh_status usbh_msc_bot_process (usbh_host *puhost, uint8_t lun) msc->pipe_out, msc->ep_size_out); } else { - msc->bot.state = BOT_RECEIVE_CSW; + msc->bot.state = BBB_RECEIVE_CSW; } } else if (URB_NOTREADY == urb_status) { - msc->bot.state = BOT_DATA_OUT; + msc->bot.state = BBB_DATA_OUT; } else if (URB_STALL == urb_status) { - msc->bot.state = BOT_ERROR_OUT; + msc->bot.state = BBB_ERROR_OUT; } else { /* no operation */ } break; - case BOT_RECEIVE_CSW: + case BBB_RECEIVE_CSW: /* BOT CSW stage */ usbh_data_recev (puhost->data, msc->bot.csw.CSWArray, msc->pipe_in, BBB_CSW_LENGTH); - msc->bot.state = BOT_RECEIVE_CSW_WAIT; + msc->bot.state = BBB_RECEIVE_CSW_WAIT; break; - case BOT_RECEIVE_CSW_WAIT: + case BBB_RECEIVE_CSW_WAIT: urb_status = usbh_urbstate_get(puhost->data, msc->pipe_in); /* decode CSW */ if (URB_DONE == urb_status) { - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_SEND; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_SEND; csw_status = usbh_msc_csw_decode(puhost); - if (BOT_CSW_CMD_PASSED == csw_status) { + if (BBB_CSW_CMD_PASSED == csw_status) { status = USBH_OK; } else { status = USBH_FAIL; } } else if (URB_STALL == urb_status) { - msc->bot.state = BOT_ERROR_IN; + msc->bot.state = BBB_ERROR_IN; } else { /* no operation */ } break; - case BOT_ERROR_IN: - error = usbh_msc_bot_abort(puhost, USBH_MSC_DIR_IN); + case BBB_ERROR_IN: + error = usbh_msc_bbb_abort(puhost, USBH_MSC_DIR_IN); if (USBH_OK == error) { - msc->bot.state = BOT_RECEIVE_CSW; + msc->bot.state = BBB_RECEIVE_CSW; } else if (USBH_UNRECOVERED_ERROR == status) { /* this means that there is a stall error limit, do reset recovery */ - msc->bot.state = BOT_UNRECOVERED_ERROR; + msc->bot.state = BBB_UNRECOVERED_ERROR; } else { /* no operation */ } break; - case BOT_ERROR_OUT: - status = usbh_msc_bot_abort (puhost, USBH_MSC_DIR_OUT); + case BBB_ERROR_OUT: + status = usbh_msc_bbb_abort (puhost, USBH_MSC_DIR_OUT); if (USBH_OK == status) { uint8_t toggle = usbh_pipe_toggle_get(puhost->data, msc->pipe_out); usbh_pipe_toggle_set(puhost->data, msc->pipe_out, 1U - toggle); usbh_pipe_toggle_set(puhost->data, msc->pipe_in, 0U); - msc->bot.state = BOT_ERROR_IN; + msc->bot.state = BBB_ERROR_IN; } else { if (USBH_UNRECOVERED_ERROR == status) { - msc->bot.state = BOT_UNRECOVERED_ERROR; + msc->bot.state = BBB_UNRECOVERED_ERROR; } } break; - case BOT_UNRECOVERED_ERROR: - status = usbh_msc_bot_reset(puhost); + case BBB_UNRECOVERED_ERROR: + status = usbh_msc_bbb_reset(puhost); if (USBH_OK == status) { - msc->bot.state = BOT_SEND_CBW; + msc->bot.state = BBB_SEND_CBW; } break; @@ -258,7 +259,7 @@ usbh_status usbh_msc_bot_process (usbh_host *puhost, uint8_t lun) \param[out] none \retval operation status */ -usbh_status usbh_msc_bot_abort (usbh_host *puhost, uint8_t direction) +usbh_status usbh_msc_bbb_abort (usbh_host *puhost, uint8_t direction) { usbh_status status = USBH_BUSY; usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; @@ -291,7 +292,7 @@ usbh_status usbh_msc_bot_abort (usbh_host *puhost, uint8_t direction) \param[out] none \retval operation status */ -usbh_status usbh_msc_bot_reset (usbh_host *puhost) +usbh_status usbh_msc_bbb_reset (usbh_host *puhost) { usbh_status status = USBH_BUSY; @@ -325,14 +326,14 @@ usbh_status usbh_msc_bot_reset (usbh_host *puhost) 2. the CSW is 13 (Dh) bytes in length, 3. dCSWTag matches the dCBWTag from the corresponding CBW. */ -bot_csw_status usbh_msc_csw_decode (usbh_host *puhost) +bbb_csw_status usbh_msc_csw_decode (usbh_host *puhost) { - bot_csw_status status = BOT_CSW_CMD_FAILED; + bbb_csw_status status = BBB_CSW_CMD_FAILED; usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; /* checking if the transfer length is different than 13 */ if (BBB_CSW_LENGTH != usbh_xfercount_get (puhost->data, msc->pipe_in)) { - status = BOT_CSW_PHASE_ERROR; + status = BBB_CSW_PHASE_ERROR; } else { /* CSW length is correct */ @@ -342,11 +343,11 @@ bot_csw_status usbh_msc_csw_decode (usbh_host *puhost) if (msc->bot.csw.field.dCSWTag == msc->bot.cbw.field.dCBWTag) { /* check condition 3. dCSWTag matches the dCBWTag from the corresponding CBW */ if (0U == msc->bot.csw.field.bCSWStatus) { - status = BOT_CSW_CMD_PASSED; + status = BBB_CSW_CMD_PASSED; } else if (1U == msc->bot.csw.field.bCSWStatus) { - status = BOT_CSW_CMD_FAILED; + status = BBB_CSW_CMD_FAILED; } else if (2U == msc->bot.csw.field.bCSWStatus) { - status = BOT_CSW_PHASE_ERROR; + status = BBB_CSW_PHASE_ERROR; } else { /* no operation */ } @@ -354,7 +355,7 @@ bot_csw_status usbh_msc_csw_decode (usbh_host *puhost) } else { /* If the CSW signature is not valid, we will return the phase error to upper layers for reset recovery */ - status = BOT_CSW_PHASE_ERROR; + status = BBB_CSW_PHASE_ERROR; } } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_core.c index 1d36ce1d..7a341e08 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_core.c @@ -3,10 +3,11 @@ \brief USB MSC(mass storage device) class driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -108,7 +109,7 @@ static usbh_status usbh_msc_itf_init (usbh_host *puhost) msc_handler.pipe_out = usbh_pipe_allocate(puhost->data, msc_handler.ep_out); msc_handler.pipe_in = usbh_pipe_allocate(puhost->data, msc_handler.ep_in); - usbh_msc_bot_init(puhost); + usbh_msc_bbb_init(puhost); /* open the new channels */ usbh_pipe_create (puhost->data, diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_fatfs.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_fatfs.c index 837b1d8c..75776f5b 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_fatfs.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_fatfs.c @@ -3,10 +3,11 @@ \brief USB MSC host FATFS related functions \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_scsi.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_scsi.c index 85e7ddb8..75321aab 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_scsi.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/class/msc/Source/usbh_msc_scsi.c @@ -3,10 +3,11 @@ \brief USB MSC SCSI commands implemention \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -51,7 +52,7 @@ usbh_status usbh_msc_scsi_inquiry (usbh_host *puhost, uint8_t lun, scsi_std_inqu usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; switch (msc->bot.cmd_state) { - case BOT_CMD_SEND: + case BBB_CMD_SEND: /* prepare the cbw and relevant field*/ msc->bot.cbw.field.dCBWDataTransferLength = STANDARD_INQUIRY_DATA_LEN; msc->bot.cbw.field.bmCBWFlags = USB_TRX_IN; @@ -63,14 +64,14 @@ usbh_status usbh_msc_scsi_inquiry (usbh_host *puhost, uint8_t lun, scsi_std_inqu msc->bot.cbw.field.CBWCB[1] = (lun << 5U); msc->bot.cbw.field.CBWCB[4] = 0x24U; - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_WAIT; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_WAIT; msc->bot.pbuf = (uint8_t *)(void *)msc->bot.data; error = USBH_BUSY; break; - case BOT_CMD_WAIT: - error = usbh_msc_bot_process(puhost, lun); + case BBB_CMD_WAIT: + error = usbh_msc_bbb_process(puhost, lun); if (USBH_OK == error) { memset(inquiry, 0U, sizeof(scsi_std_inquiry_data)); @@ -112,7 +113,7 @@ usbh_status usbh_msc_test_unitready (usbh_host *puhost, uint8_t lun) switch (msc->bot.cmd_state) { - case BOT_CMD_SEND: + case BBB_CMD_SEND: /* prepare the CBW and relevant field */ msc->bot.cbw.field.dCBWDataTransferLength = CBW_LENGTH_TEST_UNIT_READY; msc->bot.cbw.field.bmCBWFlags = USB_TRX_OUT; @@ -121,14 +122,14 @@ usbh_status usbh_msc_test_unitready (usbh_host *puhost, uint8_t lun) memset(msc->bot.cbw.field.CBWCB, 0U, CBW_CB_LENGTH); msc->bot.cbw.field.CBWCB[0] = SCSI_TEST_UNIT_READY; - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_WAIT; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_WAIT; status = USBH_BUSY; break; - case BOT_CMD_WAIT: - status = usbh_msc_bot_process(puhost, lun); + case BBB_CMD_WAIT: + status = usbh_msc_bbb_process(puhost, lun); break; default: @@ -152,7 +153,7 @@ usbh_status usbh_msc_read_capacity10 (usbh_host *puhost, uint8_t lun, scsi_capac usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; switch (msc->bot.cmd_state) { - case BOT_CMD_SEND: + case BBB_CMD_SEND: /* prepare the CBW and relevant field */ msc->bot.cbw.field.dCBWDataTransferLength = READ_CAPACITY10_DATA_LEN; msc->bot.cbw.field.bmCBWFlags = USB_TRX_IN; @@ -161,15 +162,15 @@ usbh_status usbh_msc_read_capacity10 (usbh_host *puhost, uint8_t lun, scsi_capac memset(msc->bot.cbw.field.CBWCB, 0U, CBW_CB_LENGTH); msc->bot.cbw.field.CBWCB[0] = SCSI_READ_CAPACITY10; - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_WAIT; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_WAIT; msc->bot.pbuf = (uint8_t *)(void *)msc->bot.data; status = USBH_BUSY; break; - case BOT_CMD_WAIT: - status = usbh_msc_bot_process(puhost, lun); + case BBB_CMD_WAIT: + status = usbh_msc_bbb_process(puhost, lun); if (USBH_OK == status) { capacity->block_nbr = msc->bot.pbuf[3] | \ @@ -201,7 +202,7 @@ usbh_status usbh_msc_mode_sense6 (usbh_host *puhost, uint8_t lun) usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; switch (msc->bot.cmd_state) { - case BOT_CMD_SEND: + case BBB_CMD_SEND: /* prepare the CBW and relevant field */ msc->bot.cbw.field.dCBWDataTransferLength = XFER_LEN_MODE_SENSE6; msc->bot.cbw.field.bmCBWFlags = USB_TRX_IN; @@ -212,15 +213,15 @@ usbh_status usbh_msc_mode_sense6 (usbh_host *puhost, uint8_t lun) msc->bot.cbw.field.CBWCB[0] = SCSI_MODE_SENSE6; msc->bot.cbw.field.CBWCB[2] = MODE_SENSE_PAGE_CONTROL_FIELD | MODE_SENSE_PAGE_CODE; msc->bot.cbw.field.CBWCB[4] = XFER_LEN_MODE_SENSE6; - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_WAIT; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_WAIT; msc->bot.pbuf = (uint8_t *)(void *)msc->bot.data; status = USBH_BUSY; break; - case BOT_CMD_WAIT: - status = usbh_msc_bot_process(puhost, lun); + case BBB_CMD_WAIT: + status = usbh_msc_bbb_process(puhost, lun); if (USBH_OK == status) { if (msc->bot.data[2] & MASK_MODE_SENSE_WRITE_PROTECT) { @@ -252,7 +253,7 @@ usbh_status usbh_msc_request_sense (usbh_host *puhost, uint8_t lun, msc_scsi_sen usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; switch (msc->bot.cmd_state) { - case BOT_CMD_SEND: + case BBB_CMD_SEND: /* prepare the cbw and relevant field */ msc->bot.cbw.field.dCBWDataTransferLength = ALLOCATION_LENGTH_REQUEST_SENSE; msc->bot.cbw.field.bmCBWFlags = USB_TRX_IN; @@ -264,15 +265,15 @@ usbh_status usbh_msc_request_sense (usbh_host *puhost, uint8_t lun, msc_scsi_sen msc->bot.cbw.field.CBWCB[1] = (lun << 5U); msc->bot.cbw.field.CBWCB[4] = ALLOCATION_LENGTH_REQUEST_SENSE; - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_WAIT; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_WAIT; msc->bot.pbuf = (uint8_t *)(void *)msc->bot.data; status = USBH_BUSY; break; - case BOT_CMD_WAIT: - status = usbh_msc_bot_process(puhost, lun); + case BBB_CMD_WAIT: + status = usbh_msc_bbb_process(puhost, lun); if (status == USBH_OK) { /* get sense data */ @@ -305,7 +306,7 @@ usbh_status usbh_msc_write10 (usbh_host *puhost, uint8_t lun, uint8_t *data_buf, usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; switch (msc->bot.cmd_state) { - case BOT_CMD_SEND: + case BBB_CMD_SEND: msc->bot.cbw.field.dCBWDataTransferLength = sector_num * msc->unit[lun].capacity.block_size; msc->bot.cbw.field.bmCBWFlags = USB_TRX_OUT; msc->bot.cbw.field.bCBWCBLength = CBW_LENGTH; @@ -324,15 +325,15 @@ usbh_status usbh_msc_write10 (usbh_host *puhost, uint8_t lun, uint8_t *data_buf, msc->bot.cbw.field.CBWCB[7] = (((uint8_t *)§or_num)[1]); msc->bot.cbw.field.CBWCB[8] = (((uint8_t *)§or_num)[0]); - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_WAIT; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_WAIT; msc->bot.pbuf = data_buf; status = USBH_BUSY; break; - case BOT_CMD_WAIT: - status = usbh_msc_bot_process(puhost, lun); + case BBB_CMD_WAIT: + status = usbh_msc_bbb_process(puhost, lun); break; default: @@ -358,7 +359,7 @@ usbh_status usbh_msc_read10 (usbh_host *puhost, uint8_t lun, uint8_t *data_buf, usbh_msc_handler *msc = (usbh_msc_handler *)puhost->active_class->class_data; switch (msc->bot.cmd_state) { - case BOT_CMD_SEND: + case BBB_CMD_SEND: /* prepare the CBW and relevant field */ msc->bot.cbw.field.dCBWDataTransferLength = sector_num * msc->unit[lun].capacity.block_size; msc->bot.cbw.field.bmCBWFlags = USB_TRX_IN; @@ -378,15 +379,15 @@ usbh_status usbh_msc_read10 (usbh_host *puhost, uint8_t lun, uint8_t *data_buf, msc->bot.cbw.field.CBWCB[7] = (((uint8_t *)§or_num)[1]); msc->bot.cbw.field.CBWCB[8] = (((uint8_t *)§or_num)[0]); - msc->bot.state = BOT_SEND_CBW; - msc->bot.cmd_state = BOT_CMD_WAIT; + msc->bot.state = BBB_SEND_CBW; + msc->bot.cmd_state = BBB_CMD_WAIT; msc->bot.pbuf = data_buf; status = USBH_BUSY; break; - case BOT_CMD_WAIT: - status = usbh_msc_bot_process(puhost, lun); + case BBB_CMD_WAIT: + status = usbh_msc_bbb_process(puhost, lun); break; default: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_core.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_core.h index 1d8efce2..bb0f047f 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_core.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_core.h @@ -3,10 +3,11 @@ \brief USB host core state machine header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -64,15 +65,15 @@ typedef enum { HOST_DEFAULT = 0U, HOST_DETECT_DEV_SPEED, - HOST_DEV_ATTACHED, + HOST_DEV_CONNECT, HOST_DEV_DETACHED, - HOST_ENUM, - HOST_SET_WAKEUP_FEATURE, - HOST_CHECK_CLASS, + HOST_DEV_ENUM, + HOST_PWR_FEATURE_SET, + HOST_CLASS_CHECK, HOST_CLASS_ENUM, HOST_CLASS_HANDLER, HOST_USER_INPUT, - HOST_SUSPENDED, + HOST_SUSPEND, HOST_WAKEUP, HOST_ERROR } usb_host_state; @@ -114,19 +115,10 @@ typedef enum /* user action state */ typedef enum { - USBH_USER_NO_RESP = 0U, - USBH_USER_RESP_OK = 1U, + USR_IN_NO_RESP = 0U, + USR_IN_RESP_OK = 1U, } usbh_user_status; -typedef enum -{ - USBH_PORT_EVENT = 1U, - USBH_URB_EVENT, - USBH_CONTROL_EVENT, - USBH_CLASS_EVENT, - USBH_STATE_CHANGED_EVENT, -}usbh_os_event; - /* control transfer information */ typedef struct _usbh_control { @@ -160,7 +152,7 @@ typedef struct _usb_desc_cfg_set /* USB device property */ typedef struct { - uint8_t data[USBH_DATA_BUF_MAX_LEN]; /* if DMA is used, the data array must be located in the first position */ + uint8_t data[USBH_DATA_BUF_MAX_LEN]; uint8_t cur_itf; uint8_t addr; @@ -169,9 +161,9 @@ typedef struct usb_desc_dev dev_desc; usb_desc_cfg_set cfg_desc_set; -#if (USBH_KEEP_CFG_DESCRIPTOR == 1U) +#if (USBH_CFG_DESC_KEEP == 1U) uint8_t cfgdesc_rawdata[USBH_CFGSET_MAX_LEN]; -#endif /* (USBH_KEEP_CFG_DESCRIPTOR == 1U) */ +#endif /* (USBH_CFG_DESC_KEEP == 1U) */ } usb_dev_prop; struct _usbh_host; @@ -233,6 +225,12 @@ typedef struct _usbh_host uint8_t class_num; /*!< USB class number */ void *data; /*!< used for... */ + +#if USB_LOW_POWER + uint8_t suspend_flag; /*!< host suspend flag */ + uint8_t dev_supp_remote_wkup; /*!< record device remote wakeup function */ + uint8_t wakeup_mode; /*!< record wakeup mode */ +#endif /* USB_LOW_POWER*/ } usbh_host; /*! @@ -264,7 +262,7 @@ static inline uint32_t usbh_xfercount_get (usb_core_driver *pudev, uint8_t pp_nu void usbh_init (usbh_host *puhost, usbh_user_cb *user_cb); /* USB host register device class */ usbh_status usbh_class_register (usbh_host *puhost, usbh_class *puclass); -/* de-initialize USB host */ +/* deinitialize USB host */ usbh_status usbh_deinit (usbh_host *puhost); /* USB host core main state machine process */ void usbh_core_task (usbh_host *puhost); diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_enum.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_enum.h index f45078d9..a48d9f50 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_enum.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_enum.h @@ -3,10 +3,11 @@ \brief USB host mode USB enumeration header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -35,7 +36,6 @@ OF SUCH DAMAGE. #ifndef __USBH_ENUM_H #define __USBH_ENUM_H -#include "usb_conf.h" #include "usbh_core.h" /* function declarations */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_pipe.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_pipe.h index 185eee1e..9afa0fdc 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_pipe.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_pipe.h @@ -3,10 +3,11 @@ \brief USB host mode pipe header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -37,12 +38,14 @@ OF SUCH DAMAGE. #include "usbh_core.h" -#define HC_MAX 8U +/* host pipe maximum */ +#define HP_MAX 8U -#define HC_OK 0x0000U -#define HC_USED 0x8000U -#define HC_ERROR 0xFFFFU -#define HC_USED_MASK 0x7FFFU +/* host pipe status */ +#define HP_OK 0x0000U +#define HP_USED 0x8000U +#define HP_ERROR 0xFFFFU +#define HP_USED_MASK 0x7FFFU /*! \brief set toggle for a pipe diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_transc.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_transc.h index ec39eb7e..27b53a00 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_transc.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Include/usbh_transc.h @@ -3,10 +3,11 @@ \brief USB host mode transactions header file \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -35,7 +36,6 @@ OF SUCH DAMAGE. #ifndef __USBH_TRANSC_H #define __USBH_TRANSC_H -#include "usb_conf.h" #include "usbh_core.h" /* function declarations */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_core.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_core.c index 326c2f8e..51a58c99 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_core.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_core.c @@ -3,10 +3,11 @@ \brief USB host core state machine driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -42,28 +43,25 @@ OF SUCH DAMAGE. usb_core_driver usbh_core; /* local function prototypes ('static') */ -static uint8_t usbh_sof (usbh_host *puhost); -static uint8_t usbh_connect (usbh_host *puhost); -static uint8_t usbh_disconnect (usbh_host *puhost); -static uint8_t usbh_port_enabled (usbh_host *puhost); -static uint8_t usbh_port_disabled (usbh_host *puhost); +static uint8_t usb_ev_sof (usbh_host *puhost); +static uint8_t usb_ev_connect (usbh_host *puhost); +static uint8_t usb_ev_disconnect (usbh_host *puhost); + static usbh_status usbh_enum_task (usbh_host *puhost); -#ifdef USB_FS_LOW_PWR_ENABLE +#if USB_LOW_POWER static void usb_hwp_suspend(usb_core_driver *pudev); static void usb_hwp_resume(usb_core_driver *pudev); -#endif +#endif /* USB_LOW_POWER */ -usbh_int_cb usbh_int_op = +usbh_ev_cb usbh_int_op = { - usbh_connect, - usbh_disconnect, - usbh_port_enabled, - usbh_port_disabled, - usbh_sof + usb_ev_connect, + usb_ev_disconnect, + usb_ev_sof, }; -usbh_int_cb *usbh_int_fop = &usbh_int_op; +usbh_ev_cb *usbh_int_fop = &usbh_int_op; /*! \brief USB host stack initializations @@ -197,7 +195,7 @@ void usbh_core_task (usbh_host *puhost) case HOST_DETECT_DEV_SPEED: if (usbh_core.host.port_enabled) { - puhost->cur_state = HOST_DEV_ATTACHED; + puhost->cur_state = HOST_DEV_CONNECT; puhost->dev_prop.speed = usb_curspeed_get (&usbh_core); @@ -207,7 +205,7 @@ void usbh_core_task (usbh_host *puhost) } break; - case HOST_DEV_ATTACHED: + case HOST_DEV_CONNECT: puhost->usr_cb->dev_attach(); puhost->control.pipe_out_num = usbh_pipe_allocate(&usbh_core, 0x00U); puhost->control.pipe_in_num = usbh_pipe_allocate(&usbh_core, 0x80U); @@ -226,10 +224,10 @@ void usbh_core_task (usbh_host *puhost) USB_EPTYPE_CTRL, (uint16_t)puhost->control.max_len); - puhost->cur_state = HOST_ENUM; + puhost->cur_state = HOST_DEV_ENUM; break; - case HOST_ENUM: + case HOST_DEV_ENUM: /* check for enumeration status */ if (USBH_OK == usbh_enum_task (puhost)) { /* the function shall return USBH_OK when full enumeration is complete */ @@ -237,25 +235,32 @@ void usbh_core_task (usbh_host *puhost) /* user callback for end of device basic enumeration */ puhost->usr_cb->dev_enumerated(); -#ifdef USB_FS_LOW_PWR_ENABLE - puhost->cur_state = HOST_SUSPENDED; +#if USB_LOW_POWER + puhost->cur_state = HOST_SUSPEND; + + /* judge device remote wakup function */ + if ((puhost->dev_prop.cfg_desc_set.cfg_desc.bmAttributes) & (1U << 5)) { + puhost->dev_supp_remote_wkup = 1; + }else{ + puhost->dev_supp_remote_wkup = 0; + } #else - puhost->cur_state = HOST_SET_WAKEUP_FEATURE; -#endif + puhost->cur_state = HOST_PWR_FEATURE_SET; +#endif /* USB_LOW_POWER */ } break; - case HOST_SET_WAKEUP_FEATURE: + case HOST_PWR_FEATURE_SET: if ((puhost->dev_prop.cfg_desc_set.cfg_desc.bmAttributes) & (1U << 5)) { if (usbh_setdevfeature(puhost, FEATURE_SELECTOR_REMOTEWAKEUP, 0U) == USBH_OK) { - puhost->cur_state = HOST_CHECK_CLASS; + puhost->cur_state = HOST_CLASS_CHECK; } } else { - puhost->cur_state = HOST_CHECK_CLASS; + puhost->cur_state = HOST_CLASS_CHECK; } break; - case HOST_CHECK_CLASS: + case HOST_CLASS_CHECK: if (puhost->class_num == 0U) { puhost->cur_state = HOST_ERROR; } else { @@ -279,33 +284,61 @@ void usbh_core_task (usbh_host *puhost) case HOST_USER_INPUT: /* the function should return user response true to move to class state */ - if (USBH_USER_RESP_OK == puhost->usr_cb->dev_user_input()) { + if (USR_IN_RESP_OK == puhost->usr_cb->dev_user_input()) { if ((USBH_OK == puhost->active_class->class_init(puhost))) { puhost->cur_state = HOST_CLASS_ENUM; } } break; -#ifdef USB_FS_LOW_PWR_ENABLE - case HOST_SUSPENDED: - if (USBH_OK == usbh_setdevfeature(puhost, FEATURE_SELECTOR_DEV, 0U)) { - puhost->suspend_flag = 1; - usb_hwp_suspend(puhost->data); - puhost->usr_cb->dev_user_input(); - pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, WFI_CMD); - puhost->cur_state = HOST_WAKEUP; +#if USB_LOW_POWER + case HOST_SUSPEND: + if(puhost->dev_supp_remote_wkup){ + /* send set feature command*/ + if (USBH_OK == usbh_setdevfeature(puhost, FEATURE_SELECTOR_REMOTEWAKEUP, 0U)) { + + usb_hwp_suspend(&usbh_core); + + usb_mdelay(20U); + puhost->suspend_flag = 1; + puhost->usr_cb->dev_user_input(); + + /* MCU enter deep-sleep*/ + pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, PMU_LOWDRIVER_DISABLE, WFI_CMD); + puhost->cur_state = HOST_WAKEUP; + } + }else { + /* host suspend */ + usb_hwp_suspend(&usbh_core); + + usb_mdelay(20U); + puhost->suspend_flag = 1U; + puhost->usr_cb->dev_user_input(); + + /* MCU enter deep-sleep */ + pmu_to_deepsleepmode(PMU_LDO_LOWPOWER, PMU_LOWDRIVER_DISABLE, WFI_CMD); + puhost->cur_state = HOST_WAKEUP; } break; case HOST_WAKEUP: - if (USBH_OK == usbh_clrdevfeature(puhost, FEATURE_SELECTOR_DEV, 0U)) { - /* user callback for initalization */ - puhost->usr_cb->dev_init(); - - puhost->cur_state = HOST_CHECK_CLASS; + /* judge suspend status */ + if (0 == puhost->suspend_flag) { + usb_hwp_resume(&usbh_core); + usb_mdelay(500U); + + if(puhost->dev_supp_remote_wkup){ + if (USBH_OK == usbh_clrdevfeature(puhost, FEATURE_SELECTOR_DEV, 0U)) { + /* user callback for initialization */ + puhost->usr_cb->dev_init(); + puhost->cur_state = HOST_CLASS_CHECK; + } + } else{ + puhost->cur_state = HOST_CLASS_CHECK; + } } break; -#endif +#endif /* USB_LOW_POWER */ case HOST_CLASS_ENUM: /* process class standard contol requests state machine */ @@ -374,12 +407,12 @@ void usbh_error_handler (usbh_host *puhost, usbh_status err_type) } /*! - \brief USB SOF callback function from the interrupt - \param[in] puhost: pointer to usb host + \brief USB SOF event function from the interrupt + \param[in] puhost: pointer to USB host \param[out] none \retval operation status */ -static uint8_t usbh_sof (usbh_host *puhost) +static uint8_t usb_ev_sof (usbh_host *puhost) { /* this callback could be used to implement a scheduler process */ puhost->control.timer = (uint16_t)usb_curframe_get(&usbh_core); @@ -399,7 +432,7 @@ static uint8_t usbh_sof (usbh_host *puhost) \param[out] none \retval operation status */ -static uint8_t usbh_connect (usbh_host *puhost) +static uint8_t usb_ev_connect (usbh_host *puhost) { usbh_core.host.connect_status = 1U; @@ -412,39 +445,13 @@ static uint8_t usbh_connect (usbh_host *puhost) \param[out] none \retval operation status */ -static uint8_t usbh_disconnect (usbh_host *puhost) +static uint8_t usb_ev_disconnect (usbh_host *puhost) { usbh_core.host.connect_status = 0U; return 0U; } -/*! - \brief USB port enable callback function from the interrupt - \param[in] puhost: pointer to usb host - \param[out] none - \retval operation status -*/ -static uint8_t usbh_port_enabled (usbh_host *puhost) -{ - usbh_core.host.port_enabled = 1U; - - return 0U; -} - -/*! - \brief USB port disabled callback function from the interrupt - \param[in] puhost: pointer to usb host - \param[out] none - \retval operation status -*/ -static uint8_t usbh_port_disabled (usbh_host *puhost) -{ - usbh_core.host.port_enabled = 0U; - - return 0U; -} - /*! \brief handle the USB enumeration task \param[in] puhost: pointer to host @@ -453,7 +460,7 @@ static uint8_t usbh_port_disabled (usbh_host *puhost) */ static usbh_status usbh_enum_task (usbh_host *puhost) { - uint8_t str_buf[64]; + uint8_t str_buf[512]; usbh_status status = USBH_BUSY; @@ -594,7 +601,7 @@ static usbh_status usbh_enum_task (usbh_host *puhost) } -#ifdef USB_FS_LOW_PWR_ENABLE +#if USB_LOW_POWER /*! \brief handles the USB resume from suspend mode @@ -647,4 +654,4 @@ static void usb_hwp_suspend(usb_core_driver *pudev) *pudev->regs.PWRCLKCTL |= PWRCLKCTL_SHCLK; } -#endif +#endif /* USB_LOW_POWER */ diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_enum.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_enum.c index 8949c1a6..8ab54da9 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_enum.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_enum.c @@ -3,10 +3,11 @@ \brief USB host mode enumeration driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -111,11 +112,11 @@ usbh_status usbh_cfgdesc_get (usbh_host *puhost, uint16_t len) usbh_control *usb_ctl = &puhost->control; -#if (USBH_KEEP_CFG_DESCRIPTOR == 1U) +#if (USBH_CFG_DESC_KEEP == 1U) pdata = puhost->dev_prop.cfgdesc_rawdata; #else pdata = puhost->dev_prop.data; -#endif +#endif /* USBH_CFG_DESC_KEEP */ if (CTL_IDLE == usb_ctl->ctl_state) { usb_ctl->setup.req = (usb_req) { diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_pipe.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_pipe.c index c3405303..13bab8d1 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_pipe.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_pipe.c @@ -3,10 +3,11 @@ \brief USB host mode pipe operation driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -63,7 +64,7 @@ uint8_t usbh_pipe_create (usb_core_driver *pudev, usb_pipe_init (pudev, pp_num); - return HC_OK; + return HP_OK; } /*! @@ -98,7 +99,7 @@ uint8_t usbh_pipe_update (usb_core_driver *pudev, usb_pipe_init (pudev, pp_num); - return HC_OK; + return HP_OK; } /*! @@ -112,7 +113,7 @@ uint8_t usbh_pipe_allocate (usb_core_driver *pudev, uint8_t ep_addr) { uint16_t pp_num = usbh_freepipe_get (pudev); - if (HC_ERROR != pp_num) { + if (HP_ERROR != pp_num) { pudev->host.pipe[pp_num].in_used = 1U; pudev->host.pipe[pp_num].ep.dir = EP_DIR(ep_addr); pudev->host.pipe[pp_num].ep.num = EP_ID(ep_addr); @@ -130,7 +131,7 @@ uint8_t usbh_pipe_allocate (usb_core_driver *pudev, uint8_t ep_addr) */ uint8_t usbh_pipe_free (usb_core_driver *pudev, uint8_t pp_num) { - if (pp_num < HC_MAX) { + if (pp_num < HP_MAX) { pudev->host.pipe[pp_num].in_used = 0U; } @@ -147,7 +148,7 @@ uint8_t usbh_pipe_delete (usb_core_driver *pudev) { uint8_t pp_num = 0U; - for (pp_num = 2U; pp_num < HC_MAX; pp_num++) { + for (pp_num = 2U; pp_num < HP_MAX; pp_num++) { pudev->host.pipe[pp_num] = (usb_pipe) {0}; } @@ -164,11 +165,11 @@ static uint16_t usbh_freepipe_get (usb_core_driver *pudev) { uint8_t pp_num = 0U; - for (pp_num = 0U; pp_num < HC_MAX; pp_num++) { + for (pp_num = 0U; pp_num < HP_MAX; pp_num++) { if (0U == pudev->host.pipe[pp_num].in_used) { return (uint16_t)pp_num; } } - return HC_ERROR; + return HP_ERROR; } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_transc.c b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_transc.c index 97465143..20ea8ae1 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_transc.c +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/host/core/Source/usbh_transc.c @@ -3,10 +3,12 @@ \brief USB host mode transactions driver \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2021-09-27, V3.0.1, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: @@ -220,7 +222,9 @@ usbh_status usbh_ctl_handler (usbh_host *puhost) */ static usb_urb_state usbh_urb_wait (usbh_host *puhost, uint8_t pp_num, uint32_t wait_time) { + uint32_t timeout = 0U; usb_urb_state urb_status = URB_IDLE; + timeout = puhost->control.timer; while (URB_DONE != (urb_status = usbh_urbstate_get(puhost->data, pp_num))) { if (URB_NOTREADY == urb_status) { @@ -231,7 +235,8 @@ static usb_urb_state usbh_urb_wait (usbh_host *puhost, uint8_t pp_num, uint32_t } else if (URB_ERROR == urb_status) { puhost->control.ctl_state = CTL_ERROR; break; - } else if ((wait_time > 0U) && ((usb_curframe_get(puhost->data)- puhost->control.timer) > wait_time)) { + } else if ((wait_time > 0U) && (((usb_curframe_get(puhost->data) > timeout) && ((usb_curframe_get(puhost->data) - timeout) > wait_time)) \ + || ((usb_curframe_get(puhost->data) < timeout) && ((usb_curframe_get(puhost->data) + 0x3FFFU - timeout) > wait_time)))) { /* timeout for in transfer */ puhost->control.ctl_state = CTL_ERROR; break; @@ -294,7 +299,6 @@ static void usbh_data_in_transc (usbh_host *puhost) if (URB_DONE == usbh_urb_wait (puhost, puhost->control.pipe_in_num, DATA_STAGE_TIMEOUT)) { puhost->control.ctl_state = CTL_STATUS_OUT; - puhost->control.timer = (uint16_t)usb_curframe_get(puhost->data); } } @@ -316,7 +320,6 @@ static void usbh_data_out_transc (usbh_host *puhost) if (URB_DONE == usbh_urb_wait (puhost, puhost->control.pipe_out_num, DATA_STAGE_TIMEOUT)) { puhost->control.ctl_state = CTL_STATUS_IN; - puhost->control.timer = (uint16_t)usb_curframe_get(puhost->data); } } diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/cdc/usb_cdc.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/cdc/usb_cdc.h index bac49a48..d706602e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/cdc/usb_cdc.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/cdc/usb_cdc.h @@ -3,10 +3,11 @@ \brief the header file of communication device class standard \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/hid/usb_hid.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/hid/usb_hid.h index 55a3ab13..a2933811 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/hid/usb_hid.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/hid/usb_hid.h @@ -3,10 +3,11 @@ \brief definitions for the USB HID class \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/msc_bbb.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/msc_bbb.h index 4ac47580..59f1921a 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/msc_bbb.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/msc_bbb.h @@ -3,10 +3,11 @@ \brief definitions for the USB MSC BBB(bulk/bulk/bulk) protocol \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/msc_scsi.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/msc_scsi.h index 99ed4345..d78d7e6e 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/msc_scsi.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/msc_scsi.h @@ -3,10 +3,11 @@ \brief definitions for the USB MSC SCSI commands \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/usb_msc.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/usb_msc.h index 9cc7d54d..fcbab764 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/usb_msc.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/class/msc/usb_msc.h @@ -3,10 +3,11 @@ \brief definitions for the USB MSC class \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: diff --git a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/common/usb_ch9_std.h b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/common/usb_ch9_std.h index dbef736b..024f245c 100644 --- a/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/common/usb_ch9_std.h +++ b/system/GD32F30x_firmware/GD32F30x_usbfs_library/ustd/common/usb_ch9_std.h @@ -3,10 +3,11 @@ \brief USB 2.0 standard defines \version 2020-08-01, V3.0.0, firmware for GD32F30x + \version 2022-06-10, V3.1.0, firmware for GD32F30x */ /* - Copyright (c) 2020, GigaDevice Semiconductor Inc. + Copyright (c) 2022, GigaDevice Semiconductor Inc. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: