Load/store as user #54
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The cap-store instructions now look at the data being stored to decide whether they issue Write(Cap) or Write(Data) requests on "the bus". This allows the PTW logic (and update_PTE_Bits) in particular to not fast-cap-dirty a page that's being targeted by the store of an untagged capability. This is not, however, viable for AMOCAS and so additional changes may be required if we are to avoid considering AMOCAS as always capability-dirtying. Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com>
Use Either-monadic style Eliminate ext_ptw_sc / PTW_SC_* as we now simply test the error cases in priority order, so there's no need to explicitly pass this information forward in checkPTEPermission. ext_ptw_lc / PTW_LC_* persist as the extended PTW information is analysed by instructions. Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com>
Split uccsr out to its own thing; remove mccsr and have accesses alias sccsr.
Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com>
Common up with handle_loadres_cap_via_cap.
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PeterRugg
reviewed
Oct 29, 2021
PeterRugg
reviewed
Oct 29, 2021
PeterRugg
reviewed
Oct 29, 2021
PeterRugg
reviewed
Oct 29, 2021
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Looks good. It's a bit of a shame that so much documentation needs to be duplicated, and that there isn't encoding space to add an "execute as user" bit to the existing instructions, like the unsigned variants of the instructions. |
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@PeterRugg Thanks for looking; I've responded in a |
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Sits on top of the CLG and isentry PRs because orthogonality is hard. The last two commits are the salient ones: some preparatory refactoring and then the actual instruction bodies.