PiM core with L1 cache dumps totally wrong output trace.

[white-jing]

Hi

Why do you generate unfiltered memory trace for PiM?
In your Napel paper, you said you simulated NMP where core has L1 cache.
However, since your memory trace is generated unfiltered, cache size does not affect the zsim output at all.
I have verified that if you are using pim_trace mode, cache does not affect the trace output.

How did you simulate your NMP with L1 cache using this framework?